Support the fs_base and gs_base registers on i386.
As on amd64, these registers hold the base address of the fs and gs segments, respectively. For i386 these two registers are 32 bits. gdb/ChangeLog: * amd64-fbsd-nat.c (amd64_fbsd_nat_target::read_description): Update calls to i386_target_description to add 'segments' parameter. * amd64-tdep.c (amd64_init_abi): Set tdep->fsbase_regnum. Don't add segment base registers. * arch/i386.c (i386_create_target_description): Add 'segments' parameter to enable segment base registers. * arch/i386.h (i386_create_target_description): Likewise. * features/i386/32bit-segments.xml: New file. * features/i386/32bit-segments.c: Generate. * i386-fbsd-nat.c (i386_fbsd_nat_target::read_description): Update call to i386_target_description to add 'segments' parameter. * i386-fbsd-tdep.c (i386fbsd_core_read_description): Likewise. * i386-go32-tdep.c (i386_go32_init_abi): Likewise. * i386-linux-tdep.c (i386_linux_read_description): Likewise. * i386-tdep.c (i386_validate_tdesc_p): Add segment base registers if feature is present. (i386_gdbarch_init): Pass I386_NUM_REGS to set_gdbarch_num_regs. Add 'segments' parameter to call to i386_target_description. (i386_target_description): Add 'segments' parameter to enable segment base registers. (_initialize_i386_tdep) [GDB_SELF_TEST]: Add 'segments' parameter to call to i386_target_description. * i386-tdep.h (struct gdbarch_tdep): Add 'fsbase_regnum'. (enum i386_regnum): Add I386_FSBASE_REGNUM and I386_GSBASE_REGNUM. Define I386_NUM_REGS. (i386_target_description): Add 'segments' parameter to enable segment base registers. gdb/gdbserver/ChangeLog: * linux-x86-tdesc.c (i386_linux_read_description): Update call to i386_create_target_description for 'segments' parameter. * lynx-i386-low.c (lynx_i386_arch_setup): Likewise. * nto-x86-low.c (nto_x86_arch_setup): Likewise. * win32-i386-low.c (i386_arch_setup): Likewise.
This commit is contained in:
John Baldwin
parent
7cde5fc2ec
commit
1163a4b7a3
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@ -1,3 +1,34 @@
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2019-03-12 John Baldwin <jhb@FreeBSD.org>
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* amd64-fbsd-nat.c (amd64_fbsd_nat_target::read_description):
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Update calls to i386_target_description to add 'segments'
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parameter.
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* amd64-tdep.c (amd64_init_abi): Set tdep->fsbase_regnum. Don't
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add segment base registers.
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* arch/i386.c (i386_create_target_description): Add 'segments'
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parameter to enable segment base registers.
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* arch/i386.h (i386_create_target_description): Likewise.
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* features/i386/32bit-segments.xml: New file.
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* features/i386/32bit-segments.c: Generate.
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* i386-fbsd-nat.c (i386_fbsd_nat_target::read_description): Update
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call to i386_target_description to add 'segments' parameter.
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* i386-fbsd-tdep.c (i386fbsd_core_read_description): Likewise.
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* i386-go32-tdep.c (i386_go32_init_abi): Likewise.
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* i386-linux-tdep.c (i386_linux_read_description): Likewise.
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* i386-tdep.c (i386_validate_tdesc_p): Add segment base registers
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if feature is present.
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(i386_gdbarch_init): Pass I386_NUM_REGS to set_gdbarch_num_regs.
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Add 'segments' parameter to call to i386_target_description.
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(i386_target_description): Add 'segments' parameter to enable
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segment base registers.
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(_initialize_i386_tdep) [GDB_SELF_TEST]: Add 'segments' parameter
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to call to i386_target_description.
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* i386-tdep.h (struct gdbarch_tdep): Add 'fsbase_regnum'.
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(enum i386_regnum): Add I386_FSBASE_REGNUM and I386_GSBASE_REGNUM.
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Define I386_NUM_REGS.
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(i386_target_description): Add 'segments' parameter to enable
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segment base registers.
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2019-03-12 Eli Zaretskii <eliz@gnu.org>
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PR/24325
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@ -190,13 +190,13 @@ amd64_fbsd_nat_target::read_description ()
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if (is64)
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return amd64_target_description (xcr0, true);
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else
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return i386_target_description (xcr0);
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return i386_target_description (xcr0, false);
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}
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#endif
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if (is64)
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return amd64_target_description (X86_XSTATE_SSE_MASK, true);
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else
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return i386_target_description (X86_XSTATE_SSE_MASK);
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return i386_target_description (X86_XSTATE_SSE_MASK, false);
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}
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#if defined(HAVE_PT_GETDBREGS) && defined(USE_SIGTRAP_SIGINFO)
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@ -3107,15 +3107,7 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch,
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if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments") != NULL)
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{
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const struct tdesc_feature *feature =
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tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments");
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struct tdesc_arch_data *tdesc_data_segments =
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(struct tdesc_arch_data *) info.tdep_info;
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tdesc_numbered_register (feature, tdesc_data_segments,
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AMD64_FSBASE_REGNUM, "fs_base");
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tdesc_numbered_register (feature, tdesc_data_segments,
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AMD64_GSBASE_REGNUM, "gs_base");
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tdep->fsbase_regnum = AMD64_FSBASE_REGNUM;
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}
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if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys") != NULL)
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@ -28,11 +28,12 @@
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#include "../features/i386/32bit-avx512.c"
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#include "../features/i386/32bit-mpx.c"
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#include "../features/i386/32bit-pkeys.c"
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#include "../features/i386/32bit-segments.c"
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/* Create i386 target descriptions according to XCR0. */
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target_desc *
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i386_create_target_description (uint64_t xcr0, bool is_linux)
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i386_create_target_description (uint64_t xcr0, bool is_linux, bool segments)
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{
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target_desc *tdesc = allocate_target_description ();
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@ -53,6 +54,9 @@ i386_create_target_description (uint64_t xcr0, bool is_linux)
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if (is_linux)
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regnum = create_feature_i386_32bit_linux (tdesc, regnum);
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if (segments)
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regnum = create_feature_i386_32bit_segments (tdesc, regnum);
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if (xcr0 & X86_XSTATE_AVX)
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regnum = create_feature_i386_32bit_avx (tdesc, regnum);
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@ -21,6 +21,7 @@
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#include "common/tdesc.h"
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#include <stdint.h>
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target_desc *i386_create_target_description (uint64_t xcr0, bool is_linux);
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target_desc *i386_create_target_description (uint64_t xcr0, bool is_linux,
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bool segments);
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#endif /* ARCH_I386_H */
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@ -0,0 +1,15 @@
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/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
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Original: 32bit-segments.xml */
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#include "common/tdesc.h"
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static int
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create_feature_i386_32bit_segments (struct target_desc *result, long regnum)
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{
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struct tdesc_feature *feature;
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feature = tdesc_create_feature (result, "org.gnu.gdb.i386.segments");
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tdesc_create_reg (feature, "fs_base", regnum++, 1, NULL, 32, "int");
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tdesc_create_reg (feature, "gs_base", regnum++, 1, NULL, 32, "int");
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return regnum;
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}
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@ -0,0 +1,12 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2016-2018 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.i386.segments">
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<reg name="fs_base" bitsize="32" type="int"/>
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<reg name="gs_base" bitsize="32" type="int"/>
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</feature>
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@ -1,3 +1,11 @@
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2019-03-12 John Baldwin <jhb@FreeBSD.org>
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* linux-x86-tdesc.c (i386_linux_read_description): Update call to
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i386_create_target_description for 'segments' parameter.
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* lynx-i386-low.c (lynx_i386_arch_setup): Likewise.
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* nto-x86-low.c (nto_x86_arch_setup): Likewise.
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* win32-i386-low.c (i386_arch_setup): Likewise.
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2019-03-12 Tom Tromey <tromey@adacore.com>
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* linux-low.c (iterate_over_lwps): Update.
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@ -87,7 +87,7 @@ i386_linux_read_description (uint64_t xcr0)
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if (*tdesc == NULL)
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{
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*tdesc = i386_create_target_description (xcr0, true);
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*tdesc = i386_create_target_description (xcr0, true, false);
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init_target_desc (*tdesc, i386_expedite_regs);
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}
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@ -331,7 +331,7 @@ static void
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lynx_i386_arch_setup (void)
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{
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struct target_desc *tdesc
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= i386_create_target_description (X86_XSTATE_SSE_MASK, false);
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= i386_create_target_description (X86_XSTATE_SSE_MASK, false, false);
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init_target_desc (tdesc, i386_expedite_regs);
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@ -89,7 +89,7 @@ nto_x86_arch_setup (void)
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{
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the_low_target.num_regs = 16;
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struct target_desc *tdesc
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= i386_create_target_description (X86_XSTATE_SSE_MASK, false);
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= i386_create_target_description (X86_XSTATE_SSE_MASK, false, false);
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init_target_desc (tdesc, i386_expedite_regs);
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@ -439,7 +439,7 @@ i386_arch_setup (void)
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false, false);
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const char **expedite_regs = amd64_expedite_regs;
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#else
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tdesc = i386_create_target_description (X86_XSTATE_SSE_MASK, false);
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tdesc = i386_create_target_description (X86_XSTATE_SSE_MASK, false, false);
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const char **expedite_regs = i386_expedite_regs;
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#endif
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@ -160,7 +160,7 @@ i386_fbsd_nat_target::read_description ()
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if (x86bsd_xsave_len == 0)
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xcr0 = X86_XSTATE_SSE_MASK;
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return i386_target_description (xcr0);
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return i386_target_description (xcr0, false);
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}
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#endif
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@ -267,7 +267,7 @@ i386fbsd_core_read_description (struct gdbarch *gdbarch,
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struct target_ops *target,
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bfd *abfd)
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{
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return i386_target_description (i386fbsd_core_read_xcr0 (abfd));
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return i386_target_description (i386fbsd_core_read_xcr0 (abfd), false);
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}
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/* Similar to i386_supply_fpregset, but use XSAVE extended state. */
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@ -35,7 +35,7 @@ i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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/* DJGPP does not support the SSE registers. */
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if (!tdesc_has_registers (info.target_desc))
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tdep->tdesc = i386_target_description (X86_XSTATE_X87_MASK);
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tdep->tdesc = i386_target_description (X86_XSTATE_X87_MASK, false);
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/* Native compiler is GCC, which uses the SVR4 register numbering
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even in COFF and STABS. See the comment in i386_gdbarch_init,
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@ -694,7 +694,7 @@ i386_linux_read_description (uint64_t xcr0)
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[(xcr0 & X86_XSTATE_PKRU) ? 1 : 0];
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if (*tdesc == NULL)
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*tdesc = i386_create_target_description (xcr0, true);
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*tdesc = i386_create_target_description (xcr0, true, false);
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return *tdesc;
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}
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@ -8175,7 +8175,7 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
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const struct tdesc_feature *feature_core;
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const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
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*feature_avx512, *feature_pkeys;
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*feature_avx512, *feature_pkeys, *feature_segments;
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int i, num_regs, valid_p;
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if (! tdesc_has_registers (tdesc))
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@ -8198,6 +8198,9 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
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/* Try AVX512 registers. */
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feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
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/* Try segment base registers. */
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feature_segments = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments");
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/* Try PKEYS */
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feature_pkeys = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys");
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@ -8307,6 +8310,16 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
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tdep->mpx_register_names[i]);
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}
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if (feature_segments)
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{
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if (tdep->fsbase_regnum < 0)
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tdep->fsbase_regnum = I386_FSBASE_REGNUM;
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valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
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tdep->fsbase_regnum, "fs_base");
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valid_p &= tdesc_numbered_register (feature_segments, tdesc_data,
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tdep->fsbase_regnum + 1, "gs_base");
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}
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if (feature_pkeys)
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{
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tdep->xcr0 |= X86_XSTATE_PKRU;
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@ -8543,14 +8556,14 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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/* Even though the default ABI only includes general-purpose registers,
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floating-point registers and the SSE registers, we have to leave a
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gap for the upper AVX, MPX and AVX512 registers. */
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set_gdbarch_num_regs (gdbarch, I386_PKEYS_NUM_REGS);
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set_gdbarch_num_regs (gdbarch, I386_NUM_REGS);
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set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp);
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/* Get the x86 target description from INFO. */
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tdesc = info.target_desc;
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if (! tdesc_has_registers (tdesc))
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tdesc = i386_target_description (X86_XSTATE_SSE_MASK);
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tdesc = i386_target_description (X86_XSTATE_SSE_MASK, false);
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tdep->tdesc = tdesc;
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tdep->num_core_regs = I386_NUM_GREGS + I387_NUM_REGS;
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@ -8592,6 +8605,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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tdep->pkru_regnum = -1;
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tdep->num_pkeys_regs = 0;
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/* No segment base registers. */
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tdep->fsbase_regnum = -1;
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tdesc_data = tdesc_data_alloc ();
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set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
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@ -8717,20 +8733,21 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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/* Return the target description for a specified XSAVE feature mask. */
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const struct target_desc *
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i386_target_description (uint64_t xcr0)
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i386_target_description (uint64_t xcr0, bool segments)
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{
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static target_desc *i386_tdescs \
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[2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/] = {};
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[2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
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target_desc **tdesc;
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tdesc = &i386_tdescs[(xcr0 & X86_XSTATE_SSE) ? 1 : 0]
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[(xcr0 & X86_XSTATE_AVX) ? 1 : 0]
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[(xcr0 & X86_XSTATE_MPX) ? 1 : 0]
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[(xcr0 & X86_XSTATE_AVX512) ? 1 : 0]
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[(xcr0 & X86_XSTATE_PKRU) ? 1 : 0];
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[(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]
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[segments ? 1 : 0];
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if (*tdesc == NULL)
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*tdesc = i386_create_target_description (xcr0, false);
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*tdesc = i386_create_target_description (xcr0, false, segments);
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return *tdesc;
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}
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@ -9072,7 +9089,7 @@ Show Intel Memory Protection Extensions specific variables."),
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for (auto &a : xml_masks)
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{
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auto tdesc = i386_target_description (a.mask);
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auto tdesc = i386_target_description (a.mask, false);
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selftests::record_xml_tdesc (a.xml, tdesc);
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}
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@ -200,6 +200,10 @@ struct gdbarch_tdep
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/* PKEYS register names. */
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const char **pkeys_register_names;
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/* Register number for %fsbase. Set this to -1 to indicate the
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absence of segment base registers. */
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int fsbase_regnum;
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/* Target description. */
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const struct target_desc *tdesc;
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@ -296,7 +300,9 @@ enum i386_regnum
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I386_K7_REGNUM = I386_K0_REGNUM + 7,
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I386_ZMM0H_REGNUM, /* %zmm0h */
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I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
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I386_PKRU_REGNUM
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I386_PKRU_REGNUM,
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I386_FSBASE_REGNUM,
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I386_GSBASE_REGNUM
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};
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/* Register numbers of RECORD_REGMAP. */
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@ -337,6 +343,7 @@ enum record_i386_regnum
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#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
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#define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
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#define I386_PKEYS_NUM_REGS (I386_PKRU_REGNUM + 1)
|
||||
#define I386_NUM_REGS (I386_GSBASE_REGNUM + 1)
|
||||
|
||||
/* Size of the largest register. */
|
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#define I386_MAX_REGISTER_SIZE 64
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|
@ -440,7 +447,8 @@ extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
|
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|
||||
extern int i386_process_record (struct gdbarch *gdbarch,
|
||||
struct regcache *regcache, CORE_ADDR addr);
|
||||
extern const struct target_desc *i386_target_description (uint64_t xcr0);
|
||||
extern const struct target_desc *i386_target_description (uint64_t xcr0,
|
||||
bool segments);
|
||||
|
||||
/* Return true iff the current target is MPX enabled. */
|
||||
extern int i386_mpx_enabled (void);
|
||||
|
|
|
|||
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Reference in New Issue