* config/tc-avr.c (AVR_ISA_???): moved to include/opcode/avr.h
(REGISTER_P): likewise. (avr_opcodes): uses include/opcode/avr.h (avr_operand): enable ld r,Z or st r,Z for at90s1200.
This commit is contained in:
Denis Chertykov
parent
2532761bdf
commit
1188e08253
@ -1,3 +1,10 @@
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Wed Jun 7 21:26:15 2000 Denis Chertykov <denisc@overta.ru>
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* config/tc-avr.c (AVR_ISA_???): moved to include/opcode/avr.h
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(REGISTER_P): likewise.
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(avr_opcodes): uses include/opcode/avr.h
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(avr_operand): enable ld r,Z or st r,Z for at90s1200.
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2000-06-04 Alan Modra <alan@linuxcare.com.au>
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* read.c (is_end_of_line): No ';' for TC_HPPA. Add missing
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@ -25,33 +25,29 @@
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#include "as.h"
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#include "subsegs.h"
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struct avr_opcodes_s
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{
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char *name;
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char *constraints;
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int insn_size; /* in words */
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int isa;
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unsigned int bin_opcode;
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};
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#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
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{#NAME, CONSTR, SIZE, ISA, BIN},
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struct avr_opcodes_s avr_opcodes[] =
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{
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#include "opcode/avr.h"
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{NULL, NULL, 0, 0, 0}
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};
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const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "$";
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#define AVR_ISA_1200 0x0001 /* in the beginning there was ... */
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#define AVR_ISA_LPM 0x0002 /* device has LPM */
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#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
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#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
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#define AVR_ISA_WRAP 0x0010 /* device has exactly 8K program memory */
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#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP, CALL) */
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#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, MOVW, ...) */
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#define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */
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#define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] (none yet) */
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#define AVR_ISA_SPM 0x0200 /* device can program itself (<=64K) */
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#define AVR_ISA_ESPM 0x0400 /* device can program itself (>64K, none yet) */
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#define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
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#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
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#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
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#define AVR_ISA_85xx (AVR_ISA_2xxx | AVR_ISA_WRAP)
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#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
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#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
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#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX | AVR_ISA_SPM)
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#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX)
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#define AVR_ISA_ALL 0xFFFF
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const char *md_shortopts = "m:";
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struct mcu_type_s
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{
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@ -109,21 +105,6 @@ const pseudo_typeS md_pseudo_table[] =
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};
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#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
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#define REGISTER_P(x) ((x) == 'r' \
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|| (x) == 'd' \
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|| (x) == 'w' \
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|| (x) == 'a' \
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|| (x) == 'v')
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struct avr_opcodes_s
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{
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char *name;
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char *constraints;
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char *opcode;
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int insn_size; /* in words */
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int isa;
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unsigned int bin_opcode;
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};
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static char * skip_space (char * s);
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static char * extract_word (char *from, char *to, int limit);
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@ -136,170 +117,6 @@ static bfd_reloc_code_real_type avr_ldi_expression (expressionS *exp);
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long md_pcrel_from_section PARAMS ((fixS *, segT));
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/* constraint letters
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r - any register
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d - `ldi' register (r16-r31)
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v - `movw' even register (r0, r2, ..., r28, r30)
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a - `fmul' register (r16-r23)
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w - `adiw' register (r24,r26,r28,r30)
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e - pointer registers (X,Y,Z)
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b - base pointer register and displacement ([YZ]+disp)
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z - Z pointer register (for [e]lpm Rd,Z[+])
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M - immediate value from 0 to 255
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n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
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s - immediate value from 0 to 7
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P - Port address value from 0 to 64. (in, out)
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p - Port address value from 0 to 32. (cbi, sbi, sbic, sbis)
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K - immediate value from 0 to 64 (used in `adiw', `sbiw')
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i - immediate value
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l - signed pc relative offset from -64 to 63
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L - signed pc relative offset from -2048 to 2047
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h - absolut code address (call, jmp)
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S - immediate value from 0 to 7 (S = s << 4)
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*/
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struct avr_opcodes_s avr_opcodes[] =
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{
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{"adc", "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00},
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{"add", "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00},
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{"and", "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000},
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{"cp", "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400},
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{"cpc", "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400},
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{"cpse", "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000},
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{"eor", "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400},
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{"mov", "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00},
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{"mul", "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL, 0x9c00},
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{"or", "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800},
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{"sbc", "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800},
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{"sub", "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800},
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{"clr", "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400},
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{"lsl", "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00},
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{"rol", "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00},
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{"tst", "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000},
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{"andi", "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000},
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/*XXX special case*/
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{"cbr", "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000},
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{"cpi", "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000},
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{"ldi", "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000},
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{"ori", "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000},
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{"sbci", "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000},
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{"sbr", "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000},
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{"subi", "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000},
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{"sbrc", "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00},
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{"sbrs", "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00},
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{"bld", "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800},
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{"bst", "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00},
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{"in", "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000},
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{"out", "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800},
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{"adiw", "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600},
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{"sbiw", "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700},
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{"cbi", "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800},
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{"sbi", "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00},
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{"sbic", "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900},
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{"sbis", "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00},
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/* ee = {X=11,Y=10,Z=00, 0} */
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{"ld", "r,e", "100!000dddddee-+", 1, AVR_ISA_2xxx, 0x8000},
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{"st", "e,r", "100!001rrrrree-+", 1, AVR_ISA_2xxx, 0x8200},
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{"ldd", "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000},
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{"std", "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200},
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{"sts", "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200},
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{"lds", "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000},
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{"brbc", "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400},
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{"brbs", "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000},
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{"brcc", "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400},
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{"brcs", "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000},
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{"breq", "l", "111100lllllll001", 1, AVR_ISA_1200, 0xf001},
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{"brge", "l", "111101lllllll100", 1, AVR_ISA_1200, 0xf404},
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{"brhc", "l", "111101lllllll101", 1, AVR_ISA_1200, 0xf405},
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{"brhs", "l", "111100lllllll101", 1, AVR_ISA_1200, 0xf005},
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{"brid", "l", "111101lllllll111", 1, AVR_ISA_1200, 0xf407},
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{"brie", "l", "111100lllllll111", 1, AVR_ISA_1200, 0xf007},
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{"brlo", "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000},
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{"brlt", "l", "111100lllllll100", 1, AVR_ISA_1200, 0xf004},
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{"brmi", "l", "111100lllllll010", 1, AVR_ISA_1200, 0xf002},
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{"brne", "l", "111101lllllll001", 1, AVR_ISA_1200, 0xf401},
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{"brpl", "l", "111101lllllll010", 1, AVR_ISA_1200, 0xf402},
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{"brsh", "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400},
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{"brtc", "l", "111101lllllll110", 1, AVR_ISA_1200, 0xf406},
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{"brts", "l", "111100lllllll110", 1, AVR_ISA_1200, 0xf006},
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{"brvc", "l", "111101lllllll011", 1, AVR_ISA_1200, 0xf403},
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{"brvs", "l", "111100lllllll011", 1, AVR_ISA_1200, 0xf003},
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{"rcall", "L", "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000},
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{"rjmp", "L", "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000},
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{"call", "h", "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e},
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{"jmp", "h", "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c},
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{"asr", "r", "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405},
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{"com", "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400},
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{"dec", "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a},
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{"inc", "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403},
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{"lsr", "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406},
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{"neg", "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401},
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{"pop", "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f},
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{"push", "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f},
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{"ror", "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407},
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{"ser", "d", "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f},
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{"swap", "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402},
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{"bclr", "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488},
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{"bset", "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408},
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{"clc", "", "1001010010001000", 1, AVR_ISA_1200, 0x9488},
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{"clh", "", "1001010011011000", 1, AVR_ISA_1200, 0x94d8},
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{"cli", "", "1001010011111000", 1, AVR_ISA_1200, 0x94f8},
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{"cln", "", "1001010010101000", 1, AVR_ISA_1200, 0x94a8},
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{"cls", "", "1001010011001000", 1, AVR_ISA_1200, 0x94c8},
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{"clt", "", "1001010011101000", 1, AVR_ISA_1200, 0x94e8},
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{"clv", "", "1001010010111000", 1, AVR_ISA_1200, 0x94b8},
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{"clz", "", "1001010010011000", 1, AVR_ISA_1200, 0x9498},
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{"icall","", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509},
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{"ijmp", "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409},
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{"lpm", "", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8},
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{"nop", "", "0000000000000000", 1, AVR_ISA_1200, 0x0000},
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{"ret", "", "1001010100001000", 1, AVR_ISA_1200, 0x9508},
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{"reti", "", "1001010100011000", 1, AVR_ISA_1200, 0x9518},
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{"sec", "", "1001010000001000", 1, AVR_ISA_1200, 0x9408},
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{"seh", "", "1001010001011000", 1, AVR_ISA_1200, 0x9458},
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{"sei", "", "1001010001111000", 1, AVR_ISA_1200, 0x9478},
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{"sen", "", "1001010000101000", 1, AVR_ISA_1200, 0x9428},
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{"ses", "", "1001010001001000", 1, AVR_ISA_1200, 0x9448},
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{"set", "", "1001010001101000", 1, AVR_ISA_1200, 0x9468},
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{"sev", "", "1001010000111000", 1, AVR_ISA_1200, 0x9438},
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{"sez", "", "1001010000011000", 1, AVR_ISA_1200, 0x9418},
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{"sleep","", "1001010110001000", 1, AVR_ISA_1200, 0x9588},
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{"wdr", "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8},
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{"elpm", "", "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8},
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{"spm", "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8},
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{"movw", "v,v", "00000001ddddrrrr", 1, AVR_ISA_MUL, 0x0100},
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{"muls", "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200},
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{"mulsu","a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300},
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{"fmul", "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308},
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{"fmuls","a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380},
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{"fmulsu","a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388},
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{"lpmx", "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004},
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/* these are for devices that don't exists yet */
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/* >64K program memory, new core */
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{"elpmx","r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006},
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{"espm", "", "1001010111111000", 1, AVR_ISA_ESPM, 0x95f8},
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/* >128K program memory (PC = EIND:Z) */
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{"eicall", "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519},
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{"eijmp", "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419},
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{NULL, NULL, NULL, 0, 0, 0}
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};
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#define EXP_MOD_NAME(i) exp_mod[i].name
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#define EXP_MOD_RELOC(i) exp_mod[i].reloc
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#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
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@ -734,6 +551,10 @@ avr_operand (opcode, where, op, line)
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as_bad (_ ("cannot both predecrement and postincrement"));
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op_mask |= 0x1001;
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}
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/* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
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registers, no predecrement, no postincrement */
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if ((op_mask & 0x100F) && !(avr_mcu->isa & AVR_ISA_SRAM))
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as_bad (_ ("addressing mode not supported"));
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}
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break;
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@ -866,6 +687,8 @@ avr_operand (opcode, where, op, line)
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op_mask |= x << 3;
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}
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break;
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case '?':
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break;
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default:
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as_bad (_ ("unknown constraint `%c'"), *op);
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}
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@ -1189,20 +1012,10 @@ md_assemble (str)
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}
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/* Special case for opcodes with optional operands (lpm, elpm) -
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version with operands is listed in avr_opcodes[] with "x" suffix. */
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version with operands exists in avr_opcodes[] in the next entry. */
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if (*str && !(*opcode->constraints))
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{
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struct avr_opcodes_s *opc1;
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/* known opcode, so strlen(op) <= 6 and strcat() should be safe */
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strcat(op, "x");
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opc1 = (struct avr_opcodes_s *) hash_find (avr_hash, op);
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/* if unknown, just forget it and use the original opcode */
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if (opc1)
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opcode = opc1;
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}
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if (*str && *opcode->constraints == '?')
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++opcode;
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if ((opcode->isa & avr_mcu->isa) != opcode->isa)
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as_bad (_ ("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
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Reference in New Issue
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