Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
* sim/fr30/ldm0.cgs: New testcase. * sim/fr30/ldm1.cgs: New testcase. * sim/fr30/stm0.cgs: New testcase. * sim/fr30/stm1.cgs: New testcase.
This commit is contained in:
Dave Brolley
parent
f628df5785
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11a2d92065
60
sim/testsuite/sim/fr30/ldm0.cgs
Normal file
60
sim/testsuite/sim/fr30/ldm0.cgs
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# fr30 testcase for ldm0 ($reglist_low)
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# mach(): fr30
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.include "testutils.inc"
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START
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.text
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.global ldm0
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ldm0:
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; Test ldm0 ($reglist_low)
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mvr_h_gr sp,r9 ; save stack pointer permanently
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inci_h_gr -4,sp
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mvi_h_mem 3,sp
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inci_h_gr -4,sp
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mvi_h_mem 2,sp
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inci_h_gr -4,sp
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mvi_h_mem 1,sp
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inci_h_gr -4,sp
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mvi_h_mem 0,sp
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set_cc 0x0f ; Condition codes should not change
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ldm0 (r0,r2,r4,r6)
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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test_h_gr 0,r0
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test_h_gr 1,r2
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test_h_gr 2,r4
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test_h_gr 3,r6
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inci_h_gr -16,sp
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set_cc 0x0f ; Condition codes should not change
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ldm0 (r1,r3,r5,r7)
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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test_h_gr 0,r1
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test_h_gr 1,r3
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test_h_gr 2,r5
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test_h_gr 3,r7
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inci_h_gr -16,sp
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set_cc 0x0f ; Condition codes should not change
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ldm0 (r1,r5,r7,r3) ; Order speficied should not matter
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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test_h_gr 0,r1
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test_h_gr 1,r3
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test_h_gr 2,r5
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test_h_gr 3,r7
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set_cc 0x0f ; Condition codes should not change
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ldm0 () ; Nothing should happen
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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test_h_gr 0,r1
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test_h_gr 1,r3
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test_h_gr 2,r5
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test_h_gr 3,r7
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pass
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59
sim/testsuite/sim/fr30/ldm1.cgs
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59
sim/testsuite/sim/fr30/ldm1.cgs
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@ -0,0 +1,59 @@
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# fr30 testcase for ldm1 ($reglist_low)
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# mach(): fr30
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.include "testutils.inc"
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START
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.text
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.global ldm1
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ldm1:
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; Test ldm1 ($reglist_low)
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mvr_h_gr sp,r1 ; save stack pointer permanently
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inci_h_gr -4,sp
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mvi_h_mem 3,sp
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inci_h_gr -4,sp
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mvi_h_mem 2,sp
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inci_h_gr -4,sp
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mvi_h_mem 1,sp
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inci_h_gr -4,sp
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mvi_h_mem 0,sp
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set_cc 0x0f ; Condition codes should not change
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ldm1 (r8,r10,r12,r14)
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test_cc 1 1 1 1
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testr_h_gr sp,r1
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test_h_gr 0,r8
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test_h_gr 1,r10
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test_h_gr 2,r12
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test_h_gr 3,r14
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inci_h_gr -16,sp
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set_cc 0x0f ; Condition codes should not change
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ldm1 (r9,r11,r13,r15)
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test_cc 1 1 1 1
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test_h_gr 0,r9
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test_h_gr 1,r11
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test_h_gr 2,r13
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test_h_gr 3,r15
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mvr_h_gr r1,sp ; restore stack pointer
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inci_h_gr -16,sp
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set_cc 0x0f ; Condition codes should not change
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ldm1 (r9,r13,r15,r11); Order speficied should not matter
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test_cc 1 1 1 1
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test_h_gr 0,r9
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test_h_gr 1,r11
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test_h_gr 2,r13
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test_h_gr 3,r15
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mvr_h_gr r1,sp ; restore stack pointer
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set_cc 0x0f ; Condition codes should not change
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ldm1 () ; Nothing should happen
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test_cc 1 1 1 1
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testr_h_gr sp,r1
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test_h_gr 0,r9
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test_h_gr 1,r11
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test_h_gr 2,r13
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pass
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101
sim/testsuite/sim/fr30/stm0.cgs
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101
sim/testsuite/sim/fr30/stm0.cgs
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# fr30 testcase for stm0 ($reglist_low)
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# mach(): fr30
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.include "testutils.inc"
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START
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.text
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.global stm0
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stm0:
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; Test stm0 ($reglist_low)
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mvr_h_gr sp,r8 ; save stack pointer temporarily
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mvr_h_gr sp,r9 ; save stack pointer permanently
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mvi_h_gr 0,r0
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mvi_h_gr 1,r1
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mvi_h_gr 2,r2
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mvi_h_gr 3,r3
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mvi_h_gr 4,r4
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mvi_h_gr 5,r5
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mvi_h_gr 6,r6
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mvi_h_gr 7,r7
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set_cc 0x0f ; Condition codes should not change
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stm0 (r0,r2,r4,r6)
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test_cc 1 1 1 1
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inci_h_gr -4,r8
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test_h_mem 6,r8
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inci_h_gr -4,r8
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test_h_mem 4,r8
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inci_h_gr -4,r8
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test_h_mem 2,r8
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inci_h_gr -4,r8
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test_h_mem 0,r8
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mvr_h_gr r9,sp ; restore stack pointer
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mvr_h_gr r9,r8 ; save stack pointer temporarily
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mvi_h_gr 0,r0
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mvi_h_gr 1,r1
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mvi_h_gr 2,r2
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mvi_h_gr 3,r3
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mvi_h_gr 4,r4
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mvi_h_gr 5,r5
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mvi_h_gr 6,r6
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mvi_h_gr 7,r7
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set_cc 0x0f ; Condition codes should not change
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stm0 (r1,r3,r5,r7)
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test_cc 1 1 1 1
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inci_h_gr -4,r8
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test_h_mem 7,r8
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inci_h_gr -4,r8
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test_h_mem 5,r8
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inci_h_gr -4,r8
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test_h_mem 3,r8
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inci_h_gr -4,r8
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test_h_mem 1,r8
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mvr_h_gr r9,sp ; restore stack pointer
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mvr_h_gr r9,r8 ; save stack pointer temporarily
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mvi_h_gr 0,r0
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mvi_h_gr 1,r1
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mvi_h_gr 2,r2
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mvi_h_gr 3,r3
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mvi_h_gr 4,r4
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mvi_h_gr 5,r5
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mvi_h_gr 6,r6
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mvi_h_gr 7,r7
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set_cc 0x0f ; Condition codes should not change
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stm0 (r1,r5,r7,r3) ; Order specified should not matter
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test_cc 1 1 1 1
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inci_h_gr -4,r8
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test_h_mem 7,r8
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inci_h_gr -4,r8
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test_h_mem 5,r8
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inci_h_gr -4,r8
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test_h_mem 3,r8
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inci_h_gr -4,r8
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test_h_mem 1,r8
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mvr_h_gr r9,sp ; restore stack pointer
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mvr_h_gr r9,r8 ; save stack pointer temporarily
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mvi_h_gr 9,r0
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mvi_h_gr 9,r1
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mvi_h_gr 9,r2
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mvi_h_gr 9,r3
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mvi_h_gr 9,r4
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mvi_h_gr 9,r5
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mvi_h_gr 9,r6
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mvi_h_gr 9,r7
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set_cc 0x0f ; Condition codes should not change
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stm0 () ; should do nothing
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test_cc 1 1 1 1
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testr_h_gr r9,sp
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inci_h_gr -4,r8
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test_h_mem 7,r8
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inci_h_gr -4,r8
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test_h_mem 5,r8
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inci_h_gr -4,r8
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test_h_mem 3,r8
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inci_h_gr -4,r8
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test_h_mem 1,r8
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pass
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97
sim/testsuite/sim/fr30/stm1.cgs
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97
sim/testsuite/sim/fr30/stm1.cgs
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# fr30 testcase for stm1 ($reglist_low)
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# mach(): fr30
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.include "testutils.inc"
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START
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.text
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.global stm1
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stm1:
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; Test stm1 ($reglist_low)
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mvr_h_gr sp,r1 ; save stack pointer temporarily
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mvr_h_gr sp,r2 ; save stack pointer permanently
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mvi_h_gr 8,r8
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mvi_h_gr 9,r9
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mvi_h_gr 10,r10
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mvi_h_gr 11,r11
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mvi_h_gr 12,r12
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mvi_h_gr 13,r13
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mvi_h_gr 14,r14
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set_cc 0x0f ; Condition codes should not change
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stm1 (r8,r10,r12,r14)
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test_cc 1 1 1 1
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inci_h_gr -4,r1
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test_h_mem 14,r1
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inci_h_gr -4,r1
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test_h_mem 12,r1
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inci_h_gr -4,r1
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test_h_mem 10,r1
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inci_h_gr -4,r1
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testr_h_mem 8,r1
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mvr_h_gr r2,sp ; restore stack pointer
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mvr_h_gr r2,r1 ; save stack pointer temporarily
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mvi_h_gr 8,r8
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mvi_h_gr 9,r9
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mvi_h_gr 10,r10
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mvi_h_gr 11,r11
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mvi_h_gr 12,r12
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mvi_h_gr 13,r13
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mvi_h_gr 14,r14
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set_cc 0x0f ; Condition codes should not change
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stm1 (r9,r11,r13,r15)
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test_cc 1 1 1 1
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inci_h_gr -4,r1
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testr_h_mem r2,r1
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inci_h_gr -4,r1
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test_h_mem 13,r1
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inci_h_gr -4,r1
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test_h_mem 11,r1
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inci_h_gr -4,r1
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test_h_mem 9,r1 ; saved r15 is from before stm1
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mvr_h_gr r2,sp ; restore stack pointer
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mvr_h_gr r2,r1 ; save stack pointer temporarily
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mvi_h_gr 8,r8
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mvi_h_gr 9,r9
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mvi_h_gr 10,r10
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mvi_h_gr 11,r11
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mvi_h_gr 12,r12
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mvi_h_gr 13,r13
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mvi_h_gr 14,r14
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set_cc 0x0f ; Condition codes should not change
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stm1 (r9,r13,r15,r11); Order specified should not matter
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test_cc 1 1 1 1
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inci_h_gr -4,r1
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testr_h_mem r2,r1
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inci_h_gr -4,r1
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test_h_mem 13,r1
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inci_h_gr -4,r1
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test_h_mem 11,r1
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inci_h_gr -4,r1
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test_h_mem 9,r1 ; saved r15 is from before stm1
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mvr_h_gr r2,sp ; restore stack pointer
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mvr_h_gr r2,r1 ; save stack pointer temporarily
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mvi_h_gr 9,r8
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mvi_h_gr 9,r9
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mvi_h_gr 9,r10
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mvi_h_gr 9,r11
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mvi_h_gr 9,r12
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mvi_h_gr 9,r13
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mvi_h_gr 9,r14
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set_cc 0x0f ; Condition codes should not change
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stm1 () ; should do nothing
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test_cc 1 1 1 1
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testr_h_gr r2,sp
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inci_h_gr -4,r1
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testr_h_mem r2,r1
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inci_h_gr -4,r1
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test_h_mem 13,r1
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inci_h_gr -4,r1
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test_h_mem 11,r1
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inci_h_gr -4,r1
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test_h_mem 9,r1
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pass
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