* elf-hppa.h (elf_hppa_final_link_relocate): Handle DLTREL14WR and
DLTREL14WD relocs. (elf_hppa_relocate_insn): Similarly.
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@ -1,5 +1,9 @@
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Tue Sep 7 17:25:12 1999 Jeffrey A Law (law@cygnus.com)
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Tue Sep 7 17:25:12 1999 Jeffrey A Law (law@cygnus.com)
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* elf-hppa.h (elf_hppa_final_link_relocate): Handle DLTREL14WR and
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DLTREL14WD relocs.
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(elf_hppa_relocate_insn): Similarly.
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* elf-hppa.h (elf_hppa_final_link_relocate): Handle DLTREL14R and
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* elf-hppa.h (elf_hppa_final_link_relocate): Handle DLTREL14R and
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DLTREL21L relocs. Pass the output bfd to elf_hppa_relocate_insn.
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DLTREL21L relocs. Pass the output bfd to elf_hppa_relocate_insn.
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Pass the relocate type rather than the insn format to
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Pass the relocate type rather than the insn format to
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@ -1040,13 +1040,10 @@ elf_hppa_final_link_relocate (howto, input_bfd, output_bfd,
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The list will be deleted eventually.
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The list will be deleted eventually.
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27210 R_PARISC_SEGREL32
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27210 R_PARISC_SEGREL32
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8458 R_PARISC_DLTREL14R
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8284 R_PARISC_DLTIND21L
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8284 R_PARISC_DLTIND21L
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8218 R_PARISC_DLTIND14DR
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8218 R_PARISC_DLTIND14DR
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6675 R_PARISC_FPTR64
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6675 R_PARISC_FPTR64
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6561 R_PARISC_DLTREL21L
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3974 R_PARISC_DIR64
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3974 R_PARISC_DIR64
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3715 R_PARISC_DLTREL14DR
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1584 R_PARISC_LTOFF_FPTR14DR
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1584 R_PARISC_LTOFF_FPTR14DR
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1565 R_PARISC_LTOFF_FPTR21L
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1565 R_PARISC_LTOFF_FPTR21L
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1120 R_PARISC_PCREL64
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1120 R_PARISC_PCREL64
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@ -1055,7 +1052,6 @@ elf_hppa_final_link_relocate (howto, input_bfd, output_bfd,
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791 R_PARISC_GPREL64
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791 R_PARISC_GPREL64
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772 R_PARISC_PLTOFF14DR
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772 R_PARISC_PLTOFF14DR
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386 R_PARISC_PLTOFF21L
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386 R_PARISC_PLTOFF21L
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77 R_PARISC_DLTREL14WR
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6 R_PARISC_LTOFF64
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6 R_PARISC_LTOFF64
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5 R_PARISC_SEGREL64
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5 R_PARISC_SEGREL64
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1 R_PARISC_DLTIND14R
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1 R_PARISC_DLTIND14R
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@ -1085,6 +1081,8 @@ elf_hppa_final_link_relocate (howto, input_bfd, output_bfd,
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}
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}
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case R_PARISC_DLTREL14R:
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case R_PARISC_DLTREL14R:
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case R_PARISC_DLTREL14DR:
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case R_PARISC_DLTREL14WR:
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{
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{
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bfd_vma location;
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bfd_vma location;
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r_field = e_rrsel;
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r_field = e_rrsel;
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@ -1275,6 +1273,65 @@ elf_hppa_relocate_insn (abfd, input_sect, insn, address, sym_value,
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return insn | w;
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return insn | w;
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}
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}
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/* This is similar to a DLTREL14R relocation, except that it applies
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to doubleword load/store instructions which have a slightly different
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bit encoding for the displacement than singleword load/store
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instructions. */
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case R_PARISC_DLTREL14DR:
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{
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int w;
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/* Subtract out the global pointer value. */
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sym_value -= _bfd_get_gp_value (abfd);
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/* Apply the desired field selector (R_FIELD). */
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sym_value = hppa_field_adjust (sym_value, r_addend, r_field);
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/* Mask off bits in INSN we do not want. */
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insn &= 0xffffc00e;
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/* The sign bit at 14 moves into bit zero in the destination. */
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insn |= ((sym_value & 0x2000) >> 13);
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/* Turn off the bits in sym_value we do not care about. */
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sym_value &= 0x1ff8;
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/* Now shift it one bit position left so that it lines up with the
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destination field in INSN. */
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sym_value <<= 1;
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return insn | sym_value;
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}
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/* This is similar to DLTREL14R and DLTREL14DR relocation, except that it
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applies to floating point single word load store instructions which
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have a different encoding than other load/store instructions. */
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case R_PARISC_DLTREL14WR:
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{
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int w;
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/* Subtract out the global pointer value. */
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sym_value -= _bfd_get_gp_value (abfd);
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/* Apply the desired field selector (R_FIELD). */
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sym_value = hppa_field_adjust (sym_value, r_addend, r_field);
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/* Mask off bits in INSN we do not want. */
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insn &= 0xffffc006;
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/* The sign bit at 14 moves into bit zero in the destination. */
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insn |= ((sym_value & 0x2000) >> 13);
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/* Turn off the bits in sym_value we do not care about. */
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sym_value &= 0x1ffc;
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/* Now shift it one bit position left so that it lines up with the
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destination field in INSN. */
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sym_value <<= 1;
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return insn | sym_value;
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}
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default:
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default:
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return insn;
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return insn;
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}
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}
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