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Stop objdump from displaying control codes embedded in symbol names. 

PR 23963
binutils* objdump.c (sanitize_string): New function.  Removes control
	characters from symbol names.
	(dump_section_header): Use new function.
	(objdump_print_symname): Likewise.
	(objdump_print_addr_with_sym): Likewise.
	(show_line): Likewise.
	(disassemble_bytes): Likewise.
	(disassemble_section): Likewise.
	(load_specific_debug_section): Likewise.
	(read_section_stabs): Likewise.
	(print_section_stabs): Likewise.
	(dump_section): Likewise.
	(dump_reloc_set): Likewise.
	(dump_relocs_in_section): Likewise.
	(dump_bfd): Likewise.
	(display_any_bfd): Likewise.

gas	* testsuite/gas/mips/mips16-branch-absolute-1.d: Adjust for the fact that
	control characters are now displayed as escape sequences.
	* testsuite/gas/mips/mips16-e.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-0.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-1.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-delay-0.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-delay-1.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
	* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d:
	Likewise.
	* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d:
	Likewise.
	* testsuite/gas/mips/mipsel16-e.d: Likewise.
	* testsuite/gas/mips/mipsr6@msa.d: Likewise.
	* testsuite/gas/mips/mipsr6@relax-swap3.d: Likewise.
	* testsuite/gas/mips/r6-64-n32.d: Likewise.
	* testsuite/gas/mips/r6-64-n64.d: Likewise.
	* testsuite/gas/mips/r6-n32.d: Likewise.
	* testsuite/gas/mips/r6-n64.d: Likewise.
	* testsuite/gas/mips/r6.d: Likewise.
	* testsuite/gas/mips/tmips16-e.d: Likewise.
	* testsuite/gas/mips/tmipsel16-e.d: Likewise.
	* testsuite/gas/mn10300/relax.d: Likewise.
This commit is contained in:
Nick Clifton 2019-01-10 15:19:33 +00:00
parent 8d7bcccb82
commit 12add40ee4
33 changed files with 600 additions and 469 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
binutils/ChangeLog
View File

@ -1,3 +1,23 @@
2019-01-10 Nick Clifton <nickc@redhat.com>
PR 23963
* objdump.c (sanitize_string): New function. Removes control
characters from symbol names.
(dump_section_header): Use new function.
(objdump_print_symname): Likewise.
(objdump_print_addr_with_sym): Likewise.
(show_line): Likewise.
(disassemble_bytes): Likewise.
(disassemble_section): Likewise.
(load_specific_debug_section): Likewise.
(read_section_stabs): Likewise.
(print_section_stabs): Likewise.
(dump_section): Likewise.
(dump_reloc_set): Likewise.
(dump_relocs_in_section): Likewise.
(dump_bfd): Likewise.
(display_any_bfd): Likewise.
2019-01-09 Nick Clifton <nickc@redhat.com>
PR 24049

127
binutils/objdump.c
View File

@ -374,6 +374,68 @@ nonfatal (const char *msg)
bfd_nonfatal (msg);
exit_status = 1;
}
/* Returns a version of IN with any control characters
replaced by escape sequences. Uses a static buffer
if necessary. */
static const char *
sanitize_string (const char * in)
{
static char * buffer = NULL;
static unsigned int buffer_len = 0;
const char * original = in;
char * out;
/* Paranoia. */
if (in == NULL)
return "";
/* See if any conversion is necessary. In the majority
of cases it will not be needed. */
do
{
char c = *in++;
if (c == 0)
return original;
if (ISCNTRL (c))
break;
}
while (1);
/* Copy the input, translating as needed. */
in = original;
if (buffer_len < (strlen (in) * 2))
{
free ((void *) buffer);
buffer_len = strlen (in) * 2;
buffer = xmalloc (buffer_len + 1);
}
out = buffer;
do
{
char c = *in++;
if (c == 0)
break;
if (!ISCNTRL (c))
*out++ = c;
else
{
*out++ = '^';
*out++ = c + 0x40;
}
}
while (1);
*out = 0;
return buffer;
}
/* Returns TRUE if the specified section should be dumped. */
@ -471,7 +533,7 @@ dump_section_header (bfd *abfd, asection *section, void *data)
return;
printf ("%3d %-*s %08lx ", section->index, longest_section_name,
bfd_get_section_name (abfd, section),
sanitize_string (bfd_get_section_name (abfd, section)),
(unsigned long) bfd_section_size (abfd, section) / opb);
bfd_printf_vma (abfd, bfd_get_section_vma (abfd, section));
printf (" ");
@ -905,6 +967,8 @@ objdump_print_symname (bfd *abfd, struct disassemble_info *inf,
if (bfd_is_und_section (bfd_get_section (sym)))
hidden = TRUE;
name = sanitize_string (name);
if (inf != NULL)
{
(*inf->fprintf_func) (inf->stream, "%s", name);
@ -1152,7 +1216,7 @@ objdump_print_addr_with_sym (bfd *abfd, asection *sec, asymbol *sym,
bfd_vma secaddr;
(*inf->fprintf_func) (inf->stream, " <%s",
bfd_get_section_name (abfd, sec));
sanitize_string (bfd_get_section_name (abfd, sec)));
secaddr = bfd_get_section_vma (abfd, sec);
if (vma < secaddr)
{
@ -1574,7 +1638,7 @@ show_line (bfd *abfd, asection *section, bfd_vma addr_offset)
&& (prev_functionname == NULL
|| strcmp (functionname, prev_functionname) != 0))
{
printf ("%s():\n", functionname);
printf ("%s():\n", sanitize_string (functionname));
prev_line = -1;
}
if (linenumber > 0
@ -1583,10 +1647,11 @@ show_line (bfd *abfd, asection *section, bfd_vma addr_offset)
{
if (discriminator > 0)
printf ("%s:%u (discriminator %u)\n",
filename == NULL ? "???" : filename,
filename == NULL ? "???" : sanitize_string (filename),
linenumber, discriminator);
else
printf ("%s:%u\n", filename == NULL ? "???" : filename,
printf ("%s:%u\n", filename == NULL
? "???" : sanitize_string (filename),
linenumber);
}
if (unwind_inlines)
@ -1597,8 +1662,11 @@ show_line (bfd *abfd, asection *section, bfd_vma addr_offset)
while (bfd_find_inliner_info (abfd, &filename2, &functionname2,
&line2))
printf ("inlined by %s:%u (%s)\n", filename2, line2,
functionname2);
{
printf ("inlined by %s:%u",
sanitize_string (filename2), line2);
printf (" (%s)\n", sanitize_string (functionname2));
}
}
}
@ -2092,7 +2160,7 @@ disassemble_bytes (struct disassemble_info * inf,
sym_name = bfd_get_section_name (aux->abfd, sym_sec);
if (sym_name == NULL || *sym_name == '\0')
sym_name = "*unknown*";
printf ("%s", sym_name);
printf ("%s", sanitize_string (sym_name));
}
}
@ -2239,7 +2307,7 @@ disassemble_section (bfd *abfd, asection *section, void *inf)
&& (*rel_pp)->address < rel_offset + addr_offset)
++rel_pp;
printf (_("\nDisassembly of section %s:\n"), section->name);
printf (_("\nDisassembly of section %s:\n"), sanitize_string (section->name));
/* Find the nearest symbol forwards from our current position. */
paux->require_sec = TRUE;
@ -2547,7 +2615,8 @@ load_specific_debug_section (enum dwarf_section_display_enum debug,
section->start = NULL;
free_debug_section (debug);
printf (_("\nSection '%s' has an invalid size: %#llx.\n"),
section->name, (unsigned long long) section->size);
sanitize_string (section->name),
(unsigned long long) section->size);
return FALSE;
}
section->start = contents = malloc (amt);
@ -2556,7 +2625,7 @@ load_specific_debug_section (enum dwarf_section_display_enum debug,
{
free_debug_section (debug);
printf (_("\nCan't get contents for section '%s'.\n"),
section->name);
sanitize_string (section->name));
return FALSE;
}
/* Ensure any string section has a terminating NUL. */
@ -2578,7 +2647,7 @@ load_specific_debug_section (enum dwarf_section_display_enum debug,
{
free_debug_section (debug);
printf (_("\nCan't get contents for section '%s'.\n"),
section->name);
sanitize_string (section->name));
return FALSE;
}
@ -2834,7 +2903,8 @@ read_section_stabs (bfd *abfd, const char *sect_name, bfd_size_type *size_ptr)
stabsect = bfd_get_section_by_name (abfd, sect_name);
if (stabsect == NULL)
{
printf (_("No %s section present\n\n"), sect_name);
printf (_("No %s section present\n\n"),
sanitize_string (sect_name));
return FALSE;
}
@ -2884,7 +2954,7 @@ print_section_stabs (bfd *abfd,
stabp = stabs;
stabs_end = stabp + stab_size;
printf (_("Contents of %s section:\n\n"), stabsect_name);
printf (_("Contents of %s section:\n\n"), sanitize_string (stabsect_name));
printf ("Symnum n_type n_othr n_desc n_value n_strx String\n");
/* Loop through all symbols and print them.
@ -2910,7 +2980,7 @@ print_section_stabs (bfd *abfd,
again (makes consistent formatting for tools like awk). */
name = bfd_get_stab_name (type);
if (name != NULL)
printf ("%-6s", name);
printf ("%-6s", sanitize_string (name));
else if (type == N_UNDF)
printf ("HdrSym");
else
@ -2934,7 +3004,8 @@ print_section_stabs (bfd *abfd,
/* Using the (possibly updated) string table offset, print the
string (if any) associated with this symbol. */
if (amt < stabstr_size)
/* PR 17512: file: 079-79389-0.001:0.1. */
/* PR 17512: file: 079-79389-0.001:0.1.
FIXME: May need to sanitize this string before displaying. */
printf (" %.*s", (int)(stabstr_size - amt), strtab + amt);
else
printf (" *");
@ -3147,7 +3218,7 @@ dump_section (bfd *abfd, asection *section, void *dummy ATTRIBUTE_UNUSED)
if (start_offset >= stop_offset)
return;
printf (_("Contents of section %s:"), section->name);
printf (_("Contents of section %s:"), sanitize_string (section->name));
if (display_file_offsets)
printf (_(" (Starting at file offset: 0x%lx)"),
(unsigned long) (section->filepos + start_offset));
@ -3361,7 +3432,7 @@ dump_reloc_set (bfd *abfd, asection *sec, arelent **relpp, long relcount)
&& (last_functionname == NULL
|| strcmp (functionname, last_functionname) != 0))
{
printf ("%s():\n", functionname);
printf ("%s():\n", sanitize_string (functionname));
if (last_functionname != NULL)
free (last_functionname);
last_functionname = xstrdup (functionname);
@ -3375,9 +3446,11 @@ dump_reloc_set (bfd *abfd, asection *sec, arelent **relpp, long relcount)
|| (discriminator != last_discriminator)))
{
if (discriminator > 0)
printf ("%s:%u\n", filename == NULL ? "???" : filename, linenumber);
printf ("%s:%u\n", filename == NULL ? "???" :
sanitize_string (filename), linenumber);
else
printf ("%s:%u (discriminator %u)\n", filename == NULL ? "???" : filename,
printf ("%s:%u (discriminator %u)\n",
filename == NULL ? "???" : sanitize_string (filename),
linenumber, discriminator);
last_line = linenumber;
last_discriminator = discriminator;
@ -3447,7 +3520,7 @@ dump_reloc_set (bfd *abfd, asection *sec, arelent **relpp, long relcount)
{
if (section_name == NULL)
section_name = "*unknown*";
printf ("[%s]", section_name);
printf ("[%s]", sanitize_string (section_name));
}
if (q->addend)
@ -3497,7 +3570,7 @@ dump_relocs_in_section (bfd *abfd,
if (relsize < 0)
bfd_fatal (bfd_get_filename (abfd));
printf ("RELOCATION RECORDS FOR [%s]:", section->name);
printf ("RELOCATION RECORDS FOR [%s]:", sanitize_string (section->name));
if (relsize == 0)
{
@ -3533,7 +3606,7 @@ dump_relocs_in_section (bfd *abfd,
if (relcount < 0)
{
printf ("\n");
non_fatal (_("failed to read relocs in: %s"), bfd_get_filename (abfd));
non_fatal (_("failed to read relocs in: %s"), sanitize_string (bfd_get_filename (abfd)));
bfd_fatal (_("error message was"));
}
else if (relcount == 0)
@ -3633,7 +3706,8 @@ dump_bfd (bfd *abfd)
}
if (! dump_debugging_tags && ! suppress_bfd_header)
printf (_("\n%s: file format %s\n"), bfd_get_filename (abfd),
printf (_("\n%s: file format %s\n"),
sanitize_string (bfd_get_filename (abfd)),
abfd->xvec->name);
if (dump_ar_hdrs)
print_arelt_descr (stdout, abfd, TRUE, FALSE);
@ -3788,7 +3862,7 @@ display_any_bfd (bfd *file, int level)
bfd *last_arfile = NULL;
if (level == 0)
printf (_("In archive %s:\n"), bfd_get_filename (file));
printf (_("In archive %s:\n"), sanitize_string (bfd_get_filename (file)));
else if (level > 100)
{
/* Prevent corrupted files from spinning us into an
@ -3797,7 +3871,8 @@ display_any_bfd (bfd *file, int level)
return;
}
else
printf (_("In nested archive %s:\n"), bfd_get_filename (file));
printf (_("In nested archive %s:\n"),
sanitize_string (bfd_get_filename (file)));
for (;;)
{

36
gas/ChangeLog
View File

@ -1,3 +1,39 @@
2019-01-10 Nick Clifton <nickc@redhat.com>
PR 23963
* gas/mips/mips16-branch-absolute-1.d: Adjust for the fact that
control characters are now displayed as escape sequences.
* testsuite/gas/mips/mips16-e.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-delay-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-delay-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d:
Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d:
Likewise.
* testsuite/gas/mips/mipsel16-e.d: Likewise.
* testsuite/gas/mips/mipsr6@msa.d: Likewise.
* testsuite/gas/mips/mipsr6@relax-swap3.d: Likewise.
* testsuite/gas/mips/r6-64-n32.d: Likewise.
* testsuite/gas/mips/r6-64-n64.d: Likewise.
* testsuite/gas/mips/r6-n32.d: Likewise.
* testsuite/gas/mips/r6-n64.d: Likewise.
* testsuite/gas/mips/r6.d: Likewise.
* testsuite/gas/mips/tmips16-e.d: Likewise.
* testsuite/gas/mips/tmipsel16-e.d: Likewise.
* testsuite/gas/mn10300/relax.d: Likewise.
2019-01-09 John Darrington <john@darrington.wattle.id.au>
* testsuite/gas/s12z/jsr.s: New case.

2
gas/testsuite/gas/all/eqv-dot.d
View File

@ -2,7 +2,7 @@
#name: eqv involving dot
# bfin doesn't support 'symbol = expression'
# tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte
#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-*
#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-* mn10300-*-*
.*: .*

10
gas/testsuite/gas/mips/mips16-branch-absolute-1.d
View File

@ -7,14 +7,14 @@
Disassembly of section \.text:
\.\.\.
[0-9a-f]+ <[^>]*> f7ff 101e b 00001000 <foo>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0\001
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0.*
[0-9a-f]+ <[^>]*> f7ff 601e bteqz 00001004 <foo\+0x4>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0\001
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0.*
[0-9a-f]+ <[^>]*> f7ff 611e btnez 00001008 <foo\+0x8>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0\001
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0.*
[0-9a-f]+ <[^>]*> f7ff 221e beqz v0,0000100c <foo\+0xc>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0\001
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0.*
[0-9a-f]+ <[^>]*> f7ff 2a1e bnez v0,00001010 <foo\+0x10>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0\001
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.

6
gas/testsuite/gas/mips/mips16-e.d
View File

@ -16,7 +16,7 @@ SYMBOL TABLE:
0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr)
0+0000000 l d \.gnu\.attributes 0+0000000 (|\.gnu\.attributes)
0+0000002 l \.text 0+0000000 0xf0 l1
0+0000004 l \.text 0+0000000 0xf0 \.L1.1
0+0000004 l \.text 0+0000000 0xf0 \.L1.*1
0+0000000 \*UND\* 0+0000000 g1
@ -24,8 +24,8 @@ RELOCATION RECORDS FOR \[foo\]:
OFFSET [ ]+ TYPE VALUE
0+0000000 R_MIPS_32 l1
0+0000004 R_MIPS_32 l1
0+0000008 R_MIPS_32 \.L1.1
0+000000c R_MIPS_32 \.L1.1
0+0000008 R_MIPS_32 \.L1.*1
0+000000c R_MIPS_32 \.L1.*1
0+0000010 R_MIPS_32 g1
0+0000014 R_MIPS_32 g1

16
gas/testsuite/gas/mips/mips16-pcrel-0.d
View File

@ -23,25 +23,25 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 0a00 la v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 b200 lw v0,0000802c <bar\+0x802c>
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 4a1f addiu v0,32767
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 9a5f lw v0,32767\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f7ff 6a1f li v0,65535
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 4a1e addiu v0,32766
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f7ff 6a1f li v0,65535
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 9a5e lw v0,32766\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

16
gas/testsuite/gas/mips/mips16-pcrel-1.d
View File

@ -23,25 +23,25 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 fe40 dla v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 fc40 ld v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef fd5f daddiu v0,32767
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 3a5b ld v0,32763\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f7ff 6a1f li v0,65535
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef fd5e daddiu v0,32766
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f7ff 6a1f li v0,65535
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 3a5a ld v0,32762\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

8
gas/testsuite/gas/mips/mips16-pcrel-delay-0.d
View File

@ -19,17 +19,17 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> ec00 jr a0
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 4a1d addiu v0,32765
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> e820 jr ra
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 9a5d lw v0,32765\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

8
gas/testsuite/gas/mips/mips16-pcrel-delay-1.d
View File

@ -24,17 +24,17 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 1800 0000 jal 00000000 <bar>
[ ]*[0-9a-f]+: R_MIPS16_26 bat
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 4a1b addiu v0,32763
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 1c00 0000 jalx 00000000 <bar>
[ ]*[0-9a-f]+: R_MIPS16_26 bax
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f7ef 9a5b lw v0,32763\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

16
gas/testsuite/gas/mips/mips16-pcrel-n32-0.d
View File

@ -24,25 +24,25 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 0a00 la v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 b200 lw v0,0000802c <bar\+0x802c>
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

16
gas/testsuite/gas/mips/mips16-pcrel-n32-1.d
View File

@ -24,25 +24,25 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 fe40 dla v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 fc40 ld v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7ffb
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7ffb
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8006
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8006
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

16
gas/testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d
View File

@ -24,39 +24,39 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 0a00 la v0,0000000000008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 b200 lw v0,000000000000802c <bar\+0x802c>
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> 6500 nop

16
gas/testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d
View File

@ -24,39 +24,39 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 fe40 dla v0,0000000000008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 fc40 ld v0,0000000000008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f000 6a00 li v0,0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[0-9a-f]+ <[^>]*> f400 3240 sll v0,16
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[0-9a-f]+ <[^>]*> 6500 nop

16
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-0.d
View File

@ -24,21 +24,21 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 0a00 la v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 b200 lw v0,0000802c <bar\+0x802c>
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 4a1f addiu v0,32767
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 9a5f lw v0,32767\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 4a1e addiu v0,32766
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 9a5e lw v0,32766\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

16
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-1.d
View File

@ -24,27 +24,27 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 fe40 dla v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 fc40 ld v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef fd5f daddiu v0,32767
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 3a5b ld v0,32763\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef fd5e daddiu v0,32766
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f7ff 6a3f lui v0,0xffff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 3a5a ld v0,32762\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop

8
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d
View File

@ -20,15 +20,15 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> ec00 jr a0
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 4a1d addiu v0,32765
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> e820 jr ra
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 9a5d lw v0,32765\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

8
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d
View File

@ -25,15 +25,15 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 1800 0000 jal 00000000 <bar>
[ ]*[0-9a-f]+: R_MIPS16_26 bat
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 4a1b addiu v0,32763
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 1c00 0000 jalx 00000000 <bar>
[ ]*[0-9a-f]+: R_MIPS16_26 bax
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*
[0-9a-f]+ <[^>]*> f7ef 9a5b lw v0,32763\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

16
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d
View File

@ -24,21 +24,21 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 0a00 la v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 b200 lw v0,0000802c <bar\+0x802c>
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.
\.\.\.

16
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d
View File

@ -24,27 +24,27 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 fe40 dla v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 fc40 ld v0,00008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7ffb
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7ffb
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8006
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8006
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop

16
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d
View File

@ -24,35 +24,35 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 0a00 la v0,0000000000008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 b200 lw v0,000000000000802c <bar\+0x802c>
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> 6500 nop

16
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d
View File

@ -24,41 +24,41 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f010 fe40 dla v0,0000000000008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f010 fc40 ld v0,0000000000008028 <bar\+0x8028>
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7ffb
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> f000 fd40 daddiu v0,0
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> 6500 nop
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[0-9a-f]+ <[^>]*> f000 3a40 ld v0,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8006
[ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8006
[0-9a-f]+ <[^>]*> 6500 nop

6
gas/testsuite/gas/mips/mipsel16-e.d
View File

@ -17,7 +17,7 @@ SYMBOL TABLE:
0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr)
0+0000000 l d \.gnu\.attributes 0+0000000 (|\.gnu\.attributes)
0+0000002 l \.text 0+0000000 0xf0 l1
0+0000004 l \.text 0+0000000 0xf0 \.L1.1
0+0000004 l \.text 0+0000000 0xf0 \.L1.*1
0+0000000 \*UND\* 0+0000000 g1
@ -25,8 +25,8 @@ RELOCATION RECORDS FOR \[foo\]:
OFFSET [ ]+ TYPE VALUE
0+0000000 R_MIPS_32 l1
0+0000004 R_MIPS_32 l1
0+0000008 R_MIPS_32 \.L1.1
0+000000c R_MIPS_32 \.L1.1
0+0000008 R_MIPS_32 \.L1.*1
0+000000c R_MIPS_32 \.L1.*1
0+0000010 R_MIPS_32 g1
0+0000014 R_MIPS_32 g1

60
gas/testsuite/gas/mips/mipsr6@msa.d
View File

@ -492,25 +492,25 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 7a0007c2 shf\.w \$w31,\$w0,0x0
[0-9a-f]+ <[^>]*> 7aff1042 shf\.w \$w1,\$w2,0xff
[0-9a-f]+ <[^>]*> 45e38000 bnz\.v \$w3,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 45e47fff bnz\.v \$w4,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 45e5ffff bnz\.v \$w5,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.1
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*1
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 45e6ffff bnz\.v \$w6,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 45678000 bz\.v \$w7,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 45687fff bz\.v \$w8,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 4569ffff bz\.v \$w9,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.2
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*2
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 456affff bz\.v \$w10,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
@ -555,97 +555,97 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 797841d9 insve\.d \$w7\[0\],\$w8\[0\]
[0-9a-f]+ <[^>]*> 79795259 insve\.d \$w9\[1\],\$w10\[0\]
[0-9a-f]+ <[^>]*> 478b8000 bnz\.b \$w11,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 478c7fff bnz\.b \$w12,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 478dffff bnz\.b \$w13,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.3
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*3
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 478effff bnz\.b \$w14,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47af8000 bnz\.h \$w15,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47b07fff bnz\.h \$w16,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47b1ffff bnz\.h \$w17,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.4
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*4
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47b2ffff bnz\.h \$w18,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47d38000 bnz\.w \$w19,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47d47fff bnz\.w \$w20,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47d5ffff bnz\.w \$w21,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.5
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*5
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47d6ffff bnz\.w \$w22,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47f78000 bnz\.d \$w23,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47f87fff bnz\.d \$w24,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47f9ffff bnz\.d \$w25,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.6
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*6
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47faffff bnz\.d \$w26,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 471b8000 bz\.b \$w27,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 471c7fff bz\.b \$w28,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 471dffff bz\.b \$w29,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.7
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*7
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 471effff bz\.b \$w30,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 473f8000 bz\.h \$w31,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47207fff bz\.h \$w0,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 4721ffff bz\.h \$w1,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.8
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*8
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 4722ffff bz\.h \$w2,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47438000 bz\.w \$w3,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47447fff bz\.w \$w4,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 4745ffff bz\.w \$w5,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.9
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*9
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 4746ffff bz\.w \$w6,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47678000 bz\.d \$w7,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 47687fff bz\.d \$w8,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.
[ ]*[0-9a-f]+: .*R_MIPS_PC16 L0.*
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 4769ffff bz\.d \$w9,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.10
[ ]*[0-9a-f]+: .*R_MIPS_PC16 .L1.*10
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 476affff bz\.d \$w10,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 external_label

2
gas/testsuite/gas/mips/mipsr6@relax-swap3.d
View File

@ -17,6 +17,6 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 24420000 addiu v0,v0,0
[ ]*[0-9a-f]+: R_MIPS_LO16 bar
[0-9a-f]+ <[^>]*> 1060ffff beqz v1,[0-9a-f]+ <[^>]*>
[ ]*[0-9a-f]+: R_MIPS_PC16 .L.1
[ ]*[0-9a-f]+: R_MIPS_PC16 .L.*1
[0-9a-f]+ <[^>]*> 00000000 nop
\.\.\.

18
gas/testsuite/gas/mips/r6-64-n32.d
View File

@ -37,26 +37,26 @@ Disassembly of section .text:
0+0068 <[^>]*> 0466ffff dahi v1,v1,0xffff
0+006c <[^>]*> 047effff dati v1,v1,0xffff
0+0070 <[^>]*> ec900000 lwupc a0,00000070 <[^>]*>
[ ]*70: R_MIPS_PC19_S2 \.L1.1
[ ]*70: R_MIPS_PC19_S2 \.L1.*1
0+0074 <[^>]*> ec900000 lwupc a0,00000074 <[^>]*>
[ ]*74: R_MIPS_PC19_S2 L0.-0x100000
[ ]*74: R_MIPS_PC19_S2 L0.*-0x100000
0+0078 <[^>]*> ec900000 lwupc a0,00000078 <[^>]*>
[ ]*78: R_MIPS_PC19_S2 L0.+0xffffc
[ ]*78: R_MIPS_PC19_S2 L0.*\+0xffffc
0+007c <[^>]*> ec940000 lwupc a0,fff0007c <[^>]*>
0+0080 <[^>]*> ec93ffff lwupc a0,0010007c <[^>]*>
0+0084 <[^>]*> ec980000 ldpc a0,00000080 <[^>]*>
[ ]*84: R_MIPS_PC18_S3 \.L1.1
[ ]*84: R_MIPS_PC18_S3 \.L1.*1
0+0088 <[^>]*> ec980000 ldpc a0,00000088 <[^>]*>
[ ]*88: R_MIPS_PC18_S3 \.L1.1
[ ]*88: R_MIPS_PC18_S3 \.L1.*1
0+008c <[^>]*> 00000000 nop
0+0090 <[^>]*> ec980000 ldpc a0,00000090 <[^>]*>
[ ]*90: R_MIPS_PC18_S3 \.L3.1-0x100000
[ ]*90: R_MIPS_PC18_S3 \.L3.*1-0x100000
0+0094 <[^>]*> ec980000 ldpc a0,00000090 <[^>]*>
[ ]*94: R_MIPS_PC18_S3 \.L3.1-0x100000
[ ]*94: R_MIPS_PC18_S3 \.L3.*1-0x100000
0+0098 <[^>]*> ec980000 ldpc a0,00000098 <[^>]*>
[ ]*98: R_MIPS_PC18_S3 \.L3.2\+0xffff8
[ ]*98: R_MIPS_PC18_S3 \.L3.*2\+0xffff8
0+009c <[^>]*> ec980000 ldpc a0,00000098 <[^>]*>
[ ]*9c: R_MIPS_PC18_S3 \.L3.2\+0xffff8
[ ]*9c: R_MIPS_PC18_S3 \.L3.*2\+0xffff8
0+00a0 <[^>]*> ec9a0000 ldpc a0,fff000a0 <[^>]*>
0+00a4 <[^>]*> ec9a0000 ldpc a0,fff000a0 <[^>]*>
0+00a8 <[^>]*> ec99ffff ldpc a0,001000a0 <[^>]*>

18
gas/testsuite/gas/mips/r6-64-n64.d
View File

@ -37,42 +37,42 @@ Disassembly of section .text:
0+0068 <[^>]*> 0466ffff dahi v1,v1,0xffff
0+006c <[^>]*> 047effff dati v1,v1,0xffff
0+0070 <[^>]*> ec900000 lwupc a0,0+0000070 <[^>]*>
[ ]*70: R_MIPS_PC19_S2 \.L1.1
[ ]*70: R_MIPS_PC19_S2 \.L1.*1
[ ]*70: R_MIPS_NONE \*ABS\*
[ ]*70: R_MIPS_NONE \*ABS\*
0+0074 <[^>]*> ec900000 lwupc a0,0+0000074 <[^>]*>
[ ]*74: R_MIPS_PC19_S2 L0.-0x100000
[ ]*74: R_MIPS_PC19_S2 L0.*-0x100000
[ ]*74: R_MIPS_NONE \*ABS\*-0x100000
[ ]*74: R_MIPS_NONE \*ABS\*-0x100000
0+0078 <[^>]*> ec900000 lwupc a0,0+0000078 <[^>]*>
[ ]*78: R_MIPS_PC19_S2 L0.\+0xffffc
[ ]*78: R_MIPS_PC19_S2 L0.*\+0xffffc
[ ]*78: R_MIPS_NONE \*ABS\*\+0xffffc
[ ]*78: R_MIPS_NONE \*ABS\*\+0xffffc
0+007c <[^>]*> ec940000 lwupc a0,f+ff0007c <[^>]*>
0+0080 <[^>]*> ec93ffff lwupc a0,0+010007c <[^>]*>
0+0084 <[^>]*> ec980000 ldpc a0,0+0000080 <[^>]*>
[ ]*84: R_MIPS_PC18_S3 .L1.1
[ ]*84: R_MIPS_PC18_S3 .L1.*1
[ ]*84: R_MIPS_NONE \*ABS\*
[ ]*84: R_MIPS_NONE \*ABS\*
0+0088 <[^>]*> ec980000 ldpc a0,0+0000088 <[^>]*>
[ ]*88: R_MIPS_PC18_S3 .L1.1
[ ]*88: R_MIPS_PC18_S3 .L1.*1
[ ]*88: R_MIPS_NONE \*ABS\*
[ ]*88: R_MIPS_NONE \*ABS\*
0+008c <[^>]*> 00000000 nop
0+0090 <[^>]*> ec980000 ldpc a0,0+0000090 <[^>]*>
[ ]*90: R_MIPS_PC18_S3 .L3.1-0x100000
[ ]*90: R_MIPS_PC18_S3 .L3.*1-0x100000
[ ]*90: R_MIPS_NONE \*ABS\*-0x100000
[ ]*90: R_MIPS_NONE \*ABS\*-0x100000
0+0094 <[^>]*> ec980000 ldpc a0,0+0000090 <[^>]*>
[ ]*94: R_MIPS_PC18_S3 .L3.1-0x100000
[ ]*94: R_MIPS_PC18_S3 .L3.*1-0x100000
[ ]*94: R_MIPS_NONE \*ABS\*-0x100000
[ ]*94: R_MIPS_NONE \*ABS\*-0x100000
0+0098 <[^>]*> ec980000 ldpc a0,0+0000098 <[^>]*>
[ ]*98: R_MIPS_PC18_S3 .L3.2\+0xffff8
[ ]*98: R_MIPS_PC18_S3 .L3.*2\+0xffff8
[ ]*98: R_MIPS_NONE \*ABS\*\+0xffff8
[ ]*98: R_MIPS_NONE \*ABS\*\+0xffff8
0+009c <[^>]*> ec980000 ldpc a0,0+0000098 <[^>]*>
[ ]*9c: R_MIPS_PC18_S3 .L3.2\+0xffff8
[ ]*9c: R_MIPS_PC18_S3 .L3.*2\+0xffff8
[ ]*9c: R_MIPS_NONE \*ABS\*\+0xffff8
[ ]*9c: R_MIPS_NONE \*ABS\*\+0xffff8
0+00a0 <[^>]*> ec9a0000 ldpc a0,f+ff000a0 <[^>]*>

172
gas/testsuite/gas/mips/r6-n32.d
View File

@ -57,10 +57,10 @@ Disassembly of section .text:
0+00b8 <[^>]*> 4682081b cmp.sne.s \$f0,\$f1,\$f2
0+00bc <[^>]*> 46a2081b cmp.sne.d \$f0,\$f1,\$f2
0+00c0 <[^>]*> 45200000 bc1eqz \$f0,000000c4 <[^>]*>
[ ]*c0: R_MIPS_PC16 .L1.1-0x4
[ ]*c0: R_MIPS_PC16 .L1.*1-0x4
0+00c4 <[^>]*> 00000000 nop
0+00c8 <[^>]*> 453f0000 bc1eqz \$f31,000000cc <[^>]*>
[ ]*c8: R_MIPS_PC16 .L1.1-0x4
[ ]*c8: R_MIPS_PC16 .L1.*1-0x4
0+00cc <[^>]*> 00000000 nop
0+00d0 <[^>]*> 453f0000 bc1eqz \$f31,000000d4 <[^>]*>
[ ]*d0: R_MIPS_PC16 new-0x4
@ -69,10 +69,10 @@ Disassembly of section .text:
[ ]*d8: R_MIPS_PC16 external_label-0x4
0+00dc <[^>]*> 00000000 nop
0+00e0 <[^>]*> 45a00000 bc1nez \$f0,000000e4 <[^>]*>
[ ]*e0: R_MIPS_PC16 .L1.1-0x4
[ ]*e0: R_MIPS_PC16 .L1.*1-0x4
0+00e4 <[^>]*> 00000000 nop
0+00e8 <[^>]*> 45bf0000 bc1nez \$f31,000000ec <[^>]*>
[ ]*e8: R_MIPS_PC16 .L1.1-0x4
[ ]*e8: R_MIPS_PC16 .L1.*1-0x4
0+00ec <[^>]*> 00000000 nop
0+00f0 <[^>]*> 45bf0000 bc1nez \$f31,000000f4 <[^>]*>
[ ]*f0: R_MIPS_PC16 new-0x4
@ -81,10 +81,10 @@ Disassembly of section .text:
[ ]*f8: R_MIPS_PC16 external_label-0x4
0+00fc <[^>]*> 00000000 nop
0+0100 <[^>]*> 49200000 bc2eqz \$0,00000104 <[^>]*>
[ ]*100: R_MIPS_PC16 .L1.1-0x4
[ ]*100: R_MIPS_PC16 .L1.*1-0x4
0+0104 <[^>]*> 00000000 nop
0+0108 <[^>]*> 493f0000 bc2eqz \$31,0000010c <[^>]*>
[ ]*108: R_MIPS_PC16 .L1.1-0x4
[ ]*108: R_MIPS_PC16 .L1.*1-0x4
0+010c <[^>]*> 00000000 nop
0+0110 <[^>]*> 493f0000 bc2eqz \$31,00000114 <[^>]*>
[ ]*110: R_MIPS_PC16 new-0x4
@ -93,10 +93,10 @@ Disassembly of section .text:
[ ]*118: R_MIPS_PC16 external_label-0x4
0+011c <[^>]*> 00000000 nop
0+0120 <[^>]*> 49a00000 bc2nez \$0,00000124 <[^>]*>
[ ]*120: R_MIPS_PC16 .L1.1-0x4
[ ]*120: R_MIPS_PC16 .L1.*1-0x4
0+0124 <[^>]*> 00000000 nop
0+0128 <[^>]*> 49bf0000 bc2nez \$31,0000012c <[^>]*>
[ ]*128: R_MIPS_PC16 .L1.1-0x4
[ ]*128: R_MIPS_PC16 .L1.*1-0x4
0+012c <[^>]*> 00000000 nop
0+0130 <[^>]*> 49bf0000 bc2nez \$31,00000134 <[^>]*>
[ ]*130: R_MIPS_PC16 new-0x4
@ -170,31 +170,31 @@ Disassembly of section .text:
[ ]*228: R_MIPS_PC16 ext-0x4
0+022c <[^>]*> 00000000 nop
0+0230 <[^>]*> 20820000 bovc a0,v0,00000234 <[^>]*>
[ ]*230: R_MIPS_PC16 L0.-0x20000
[ ]*230: R_MIPS_PC16 L0.*-0x20000
0+0234 <[^>]*> 00000000 nop
0+0238 <[^>]*> 20820000 bovc a0,v0,0000023c <[^>]*>
[ ]*238: R_MIPS_PC16 L0.+0x1fffc
[ ]*238: R_MIPS_PC16 L0.*\+0x1fffc
0+023c <[^>]*> 00000000 nop
0+0240 <[^>]*> 20820000 bovc a0,v0,00000244 <[^>]*>
[ ]*240: R_MIPS_PC16 .L1.2-0x4
[ ]*240: R_MIPS_PC16 .L1.*2-0x4
0+0244 <[^>]*> 00000000 nop
0+0248 <[^>]*> 20420000 bovc v0,v0,0000024c <[^>]*>
[ ]*248: R_MIPS_PC16 ext-0x4
0+024c <[^>]*> 00000000 nop
0+0250 <[^>]*> 20420000 bovc v0,v0,00000254 <[^>]*>
[ ]*250: R_MIPS_PC16 L0.-0x20000
[ ]*250: R_MIPS_PC16 L0.*-0x20000
0+0254 <[^>]*> 00000000 nop
0+0258 <[^>]*> 20020000 beqzalc v0,0000025c <[^>]*>
[ ]*258: R_MIPS_PC16 ext-0x4
0+025c <[^>]*> 00000000 nop
0+0260 <[^>]*> 20020000 beqzalc v0,00000264 <[^>]*>
[ ]*260: R_MIPS_PC16 L0.-0x20000
[ ]*260: R_MIPS_PC16 L0.*-0x20000
0+0264 <[^>]*> 00000000 nop
0+0268 <[^>]*> 20020000 beqzalc v0,0000026c <[^>]*>
[ ]*268: R_MIPS_PC16 L0.+0x1fffc
[ ]*268: R_MIPS_PC16 L0.*\+0x1fffc
0+026c <[^>]*> 00000000 nop
0+0270 <[^>]*> 20020000 beqzalc v0,00000274 <[^>]*>
[ ]*270: R_MIPS_PC16 .L1.2-0x4
[ ]*270: R_MIPS_PC16 .L1.*2-0x4
0+0274 <[^>]*> 00000000 nop
0+0278 <[^>]*> 20430000 beqc v0,v1,0000027c <[^>]*>
[ ]*278: R_MIPS_PC16 ext-0x4
@ -203,13 +203,13 @@ Disassembly of section .text:
[ ]*280: R_MIPS_PC16 ext-0x4
0+0284 <[^>]*> 00000000 nop
0+0288 <[^>]*> 20430000 beqc v0,v1,0000028c <[^>]*>
[ ]*288: R_MIPS_PC16 L0.-0x20000
[ ]*288: R_MIPS_PC16 L0.*-0x20000
0+028c <[^>]*> 00000000 nop
0+0290 <[^>]*> 20430000 beqc v0,v1,00000294 <[^>]*>
[ ]*290: R_MIPS_PC16 L0.+0x1fffc
[ ]*290: R_MIPS_PC16 L0.*\+0x1fffc
0+0294 <[^>]*> 00000000 nop
0+0298 <[^>]*> 20430000 beqc v0,v1,0000029c <[^>]*>
[ ]*298: R_MIPS_PC16 .L1.2-0x4
[ ]*298: R_MIPS_PC16 .L1.*2-0x4
0+029c <[^>]*> 00000000 nop
0+02a0 <[^>]*> 60000000 bnvc zero,zero,000002a4 <[^>]*>
[ ]*2a0: R_MIPS_PC16 ext-0x4
@ -227,31 +227,31 @@ Disassembly of section .text:
[ ]*2c0: R_MIPS_PC16 ext-0x4
0+02c4 <[^>]*> 00000000 nop
0+02c8 <[^>]*> 60820000 bnvc a0,v0,000002cc <[^>]*>
[ ]*2c8: R_MIPS_PC16 L0.-0x20000
[ ]*2c8: R_MIPS_PC16 L0.*-0x20000
0+02cc <[^>]*> 00000000 nop
0+02d0 <[^>]*> 60820000 bnvc a0,v0,000002d4 <[^>]*>
[ ]*2d0: R_MIPS_PC16 L0.+0x1fffc
[ ]*2d0: R_MIPS_PC16 L0.*\+0x1fffc
0+02d4 <[^>]*> 00000000 nop
0+02d8 <[^>]*> 60820000 bnvc a0,v0,000002dc <[^>]*>
[ ]*2d8: R_MIPS_PC16 .L1.2-0x4
[ ]*2d8: R_MIPS_PC16 .L1.*2-0x4
0+02dc <[^>]*> 00000000 nop
0+02e0 <[^>]*> 60420000 bnvc v0,v0,000002e4 <[^>]*>
[ ]*2e0: R_MIPS_PC16 ext-0x4
0+02e4 <[^>]*> 00000000 nop
0+02e8 <[^>]*> 60420000 bnvc v0,v0,000002ec <[^>]*>
[ ]*2e8: R_MIPS_PC16 L0.-0x20000
[ ]*2e8: R_MIPS_PC16 L0.*-0x20000
0+02ec <[^>]*> 00000000 nop
0+02f0 <[^>]*> 60020000 bnezalc v0,000002f4 <[^>]*>
[ ]*2f0: R_MIPS_PC16 ext-0x4
0+02f4 <[^>]*> 00000000 nop
0+02f8 <[^>]*> 60020000 bnezalc v0,000002fc <[^>]*>
[ ]*2f8: R_MIPS_PC16 L0.-0x20000
[ ]*2f8: R_MIPS_PC16 L0.*-0x20000
0+02fc <[^>]*> 00000000 nop
0+0300 <[^>]*> 60020000 bnezalc v0,00000304 <[^>]*>
[ ]*300: R_MIPS_PC16 L0.+0x1fffc
[ ]*300: R_MIPS_PC16 L0.*\+0x1fffc
0+0304 <[^>]*> 00000000 nop
0+0308 <[^>]*> 60020000 bnezalc v0,0000030c <[^>]*>
[ ]*308: R_MIPS_PC16 .L1.2-0x4
[ ]*308: R_MIPS_PC16 .L1.*2-0x4
0+030c <[^>]*> 00000000 nop
0+0310 <[^>]*> 60430000 bnec v0,v1,00000314 <[^>]*>
[ ]*310: R_MIPS_PC16 ext-0x4
@ -260,197 +260,197 @@ Disassembly of section .text:
[ ]*318: R_MIPS_PC16 ext-0x4
0+031c <[^>]*> 00000000 nop
0+0320 <[^>]*> 60430000 bnec v0,v1,00000324 <[^>]*>
[ ]*320: R_MIPS_PC16 L0.-0x20000
[ ]*320: R_MIPS_PC16 L0.*-0x20000
0+0324 <[^>]*> 00000000 nop
0+0328 <[^>]*> 60430000 bnec v0,v1,0000032c <[^>]*>
[ ]*328: R_MIPS_PC16 L0.+0x1fffc
[ ]*328: R_MIPS_PC16 L0.*\+0x1fffc
0+032c <[^>]*> 00000000 nop
0+0330 <[^>]*> 60430000 bnec v0,v1,00000334 <[^>]*>
[ ]*330: R_MIPS_PC16 .L1.2-0x4
[ ]*330: R_MIPS_PC16 .L1.*2-0x4
0+0334 <[^>]*> 00000000 nop
0+0338 <[^>]*> 58020000 blezc v0,0000033c <[^>]*>
[ ]*338: R_MIPS_PC16 ext-0x4
0+033c <[^>]*> 00000000 nop
0+0340 <[^>]*> 58020000 blezc v0,00000344 <[^>]*>
[ ]*340: R_MIPS_PC16 L0.-0x20000
[ ]*340: R_MIPS_PC16 L0.*-0x20000
0+0344 <[^>]*> 00000000 nop
0+0348 <[^>]*> 58020000 blezc v0,0000034c <[^>]*>
[ ]*348: R_MIPS_PC16 L0.+0x1fffc
[ ]*348: R_MIPS_PC16 L0.*\+0x1fffc
0+034c <[^>]*> 00000000 nop
0+0350 <[^>]*> 58020000 blezc v0,00000354 <[^>]*>
[ ]*350: R_MIPS_PC16 .L1.2-0x4
[ ]*350: R_MIPS_PC16 .L1.*2-0x4
0+0354 <[^>]*> 00000000 nop
0+0358 <[^>]*> 58420000 bgezc v0,0000035c <[^>]*>
[ ]*358: R_MIPS_PC16 ext-0x4
0+035c <[^>]*> 00000000 nop
0+0360 <[^>]*> 58420000 bgezc v0,00000364 <[^>]*>
[ ]*360: R_MIPS_PC16 L0.-0x20000
[ ]*360: R_MIPS_PC16 L0.*-0x20000
0+0364 <[^>]*> 00000000 nop
0+0368 <[^>]*> 58420000 bgezc v0,0000036c <[^>]*>
[ ]*368: R_MIPS_PC16 L0.+0x1fffc
[ ]*368: R_MIPS_PC16 L0.*\+0x1fffc
0+036c <[^>]*> 00000000 nop
0+0370 <[^>]*> 58420000 bgezc v0,00000374 <[^>]*>
[ ]*370: R_MIPS_PC16 .L1.2-0x4
[ ]*370: R_MIPS_PC16 .L1.*2-0x4
0+0374 <[^>]*> 00000000 nop
0+0378 <[^>]*> 58430000 bgec v0,v1,0000037c <[^>]*>
[ ]*378: R_MIPS_PC16 ext-0x4
0+037c <[^>]*> 00000000 nop
0+0380 <[^>]*> 58430000 bgec v0,v1,00000384 <[^>]*>
[ ]*380: R_MIPS_PC16 L0.-0x20000
[ ]*380: R_MIPS_PC16 L0.*-0x20000
0+0384 <[^>]*> 00000000 nop
0+0388 <[^>]*> 58430000 bgec v0,v1,0000038c <[^>]*>
[ ]*388: R_MIPS_PC16 L0.+0x1fffc
[ ]*388: R_MIPS_PC16 L0.*\+0x1fffc
0+038c <[^>]*> 00000000 nop
0+0390 <[^>]*> 58430000 bgec v0,v1,00000394 <[^>]*>
[ ]*390: R_MIPS_PC16 .L1.2-0x4
[ ]*390: R_MIPS_PC16 .L1.*2-0x4
0+0394 <[^>]*> 00000000 nop
0+0398 <[^>]*> 58620000 bgec v1,v0,0000039c <[^>]*>
[ ]*398: R_MIPS_PC16 .L1.2-0x4
[ ]*398: R_MIPS_PC16 .L1.*2-0x4
0+039c <[^>]*> 00000000 nop
0+03a0 <[^>]*> 5c020000 bgtzc v0,000003a4 <[^>]*>
[ ]*3a0: R_MIPS_PC16 ext-0x4
0+03a4 <[^>]*> 00000000 nop
0+03a8 <[^>]*> 5c020000 bgtzc v0,000003ac <[^>]*>
[ ]*3a8: R_MIPS_PC16 L0.-0x20000
[ ]*3a8: R_MIPS_PC16 L0.*-0x20000
0+03ac <[^>]*> 00000000 nop
0+03b0 <[^>]*> 5c020000 bgtzc v0,000003b4 <[^>]*>
[ ]*3b0: R_MIPS_PC16 L0.+0x1fffc
[ ]*3b0: R_MIPS_PC16 L0.*\+0x1fffc
0+03b4 <[^>]*> 00000000 nop
0+03b8 <[^>]*> 5c020000 bgtzc v0,000003bc <[^>]*>
[ ]*3b8: R_MIPS_PC16 .L1.2-0x4
[ ]*3b8: R_MIPS_PC16 .L1.*2-0x4
0+03bc <[^>]*> 00000000 nop
0+03c0 <[^>]*> 5c420000 bltzc v0,000003c4 <[^>]*>
[ ]*3c0: R_MIPS_PC16 ext-0x4
0+03c4 <[^>]*> 00000000 nop
0+03c8 <[^>]*> 5c420000 bltzc v0,000003cc <[^>]*>
[ ]*3c8: R_MIPS_PC16 L0.-0x20000
[ ]*3c8: R_MIPS_PC16 L0.*-0x20000
0+03cc <[^>]*> 00000000 nop
0+03d0 <[^>]*> 5c420000 bltzc v0,000003d4 <[^>]*>
[ ]*3d0: R_MIPS_PC16 L0.+0x1fffc
[ ]*3d0: R_MIPS_PC16 L0.*\+0x1fffc
0+03d4 <[^>]*> 00000000 nop
0+03d8 <[^>]*> 5c420000 bltzc v0,000003dc <[^>]*>
[ ]*3d8: R_MIPS_PC16 .L1.2-0x4
[ ]*3d8: R_MIPS_PC16 .L1.*2-0x4
0+03dc <[^>]*> 00000000 nop
0+03e0 <[^>]*> 5c430000 bltc v0,v1,000003e4 <[^>]*>
[ ]*3e0: R_MIPS_PC16 ext-0x4
0+03e4 <[^>]*> 00000000 nop
0+03e8 <[^>]*> 5c430000 bltc v0,v1,000003ec <[^>]*>
[ ]*3e8: R_MIPS_PC16 L0.-0x20000
[ ]*3e8: R_MIPS_PC16 L0.*-0x20000
0+03ec <[^>]*> 00000000 nop
0+03f0 <[^>]*> 5c430000 bltc v0,v1,000003f4 <[^>]*>
[ ]*3f0: R_MIPS_PC16 L0.+0x1fffc
[ ]*3f0: R_MIPS_PC16 L0.*\+0x1fffc
0+03f4 <[^>]*> 00000000 nop
0+03f8 <[^>]*> 5c430000 bltc v0,v1,000003fc <[^>]*>
[ ]*3f8: R_MIPS_PC16 .L1.2-0x4
[ ]*3f8: R_MIPS_PC16 .L1.*2-0x4
0+03fc <[^>]*> 00000000 nop
0+0400 <[^>]*> 5c620000 bltc v1,v0,00000404 <[^>]*>
[ ]*400: R_MIPS_PC16 .L1.2-0x4
[ ]*400: R_MIPS_PC16 .L1.*2-0x4
0+0404 <[^>]*> 00000000 nop
0+0408 <[^>]*> 18020000 blezalc v0,0000040c <[^>]*>
[ ]*408: R_MIPS_PC16 ext-0x4
0+040c <[^>]*> 00000000 nop
0+0410 <[^>]*> 18020000 blezalc v0,00000414 <[^>]*>
[ ]*410: R_MIPS_PC16 L0.-0x20000
[ ]*410: R_MIPS_PC16 L0.*-0x20000
0+0414 <[^>]*> 00000000 nop
0+0418 <[^>]*> 18020000 blezalc v0,0000041c <[^>]*>
[ ]*418: R_MIPS_PC16 L0.+0x1fffc
[ ]*418: R_MIPS_PC16 L0.*\+0x1fffc
0+041c <[^>]*> 00000000 nop
0+0420 <[^>]*> 18020000 blezalc v0,00000424 <[^>]*>
[ ]*420: R_MIPS_PC16 .L1.2-0x4
[ ]*420: R_MIPS_PC16 .L1.*2-0x4
0+0424 <[^>]*> 00000000 nop
0+0428 <[^>]*> 18420000 bgezalc v0,0000042c <[^>]*>
[ ]*428: R_MIPS_PC16 ext-0x4
0+042c <[^>]*> 00000000 nop
0+0430 <[^>]*> 18420000 bgezalc v0,00000434 <[^>]*>
[ ]*430: R_MIPS_PC16 L0.-0x20000
[ ]*430: R_MIPS_PC16 L0.*-0x20000
0+0434 <[^>]*> 00000000 nop
0+0438 <[^>]*> 18420000 bgezalc v0,0000043c <[^>]*>
[ ]*438: R_MIPS_PC16 L0.+0x1fffc
[ ]*438: R_MIPS_PC16 L0.*\+0x1fffc
0+043c <[^>]*> 00000000 nop
0+0440 <[^>]*> 18420000 bgezalc v0,00000444 <[^>]*>
[ ]*440: R_MIPS_PC16 .L1.2-0x4
[ ]*440: R_MIPS_PC16 .L1.*2-0x4
0+0444 <[^>]*> 00000000 nop
0+0448 <[^>]*> 18430000 bgeuc v0,v1,0000044c <[^>]*>
[ ]*448: R_MIPS_PC16 ext-0x4
0+044c <[^>]*> 00000000 nop
0+0450 <[^>]*> 18430000 bgeuc v0,v1,00000454 <[^>]*>
[ ]*450: R_MIPS_PC16 L0.-0x20000
[ ]*450: R_MIPS_PC16 L0.*-0x20000
0+0454 <[^>]*> 00000000 nop
0+0458 <[^>]*> 18430000 bgeuc v0,v1,0000045c <[^>]*>
[ ]*458: R_MIPS_PC16 L0.+0x1fffc
[ ]*458: R_MIPS_PC16 L0.*\+0x1fffc
0+045c <[^>]*> 00000000 nop
0+0460 <[^>]*> 18430000 bgeuc v0,v1,00000464 <[^>]*>
[ ]*460: R_MIPS_PC16 .L1.2-0x4
[ ]*460: R_MIPS_PC16 .L1.*2-0x4
0+0464 <[^>]*> 00000000 nop
0+0468 <[^>]*> 18620000 bgeuc v1,v0,0000046c <[^>]*>
[ ]*468: R_MIPS_PC16 .L1.2-0x4
[ ]*468: R_MIPS_PC16 .L1.*2-0x4
0+046c <[^>]*> 00000000 nop
0+0470 <[^>]*> 1c020000 bgtzalc v0,00000474 <[^>]*>
[ ]*470: R_MIPS_PC16 ext-0x4
0+0474 <[^>]*> 00000000 nop
0+0478 <[^>]*> 1c020000 bgtzalc v0,0000047c <[^>]*>
[ ]*478: R_MIPS_PC16 L0.-0x20000
[ ]*478: R_MIPS_PC16 L0.*-0x20000
0+047c <[^>]*> 00000000 nop
0+0480 <[^>]*> 1c020000 bgtzalc v0,00000484 <[^>]*>
[ ]*480: R_MIPS_PC16 L0.+0x1fffc
[ ]*480: R_MIPS_PC16 L0.*\+0x1fffc
0+0484 <[^>]*> 00000000 nop
0+0488 <[^>]*> 1c020000 bgtzalc v0,0000048c <[^>]*>
[ ]*488: R_MIPS_PC16 .L1.2-0x4
[ ]*488: R_MIPS_PC16 .L1.*2-0x4
0+048c <[^>]*> 00000000 nop
0+0490 <[^>]*> 1c420000 bltzalc v0,00000494 <[^>]*>
[ ]*490: R_MIPS_PC16 ext-0x4
0+0494 <[^>]*> 00000000 nop
0+0498 <[^>]*> 1c420000 bltzalc v0,0000049c <[^>]*>
[ ]*498: R_MIPS_PC16 L0.-0x20000
[ ]*498: R_MIPS_PC16 L0.*-0x20000
0+049c <[^>]*> 00000000 nop
0+04a0 <[^>]*> 1c420000 bltzalc v0,000004a4 <[^>]*>
[ ]*4a0: R_MIPS_PC16 L0.+0x1fffc
[ ]*4a0: R_MIPS_PC16 L0.*\+0x1fffc
0+04a4 <[^>]*> 00000000 nop
0+04a8 <[^>]*> 1c420000 bltzalc v0,000004ac <[^>]*>
[ ]*4a8: R_MIPS_PC16 .L1.2-0x4
[ ]*4a8: R_MIPS_PC16 .L1.*2-0x4
0+04ac <[^>]*> 00000000 nop
0+04b0 <[^>]*> 1c430000 bltuc v0,v1,000004b4 <[^>]*>
[ ]*4b0: R_MIPS_PC16 ext-0x4
0+04b4 <[^>]*> 00000000 nop
0+04b8 <[^>]*> 1c430000 bltuc v0,v1,000004bc <[^>]*>
[ ]*4b8: R_MIPS_PC16 L0.-0x20000
[ ]*4b8: R_MIPS_PC16 L0.*-0x20000
0+04bc <[^>]*> 00000000 nop
0+04c0 <[^>]*> 1c430000 bltuc v0,v1,000004c4 <[^>]*>
[ ]*4c0: R_MIPS_PC16 L0.+0x1fffc
[ ]*4c0: R_MIPS_PC16 L0.*\+0x1fffc
0+04c4 <[^>]*> 00000000 nop
0+04c8 <[^>]*> 1c430000 bltuc v0,v1,000004cc <[^>]*>
[ ]*4c8: R_MIPS_PC16 .L1.2-0x4
[ ]*4c8: R_MIPS_PC16 .L1.*2-0x4
0+04cc <[^>]*> 00000000 nop
0+04d0 <[^>]*> 1c620000 bltuc v1,v0,000004d4 <[^>]*>
[ ]*4d0: R_MIPS_PC16 .L1.2-0x4
[ ]*4d0: R_MIPS_PC16 .L1.*2-0x4
0+04d4 <[^>]*> 00000000 nop
0+04d8 <[^>]*> c8000000 bc 000004dc <[^>]*>
[ ]*4d8: R_MIPS_PC26_S2 ext-0x4
0+04dc <[^>]*> c8000000 bc 000004e0 <[^>]*>
[ ]*4dc: R_MIPS_PC26_S2 L0.-0x8000000
[ ]*4dc: R_MIPS_PC26_S2 L0.*-0x8000000
0+04e0 <[^>]*> c8000000 bc 000004e4 <[^>]*>
[ ]*4e0: R_MIPS_PC26_S2 L0.+0x7fffffc
[ ]*4e0: R_MIPS_PC26_S2 L0.*\+0x7fffffc
0+04e4 <[^>]*> c8000000 bc 000004e8 <[^>]*>
[ ]*4e4: R_MIPS_PC26_S2 .L1.2-0x4
[ ]*4e4: R_MIPS_PC26_S2 .L1.*2-0x4
0+04e8 <[^>]*> e8000000 balc 000004ec <[^>]*>
[ ]*4e8: R_MIPS_PC26_S2 ext-0x4
0+04ec <[^>]*> e8000000 balc 000004f0 <[^>]*>
[ ]*4ec: R_MIPS_PC26_S2 L0.-0x8000000
[ ]*4ec: R_MIPS_PC26_S2 L0.*-0x8000000
0+04f0 <[^>]*> e8000000 balc 000004f4 <[^>]*>
[ ]*4f0: R_MIPS_PC26_S2 L0.+0x7fffffc
[ ]*4f0: R_MIPS_PC26_S2 L0.*\+0x7fffffc
0+04f4 <[^>]*> e8000000 balc 000004f8 <[^>]*>
[ ]*4f4: R_MIPS_PC26_S2 .L1.2-0x4
[ ]*4f4: R_MIPS_PC26_S2 .L1.*2-0x4
0+04f8 <[^>]*> d8400000 beqzc v0,000004fc <[^>]*>
[ ]*4f8: R_MIPS_PC21_S2 ext-0x4
0+04fc <[^>]*> 00000000 nop
0+0500 <[^>]*> d8400000 beqzc v0,00000504 <[^>]*>
[ ]*500: R_MIPS_PC21_S2 L0.-0x400000
[ ]*500: R_MIPS_PC21_S2 L0.*-0x400000
0+0504 <[^>]*> 00000000 nop
0+0508 <[^>]*> d8400000 beqzc v0,0000050c <[^>]*>
[ ]*508: R_MIPS_PC21_S2 L0.+0x3ffffc
[ ]*508: R_MIPS_PC21_S2 L0.*\+0x3ffffc
0+050c <[^>]*> 00000000 nop
0+0510 <[^>]*> d8400000 beqzc v0,00000514 <[^>]*>
[ ]*510: R_MIPS_PC21_S2 .L1.2-0x4
[ ]*510: R_MIPS_PC21_S2 .L1.*2-0x4
0+0514 <[^>]*> 00000000 nop
0+0518 <[^>]*> d8038000 jic v1,-32768
0+051c <[^>]*> d8037fff jic v1,32767
@ -459,33 +459,33 @@ Disassembly of section .text:
[ ]*524: R_MIPS_PC21_S2 ext-0x4
0+0528 <[^>]*> 00000000 nop
0+052c <[^>]*> f8400000 bnezc v0,00000530 <[^>]*>
[ ]*52c: R_MIPS_PC21_S2 L0.-0x400000
[ ]*52c: R_MIPS_PC21_S2 L0.*-0x400000
0+0530 <[^>]*> 00000000 nop
0+0534 <[^>]*> f8400000 bnezc v0,00000538 <[^>]*>
[ ]*534: R_MIPS_PC21_S2 L0.+0x3ffffc
[ ]*534: R_MIPS_PC21_S2 L0.*\+0x3ffffc
0+0538 <[^>]*> 00000000 nop
0+053c <[^>]*> f8400000 bnezc v0,00000540 <[^>]*>
[ ]*53c: R_MIPS_PC21_S2 .L1.2-0x4
[ ]*53c: R_MIPS_PC21_S2 .L1.*2-0x4
0+0540 <[^>]*> 00000000 nop
0+0544 <[^>]*> f8038000 jialc v1,-32768
0+0548 <[^>]*> f8037fff jialc v1,32767
0+054c <[^>]*> 3c43ffff aui v1,v0,0xffff
0+0550 <[^>]*> ec600000 lapc v1,00000550 <[^>]*>
[ ]*550: R_MIPS_PC19_S2 .L1.2
[ ]*550: R_MIPS_PC19_S2 .L1.*2
0+0554 <[^>]*> ec800000 lapc a0,00000554 <[^>]*>
[ ]*554: R_MIPS_PC19_S2 L0.-0x100000
[ ]*554: R_MIPS_PC19_S2 L0.*-0x100000
0+0558 <[^>]*> ec800000 lapc a0,00000558 <[^>]*>
[ ]*558: R_MIPS_PC19_S2 L0.+0xffffc
[ ]*558: R_MIPS_PC19_S2 L0.*\+0xffffc
0+055c <[^>]*> ec840000 lapc a0,fff0055c <[^>]*>
0+0560 <[^>]*> ec83ffff lapc a0,0010055c <[^>]*>
0+0564 <[^>]*> ec7effff auipc v1,0xffff
0+0568 <[^>]*> ec7fffff aluipc v1,0xffff
0+056c <[^>]*> ec880000 lwpc a0,0000056c <[^>]*>
[ ]*56c: R_MIPS_PC19_S2 .L1.2
[ ]*56c: R_MIPS_PC19_S2 .L1.*2
0+0570 <[^>]*> ec880000 lwpc a0,00000570 <[^>]*>
[ ]*570: R_MIPS_PC19_S2 L0.-0x100000
[ ]*570: R_MIPS_PC19_S2 L0.*-0x100000
0+0574 <[^>]*> ec880000 lwpc a0,00000574 <[^>]*>
[ ]*574: R_MIPS_PC19_S2 L0.+0xffffc
[ ]*574: R_MIPS_PC19_S2 L0.*\+0xffffc
0+0578 <[^>]*> ec8c0000 lwpc a0,fff00578 <[^>]*>
0+057c <[^>]*> ec8bffff lwpc a0,00100578 <[^>]*>
0+0580 <[^>]*> 00000000 nop

172
gas/testsuite/gas/mips/r6-n64.d
View File

@ -57,12 +57,12 @@ Disassembly of section .text:
0+00b8 <[^>]*> 4682081b cmp.sne.s \$f0,\$f1,\$f2
0+00bc <[^>]*> 46a2081b cmp.sne.d \$f0,\$f1,\$f2
0+00c0 <[^>]*> 45200000 bc1eqz \$f0,0+00c4 <[^>]*>
[ ]*c0: R_MIPS_PC16 .L1.1-0x4
[ ]*c0: R_MIPS_PC16 .L1.*1-0x4
[ ]*c0: R_MIPS_NONE \*ABS\*-0x4
[ ]*c0: R_MIPS_NONE \*ABS\*-0x4
0+00c4 <[^>]*> 00000000 nop
0+00c8 <[^>]*> 453f0000 bc1eqz \$f31,0+00cc <[^>]*>
[ ]*c8: R_MIPS_PC16 .L1.1-0x4
[ ]*c8: R_MIPS_PC16 .L1.*1-0x4
[ ]*c8: R_MIPS_NONE \*ABS\*-0x4
[ ]*c8: R_MIPS_NONE \*ABS\*-0x4
0+00cc <[^>]*> 00000000 nop
@ -77,12 +77,12 @@ Disassembly of section .text:
[ ]*d8: R_MIPS_NONE \*ABS\*-0x4
0+00dc <[^>]*> 00000000 nop
0+00e0 <[^>]*> 45a00000 bc1nez \$f0,0+00e4 <[^>]*>
[ ]*e0: R_MIPS_PC16 .L1.1-0x4
[ ]*e0: R_MIPS_PC16 .L1.*1-0x4
[ ]*e0: R_MIPS_NONE \*ABS\*-0x4
[ ]*e0: R_MIPS_NONE \*ABS\*-0x4
0+00e4 <[^>]*> 00000000 nop
0+00e8 <[^>]*> 45bf0000 bc1nez \$f31,0+00ec <[^>]*>
[ ]*e8: R_MIPS_PC16 .L1.1-0x4
[ ]*e8: R_MIPS_PC16 .L1.*1-0x4
[ ]*e8: R_MIPS_NONE \*ABS\*-0x4
[ ]*e8: R_MIPS_NONE \*ABS\*-0x4
0+00ec <[^>]*> 00000000 nop
@ -97,12 +97,12 @@ Disassembly of section .text:
[ ]*f8: R_MIPS_NONE \*ABS\*-0x4
0+00fc <[^>]*> 00000000 nop
0+0100 <[^>]*> 49200000 bc2eqz \$0,0+0104 <[^>]*>
[ ]*100: R_MIPS_PC16 .L1.1-0x4
[ ]*100: R_MIPS_PC16 .L1.*1-0x4
[ ]*100: R_MIPS_NONE \*ABS\*-0x4
[ ]*100: R_MIPS_NONE \*ABS\*-0x4
0+0104 <[^>]*> 00000000 nop
0+0108 <[^>]*> 493f0000 bc2eqz \$31,0+010c <[^>]*>
[ ]*108: R_MIPS_PC16 .L1.1-0x4
[ ]*108: R_MIPS_PC16 .L1.*1-0x4
[ ]*108: R_MIPS_NONE \*ABS\*-0x4
[ ]*108: R_MIPS_NONE \*ABS\*-0x4
0+010c <[^>]*> 00000000 nop
@ -117,12 +117,12 @@ Disassembly of section .text:
[ ]*118: R_MIPS_NONE \*ABS\*-0x4
0+011c <[^>]*> 00000000 nop
0+0120 <[^>]*> 49a00000 bc2nez \$0,0+0124 <[^>]*>
[ ]*120: R_MIPS_PC16 .L1.1-0x4
[ ]*120: R_MIPS_PC16 .L1.*1-0x4
[ ]*120: R_MIPS_NONE \*ABS\*-0x4
[ ]*120: R_MIPS_NONE \*ABS\*-0x4
0+0124 <[^>]*> 00000000 nop
0+0128 <[^>]*> 49bf0000 bc2nez \$31,0+012c <[^>]*>
[ ]*128: R_MIPS_PC16 .L1.1-0x4
[ ]*128: R_MIPS_PC16 .L1.*1-0x4
[ ]*128: R_MIPS_NONE \*ABS\*-0x4
[ ]*128: R_MIPS_NONE \*ABS\*-0x4
0+012c <[^>]*> 00000000 nop
@ -212,17 +212,17 @@ Disassembly of section .text:
[ ]*228: R_MIPS_NONE \*ABS\*-0x4
0+022c <[^>]*> 00000000 nop
0+0230 <[^>]*> 20820000 bovc a0,v0,0+0234 <[^>]*>
[ ]*230: R_MIPS_PC16 L0.-0x20000
[ ]*230: R_MIPS_PC16 L0.*-0x20000
[ ]*230: R_MIPS_NONE \*ABS\*-0x20000
[ ]*230: R_MIPS_NONE \*ABS\*-0x20000
0+0234 <[^>]*> 00000000 nop
0+0238 <[^>]*> 20820000 bovc a0,v0,0+023c <[^>]*>
[ ]*238: R_MIPS_PC16 L0.\+0x1fffc
[ ]*238: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*238: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*238: R_MIPS_NONE \*ABS\*\+0x1fffc
0+023c <[^>]*> 00000000 nop
0+0240 <[^>]*> 20820000 bovc a0,v0,0+0244 <[^>]*>
[ ]*240: R_MIPS_PC16 .L1.2-0x4
[ ]*240: R_MIPS_PC16 .L1.*2-0x4
[ ]*240: R_MIPS_NONE \*ABS\*-0x4
[ ]*240: R_MIPS_NONE \*ABS\*-0x4
0+0244 <[^>]*> 00000000 nop
@ -232,7 +232,7 @@ Disassembly of section .text:
[ ]*248: R_MIPS_NONE \*ABS\*-0x4
0+024c <[^>]*> 00000000 nop
0+0250 <[^>]*> 20420000 bovc v0,v0,0+0254 <[^>]*>
[ ]*250: R_MIPS_PC16 L0.-0x20000
[ ]*250: R_MIPS_PC16 L0.*-0x20000
[ ]*250: R_MIPS_NONE \*ABS\*-0x20000
[ ]*250: R_MIPS_NONE \*ABS\*-0x20000
0+0254 <[^>]*> 00000000 nop
@ -242,17 +242,17 @@ Disassembly of section .text:
[ ]*258: R_MIPS_NONE \*ABS\*-0x4
0+025c <[^>]*> 00000000 nop
0+0260 <[^>]*> 20020000 beqzalc v0,0+0264 <[^>]*>
[ ]*260: R_MIPS_PC16 L0.-0x20000
[ ]*260: R_MIPS_PC16 L0.*-0x20000
[ ]*260: R_MIPS_NONE \*ABS\*-0x20000
[ ]*260: R_MIPS_NONE \*ABS\*-0x20000
0+0264 <[^>]*> 00000000 nop
0+0268 <[^>]*> 20020000 beqzalc v0,0+026c <[^>]*>
[ ]*268: R_MIPS_PC16 L0.\+0x1fffc
[ ]*268: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*268: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*268: R_MIPS_NONE \*ABS\*\+0x1fffc
0+026c <[^>]*> 00000000 nop
0+0270 <[^>]*> 20020000 beqzalc v0,0+0274 <[^>]*>
[ ]*270: R_MIPS_PC16 .L1.2-0x4
[ ]*270: R_MIPS_PC16 .L1.*2-0x4
[ ]*270: R_MIPS_NONE \*ABS\*-0x4
[ ]*270: R_MIPS_NONE \*ABS\*-0x4
0+0274 <[^>]*> 00000000 nop
@ -267,17 +267,17 @@ Disassembly of section .text:
[ ]*280: R_MIPS_NONE \*ABS\*-0x4
0+0284 <[^>]*> 00000000 nop
0+0288 <[^>]*> 20430000 beqc v0,v1,0+028c <[^>]*>
[ ]*288: R_MIPS_PC16 L0.-0x20000
[ ]*288: R_MIPS_PC16 L0.*-0x20000
[ ]*288: R_MIPS_NONE \*ABS\*-0x20000
[ ]*288: R_MIPS_NONE \*ABS\*-0x20000
0+028c <[^>]*> 00000000 nop
0+0290 <[^>]*> 20430000 beqc v0,v1,0+0294 <[^>]*>
[ ]*290: R_MIPS_PC16 L0.\+0x1fffc
[ ]*290: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*290: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*290: R_MIPS_NONE \*ABS\*\+0x1fffc
0+0294 <[^>]*> 00000000 nop
0+0298 <[^>]*> 20430000 beqc v0,v1,0+029c <[^>]*>
[ ]*298: R_MIPS_PC16 .L1.2-0x4
[ ]*298: R_MIPS_PC16 .L1.*2-0x4
[ ]*298: R_MIPS_NONE \*ABS\*-0x4
[ ]*298: R_MIPS_NONE \*ABS\*-0x4
0+029c <[^>]*> 00000000 nop
@ -307,17 +307,17 @@ Disassembly of section .text:
[ ]*2c0: R_MIPS_NONE \*ABS\*-0x4
0+02c4 <[^>]*> 00000000 nop
0+02c8 <[^>]*> 60820000 bnvc a0,v0,0+02cc <[^>]*>
[ ]*2c8: R_MIPS_PC16 L0.-0x20000
[ ]*2c8: R_MIPS_PC16 L0.*-0x20000
[ ]*2c8: R_MIPS_NONE \*ABS\*-0x20000
[ ]*2c8: R_MIPS_NONE \*ABS\*-0x20000
0+02cc <[^>]*> 00000000 nop
0+02d0 <[^>]*> 60820000 bnvc a0,v0,0+02d4 <[^>]*>
[ ]*2d0: R_MIPS_PC16 L0.\+0x1fffc
[ ]*2d0: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*2d0: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*2d0: R_MIPS_NONE \*ABS\*\+0x1fffc
0+02d4 <[^>]*> 00000000 nop
0+02d8 <[^>]*> 60820000 bnvc a0,v0,0+02dc <[^>]*>
[ ]*2d8: R_MIPS_PC16 .L1.2-0x4
[ ]*2d8: R_MIPS_PC16 .L1.*2-0x4
[ ]*2d8: R_MIPS_NONE \*ABS\*-0x4
[ ]*2d8: R_MIPS_NONE \*ABS\*-0x4
0+02dc <[^>]*> 00000000 nop
@ -327,7 +327,7 @@ Disassembly of section .text:
[ ]*2e0: R_MIPS_NONE \*ABS\*-0x4
0+02e4 <[^>]*> 00000000 nop
0+02e8 <[^>]*> 60420000 bnvc v0,v0,0+02ec <[^>]*>
[ ]*2e8: R_MIPS_PC16 L0.-0x20000
[ ]*2e8: R_MIPS_PC16 L0.*-0x20000
[ ]*2e8: R_MIPS_NONE \*ABS\*-0x20000
[ ]*2e8: R_MIPS_NONE \*ABS\*-0x20000
0+02ec <[^>]*> 00000000 nop
@ -337,17 +337,17 @@ Disassembly of section .text:
[ ]*2f0: R_MIPS_NONE \*ABS\*-0x4
0+02f4 <[^>]*> 00000000 nop
0+02f8 <[^>]*> 60020000 bnezalc v0,0+02fc <[^>]*>
[ ]*2f8: R_MIPS_PC16 L0.-0x20000
[ ]*2f8: R_MIPS_PC16 L0.*-0x20000
[ ]*2f8: R_MIPS_NONE \*ABS\*-0x20000
[ ]*2f8: R_MIPS_NONE \*ABS\*-0x20000
0+02fc <[^>]*> 00000000 nop
0+0300 <[^>]*> 60020000 bnezalc v0,0+0304 <[^>]*>
[ ]*300: R_MIPS_PC16 L0.\+0x1fffc
[ ]*300: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*300: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*300: R_MIPS_NONE \*ABS\*\+0x1fffc
0+0304 <[^>]*> 00000000 nop
0+0308 <[^>]*> 60020000 bnezalc v0,0+030c <[^>]*>
[ ]*308: R_MIPS_PC16 .L1.2-0x4
[ ]*308: R_MIPS_PC16 .L1.*2-0x4
[ ]*308: R_MIPS_NONE \*ABS\*-0x4
[ ]*308: R_MIPS_NONE \*ABS\*-0x4
0+030c <[^>]*> 00000000 nop
@ -362,17 +362,17 @@ Disassembly of section .text:
[ ]*318: R_MIPS_NONE \*ABS\*-0x4
0+031c <[^>]*> 00000000 nop
0+0320 <[^>]*> 60430000 bnec v0,v1,0+0324 <[^>]*>
[ ]*320: R_MIPS_PC16 L0.-0x20000
[ ]*320: R_MIPS_PC16 L0.*-0x20000
[ ]*320: R_MIPS_NONE \*ABS\*-0x20000
[ ]*320: R_MIPS_NONE \*ABS\*-0x20000
0+0324 <[^>]*> 00000000 nop
0+0328 <[^>]*> 60430000 bnec v0,v1,0+032c <[^>]*>
[ ]*328: R_MIPS_PC16 L0.\+0x1fffc
[ ]*328: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*328: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*328: R_MIPS_NONE \*ABS\*\+0x1fffc
0+032c <[^>]*> 00000000 nop
0+0330 <[^>]*> 60430000 bnec v0,v1,0+0334 <[^>]*>
[ ]*330: R_MIPS_PC16 .L1.2-0x4
[ ]*330: R_MIPS_PC16 .L1.*2-0x4
[ ]*330: R_MIPS_NONE \*ABS\*-0x4
[ ]*330: R_MIPS_NONE \*ABS\*-0x4
0+0334 <[^>]*> 00000000 nop
@ -382,17 +382,17 @@ Disassembly of section .text:
[ ]*338: R_MIPS_NONE \*ABS\*-0x4
0+033c <[^>]*> 00000000 nop
0+0340 <[^>]*> 58020000 blezc v0,0+0344 <[^>]*>
[ ]*340: R_MIPS_PC16 L0.-0x20000
[ ]*340: R_MIPS_PC16 L0.*-0x20000
[ ]*340: R_MIPS_NONE \*ABS\*-0x20000
[ ]*340: R_MIPS_NONE \*ABS\*-0x20000
0+0344 <[^>]*> 00000000 nop
0+0348 <[^>]*> 58020000 blezc v0,0+034c <[^>]*>
[ ]*348: R_MIPS_PC16 L0.\+0x1fffc
[ ]*348: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*348: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*348: R_MIPS_NONE \*ABS\*\+0x1fffc
0+034c <[^>]*> 00000000 nop
0+0350 <[^>]*> 58020000 blezc v0,0+0354 <[^>]*>
[ ]*350: R_MIPS_PC16 .L1.2-0x4
[ ]*350: R_MIPS_PC16 .L1.*2-0x4
[ ]*350: R_MIPS_NONE \*ABS\*-0x4
[ ]*350: R_MIPS_NONE \*ABS\*-0x4
0+0354 <[^>]*> 00000000 nop
@ -402,17 +402,17 @@ Disassembly of section .text:
[ ]*358: R_MIPS_NONE \*ABS\*-0x4
0+035c <[^>]*> 00000000 nop
0+0360 <[^>]*> 58420000 bgezc v0,0+0364 <[^>]*>
[ ]*360: R_MIPS_PC16 L0.-0x20000
[ ]*360: R_MIPS_PC16 L0.*-0x20000
[ ]*360: R_MIPS_NONE \*ABS\*-0x20000
[ ]*360: R_MIPS_NONE \*ABS\*-0x20000
0+0364 <[^>]*> 00000000 nop
0+0368 <[^>]*> 58420000 bgezc v0,0+036c <[^>]*>
[ ]*368: R_MIPS_PC16 L0.\+0x1fffc
[ ]*368: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*368: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*368: R_MIPS_NONE \*ABS\*\+0x1fffc
0+036c <[^>]*> 00000000 nop
0+0370 <[^>]*> 58420000 bgezc v0,0+0374 <[^>]*>
[ ]*370: R_MIPS_PC16 .L1.2-0x4
[ ]*370: R_MIPS_PC16 .L1.*2-0x4
[ ]*370: R_MIPS_NONE \*ABS\*-0x4
[ ]*370: R_MIPS_NONE \*ABS\*-0x4
0+0374 <[^>]*> 00000000 nop
@ -422,22 +422,22 @@ Disassembly of section .text:
[ ]*378: R_MIPS_NONE \*ABS\*-0x4
0+037c <[^>]*> 00000000 nop
0+0380 <[^>]*> 58430000 bgec v0,v1,0+0384 <[^>]*>
[ ]*380: R_MIPS_PC16 L0.-0x20000
[ ]*380: R_MIPS_PC16 L0.*-0x20000
[ ]*380: R_MIPS_NONE \*ABS\*-0x20000
[ ]*380: R_MIPS_NONE \*ABS\*-0x20000
0+0384 <[^>]*> 00000000 nop
0+0388 <[^>]*> 58430000 bgec v0,v1,0+038c <[^>]*>
[ ]*388: R_MIPS_PC16 L0.\+0x1fffc
[ ]*388: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*388: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*388: R_MIPS_NONE \*ABS\*\+0x1fffc
0+038c <[^>]*> 00000000 nop
0+0390 <[^>]*> 58430000 bgec v0,v1,0+0394 <[^>]*>
[ ]*390: R_MIPS_PC16 .L1.2-0x4
[ ]*390: R_MIPS_PC16 .L1.*2-0x4
[ ]*390: R_MIPS_NONE \*ABS\*-0x4
[ ]*390: R_MIPS_NONE \*ABS\*-0x4
0+0394 <[^>]*> 00000000 nop
0+0398 <[^>]*> 58620000 bgec v1,v0,0+039c <[^>]*>
[ ]*398: R_MIPS_PC16 .L1.2-0x4
[ ]*398: R_MIPS_PC16 .L1.*2-0x4
[ ]*398: R_MIPS_NONE \*ABS\*-0x4
[ ]*398: R_MIPS_NONE \*ABS\*-0x4
0+039c <[^>]*> 00000000 nop
@ -447,17 +447,17 @@ Disassembly of section .text:
[ ]*3a0: R_MIPS_NONE \*ABS\*-0x4
0+03a4 <[^>]*> 00000000 nop
0+03a8 <[^>]*> 5c020000 bgtzc v0,0+03ac <[^>]*>
[ ]*3a8: R_MIPS_PC16 L0.-0x20000
[ ]*3a8: R_MIPS_PC16 L0.*-0x20000
[ ]*3a8: R_MIPS_NONE \*ABS\*-0x20000
[ ]*3a8: R_MIPS_NONE \*ABS\*-0x20000
0+03ac <[^>]*> 00000000 nop
0+03b0 <[^>]*> 5c020000 bgtzc v0,0+03b4 <[^>]*>
[ ]*3b0: R_MIPS_PC16 L0.\+0x1fffc
[ ]*3b0: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*3b0: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*3b0: R_MIPS_NONE \*ABS\*\+0x1fffc
0+03b4 <[^>]*> 00000000 nop
0+03b8 <[^>]*> 5c020000 bgtzc v0,0+03bc <[^>]*>
[ ]*3b8: R_MIPS_PC16 .L1.2-0x4
[ ]*3b8: R_MIPS_PC16 .L1.*2-0x4
[ ]*3b8: R_MIPS_NONE \*ABS\*-0x4
[ ]*3b8: R_MIPS_NONE \*ABS\*-0x4
0+03bc <[^>]*> 00000000 nop
@ -467,17 +467,17 @@ Disassembly of section .text:
[ ]*3c0: R_MIPS_NONE \*ABS\*-0x4
0+03c4 <[^>]*> 00000000 nop
0+03c8 <[^>]*> 5c420000 bltzc v0,0+03cc <[^>]*>
[ ]*3c8: R_MIPS_PC16 L0.-0x20000
[ ]*3c8: R_MIPS_PC16 L0.*-0x20000
[ ]*3c8: R_MIPS_NONE \*ABS\*-0x20000
[ ]*3c8: R_MIPS_NONE \*ABS\*-0x20000
0+03cc <[^>]*> 00000000 nop
0+03d0 <[^>]*> 5c420000 bltzc v0,0+03d4 <[^>]*>
[ ]*3d0: R_MIPS_PC16 L0.\+0x1fffc
[ ]*3d0: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*3d0: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*3d0: R_MIPS_NONE \*ABS\*\+0x1fffc
0+03d4 <[^>]*> 00000000 nop
0+03d8 <[^>]*> 5c420000 bltzc v0,0+03dc <[^>]*>
[ ]*3d8: R_MIPS_PC16 .L1.2-0x4
[ ]*3d8: R_MIPS_PC16 .L1.*2-0x4
[ ]*3d8: R_MIPS_NONE \*ABS\*-0x4
[ ]*3d8: R_MIPS_NONE \*ABS\*-0x4
0+03dc <[^>]*> 00000000 nop
@ -487,22 +487,22 @@ Disassembly of section .text:
[ ]*3e0: R_MIPS_NONE \*ABS\*-0x4
0+03e4 <[^>]*> 00000000 nop
0+03e8 <[^>]*> 5c430000 bltc v0,v1,0+03ec <[^>]*>
[ ]*3e8: R_MIPS_PC16 L0.-0x20000
[ ]*3e8: R_MIPS_PC16 L0.*-0x20000
[ ]*3e8: R_MIPS_NONE \*ABS\*-0x20000
[ ]*3e8: R_MIPS_NONE \*ABS\*-0x20000
0+03ec <[^>]*> 00000000 nop
0+03f0 <[^>]*> 5c430000 bltc v0,v1,0+03f4 <[^>]*>
[ ]*3f0: R_MIPS_PC16 L0.\+0x1fffc
[ ]*3f0: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*3f0: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*3f0: R_MIPS_NONE \*ABS\*\+0x1fffc
0+03f4 <[^>]*> 00000000 nop
0+03f8 <[^>]*> 5c430000 bltc v0,v1,0+03fc <[^>]*>
[ ]*3f8: R_MIPS_PC16 .L1.2-0x4
[ ]*3f8: R_MIPS_PC16 .L1.*2-0x4
[ ]*3f8: R_MIPS_NONE \*ABS\*-0x4
[ ]*3f8: R_MIPS_NONE \*ABS\*-0x4
0+03fc <[^>]*> 00000000 nop
0+0400 <[^>]*> 5c620000 bltc v1,v0,0+0404 <[^>]*>
[ ]*400: R_MIPS_PC16 .L1.2-0x4
[ ]*400: R_MIPS_PC16 .L1.*2-0x4
[ ]*400: R_MIPS_NONE \*ABS\*-0x4
[ ]*400: R_MIPS_NONE \*ABS\*-0x4
0+0404 <[^>]*> 00000000 nop
@ -512,17 +512,17 @@ Disassembly of section .text:
[ ]*408: R_MIPS_NONE \*ABS\*-0x4
0+040c <[^>]*> 00000000 nop
0+0410 <[^>]*> 18020000 blezalc v0,0+0414 <[^>]*>
[ ]*410: R_MIPS_PC16 L0.-0x20000
[ ]*410: R_MIPS_PC16 L0.*-0x20000
[ ]*410: R_MIPS_NONE \*ABS\*-0x20000
[ ]*410: R_MIPS_NONE \*ABS\*-0x20000
0+0414 <[^>]*> 00000000 nop
0+0418 <[^>]*> 18020000 blezalc v0,0+041c <[^>]*>
[ ]*418: R_MIPS_PC16 L0.\+0x1fffc
[ ]*418: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*418: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*418: R_MIPS_NONE \*ABS\*\+0x1fffc
0+041c <[^>]*> 00000000 nop
0+0420 <[^>]*> 18020000 blezalc v0,0+0424 <[^>]*>
[ ]*420: R_MIPS_PC16 .L1.2-0x4
[ ]*420: R_MIPS_PC16 .L1.*2-0x4
[ ]*420: R_MIPS_NONE \*ABS\*-0x4
[ ]*420: R_MIPS_NONE \*ABS\*-0x4
0+0424 <[^>]*> 00000000 nop
@ -532,17 +532,17 @@ Disassembly of section .text:
[ ]*428: R_MIPS_NONE \*ABS\*-0x4
0+042c <[^>]*> 00000000 nop
0+0430 <[^>]*> 18420000 bgezalc v0,0+0434 <[^>]*>
[ ]*430: R_MIPS_PC16 L0.-0x20000
[ ]*430: R_MIPS_PC16 L0.*-0x20000
[ ]*430: R_MIPS_NONE \*ABS\*-0x20000
[ ]*430: R_MIPS_NONE \*ABS\*-0x20000
0+0434 <[^>]*> 00000000 nop
0+0438 <[^>]*> 18420000 bgezalc v0,0+043c <[^>]*>
[ ]*438: R_MIPS_PC16 L0.\+0x1fffc
[ ]*438: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*438: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*438: R_MIPS_NONE \*ABS\*\+0x1fffc
0+043c <[^>]*> 00000000 nop
0+0440 <[^>]*> 18420000 bgezalc v0,0+0444 <[^>]*>
[ ]*440: R_MIPS_PC16 .L1.2-0x4
[ ]*440: R_MIPS_PC16 .L1.*2-0x4
[ ]*440: R_MIPS_NONE \*ABS\*-0x4
[ ]*440: R_MIPS_NONE \*ABS\*-0x4
0+0444 <[^>]*> 00000000 nop
@ -552,22 +552,22 @@ Disassembly of section .text:
[ ]*448: R_MIPS_NONE \*ABS\*-0x4
0+044c <[^>]*> 00000000 nop
0+0450 <[^>]*> 18430000 bgeuc v0,v1,0+0454 <[^>]*>
[ ]*450: R_MIPS_PC16 L0.-0x20000
[ ]*450: R_MIPS_PC16 L0.*-0x20000
[ ]*450: R_MIPS_NONE \*ABS\*-0x20000
[ ]*450: R_MIPS_NONE \*ABS\*-0x20000
0+0454 <[^>]*> 00000000 nop
0+0458 <[^>]*> 18430000 bgeuc v0,v1,0+045c <[^>]*>
[ ]*458: R_MIPS_PC16 L0.\+0x1fffc
[ ]*458: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*458: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*458: R_MIPS_NONE \*ABS\*\+0x1fffc
0+045c <[^>]*> 00000000 nop
0+0460 <[^>]*> 18430000 bgeuc v0,v1,0+0464 <[^>]*>
[ ]*460: R_MIPS_PC16 .L1.2-0x4
[ ]*460: R_MIPS_PC16 .L1.*2-0x4
[ ]*460: R_MIPS_NONE \*ABS\*-0x4
[ ]*460: R_MIPS_NONE \*ABS\*-0x4
0+0464 <[^>]*> 00000000 nop
0+0468 <[^>]*> 18620000 bgeuc v1,v0,0+046c <[^>]*>
[ ]*468: R_MIPS_PC16 .L1.2-0x4
[ ]*468: R_MIPS_PC16 .L1.*2-0x4
[ ]*468: R_MIPS_NONE \*ABS\*-0x4
[ ]*468: R_MIPS_NONE \*ABS\*-0x4
0+046c <[^>]*> 00000000 nop
@ -577,17 +577,17 @@ Disassembly of section .text:
[ ]*470: R_MIPS_NONE \*ABS\*-0x4
0+0474 <[^>]*> 00000000 nop
0+0478 <[^>]*> 1c020000 bgtzalc v0,0+047c <[^>]*>
[ ]*478: R_MIPS_PC16 L0.-0x20000
[ ]*478: R_MIPS_PC16 L0.*-0x20000
[ ]*478: R_MIPS_NONE \*ABS\*-0x20000
[ ]*478: R_MIPS_NONE \*ABS\*-0x20000
0+047c <[^>]*> 00000000 nop
0+0480 <[^>]*> 1c020000 bgtzalc v0,0+0484 <[^>]*>
[ ]*480: R_MIPS_PC16 L0.\+0x1fffc
[ ]*480: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*480: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*480: R_MIPS_NONE \*ABS\*\+0x1fffc
0+0484 <[^>]*> 00000000 nop
0+0488 <[^>]*> 1c020000 bgtzalc v0,0+048c <[^>]*>
[ ]*488: R_MIPS_PC16 .L1.2-0x4
[ ]*488: R_MIPS_PC16 .L1.*2-0x4
[ ]*488: R_MIPS_NONE \*ABS\*-0x4
[ ]*488: R_MIPS_NONE \*ABS\*-0x4
0+048c <[^>]*> 00000000 nop
@ -597,17 +597,17 @@ Disassembly of section .text:
[ ]*490: R_MIPS_NONE \*ABS\*-0x4
0+0494 <[^>]*> 00000000 nop
0+0498 <[^>]*> 1c420000 bltzalc v0,0+049c <[^>]*>
[ ]*498: R_MIPS_PC16 L0.-0x20000
[ ]*498: R_MIPS_PC16 L0.*-0x20000
[ ]*498: R_MIPS_NONE \*ABS\*-0x20000
[ ]*498: R_MIPS_NONE \*ABS\*-0x20000
0+049c <[^>]*> 00000000 nop
0+04a0 <[^>]*> 1c420000 bltzalc v0,0+04a4 <[^>]*>
[ ]*4a0: R_MIPS_PC16 L0.\+0x1fffc
[ ]*4a0: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*4a0: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*4a0: R_MIPS_NONE \*ABS\*\+0x1fffc
0+04a4 <[^>]*> 00000000 nop
0+04a8 <[^>]*> 1c420000 bltzalc v0,0+04ac <[^>]*>
[ ]*4a8: R_MIPS_PC16 .L1.2-0x4
[ ]*4a8: R_MIPS_PC16 .L1.*2-0x4
[ ]*4a8: R_MIPS_NONE \*ABS\*-0x4
[ ]*4a8: R_MIPS_NONE \*ABS\*-0x4
0+04ac <[^>]*> 00000000 nop
@ -617,22 +617,22 @@ Disassembly of section .text:
[ ]*4b0: R_MIPS_NONE \*ABS\*-0x4
0+04b4 <[^>]*> 00000000 nop
0+04b8 <[^>]*> 1c430000 bltuc v0,v1,0+04bc <[^>]*>
[ ]*4b8: R_MIPS_PC16 L0.-0x20000
[ ]*4b8: R_MIPS_PC16 L0.*-0x20000
[ ]*4b8: R_MIPS_NONE \*ABS\*-0x20000
[ ]*4b8: R_MIPS_NONE \*ABS\*-0x20000
0+04bc <[^>]*> 00000000 nop
0+04c0 <[^>]*> 1c430000 bltuc v0,v1,0+04c4 <[^>]*>
[ ]*4c0: R_MIPS_PC16 L0.\+0x1fffc
[ ]*4c0: R_MIPS_PC16 L0.*\+0x1fffc
[ ]*4c0: R_MIPS_NONE \*ABS\*\+0x1fffc
[ ]*4c0: R_MIPS_NONE \*ABS\*\+0x1fffc
0+04c4 <[^>]*> 00000000 nop
0+04c8 <[^>]*> 1c430000 bltuc v0,v1,0+04cc <[^>]*>
[ ]*4c8: R_MIPS_PC16 .L1.2-0x4
[ ]*4c8: R_MIPS_PC16 .L1.*2-0x4
[ ]*4c8: R_MIPS_NONE \*ABS\*-0x4
[ ]*4c8: R_MIPS_NONE \*ABS\*-0x4
0+04cc <[^>]*> 00000000 nop
0+04d0 <[^>]*> 1c620000 bltuc v1,v0,0+04d4 <[^>]*>
[ ]*4d0: R_MIPS_PC16 .L1.2-0x4
[ ]*4d0: R_MIPS_PC16 .L1.*2-0x4
[ ]*4d0: R_MIPS_NONE \*ABS\*-0x4
[ ]*4d0: R_MIPS_NONE \*ABS\*-0x4
0+04d4 <[^>]*> 00000000 nop
@ -641,15 +641,15 @@ Disassembly of section .text:
[ ]*4d8: R_MIPS_NONE \*ABS\*-0x4
[ ]*4d8: R_MIPS_NONE \*ABS\*-0x4
0+04dc <[^>]*> c8000000 bc 0+04e0 <[^>]*>
[ ]*4dc: R_MIPS_PC26_S2 L0.-0x8000000
[ ]*4dc: R_MIPS_PC26_S2 L0.*-0x8000000
[ ]*4dc: R_MIPS_NONE \*ABS\*-0x8000000
[ ]*4dc: R_MIPS_NONE \*ABS\*-0x8000000
0+04e0 <[^>]*> c8000000 bc 0+04e4 <[^>]*>
[ ]*4e0: R_MIPS_PC26_S2 L0.\+0x7fffffc
[ ]*4e0: R_MIPS_PC26_S2 L0.*\+0x7fffffc
[ ]*4e0: R_MIPS_NONE \*ABS\*\+0x7fffffc
[ ]*4e0: R_MIPS_NONE \*ABS\*\+0x7fffffc
0+04e4 <[^>]*> c8000000 bc 0+04e8 <[^>]*>
[ ]*4e4: R_MIPS_PC26_S2 .L1.2-0x4
[ ]*4e4: R_MIPS_PC26_S2 .L1.*2-0x4
[ ]*4e4: R_MIPS_NONE \*ABS\*-0x4
[ ]*4e4: R_MIPS_NONE \*ABS\*-0x4
0+04e8 <[^>]*> e8000000 balc 0+04ec <[^>]*>
@ -657,15 +657,15 @@ Disassembly of section .text:
[ ]*4e8: R_MIPS_NONE \*ABS\*-0x4
[ ]*4e8: R_MIPS_NONE \*ABS\*-0x4
0+04ec <[^>]*> e8000000 balc 0+04f0 <[^>]*>
[ ]*4ec: R_MIPS_PC26_S2 L0.-0x8000000
[ ]*4ec: R_MIPS_PC26_S2 L0.*-0x8000000
[ ]*4ec: R_MIPS_NONE \*ABS\*-0x8000000
[ ]*4ec: R_MIPS_NONE \*ABS\*-0x8000000
0+04f0 <[^>]*> e8000000 balc 0+04f4 <[^>]*>
[ ]*4f0: R_MIPS_PC26_S2 L0.\+0x7fffffc
[ ]*4f0: R_MIPS_PC26_S2 L0.*\+0x7fffffc
[ ]*4f0: R_MIPS_NONE \*ABS\*\+0x7fffffc
[ ]*4f0: R_MIPS_NONE \*ABS\*\+0x7fffffc
0+04f4 <[^>]*> e8000000 balc 0+04f8 <[^>]*>
[ ]*4f4: R_MIPS_PC26_S2 .L1.2-0x4
[ ]*4f4: R_MIPS_PC26_S2 .L1.*2-0x4
[ ]*4f4: R_MIPS_NONE \*ABS\*-0x4
[ ]*4f4: R_MIPS_NONE \*ABS\*-0x4
0+04f8 <[^>]*> d8400000 beqzc v0,0+04fc <[^>]*>
@ -674,17 +674,17 @@ Disassembly of section .text:
[ ]*4f8: R_MIPS_NONE \*ABS\*-0x4
0+04fc <[^>]*> 00000000 nop
0+0500 <[^>]*> d8400000 beqzc v0,0+0504 <[^>]*>
[ ]*500: R_MIPS_PC21_S2 L0.-0x400000
[ ]*500: R_MIPS_PC21_S2 L0.*-0x400000
[ ]*500: R_MIPS_NONE \*ABS\*-0x400000
[ ]*500: R_MIPS_NONE \*ABS\*-0x400000
0+0504 <[^>]*> 00000000 nop
0+0508 <[^>]*> d8400000 beqzc v0,0+050c <[^>]*>
[ ]*508: R_MIPS_PC21_S2 L0.\+0x3ffffc
[ ]*508: R_MIPS_PC21_S2 L0.*\+0x3ffffc
[ ]*508: R_MIPS_NONE \*ABS\*\+0x3ffffc
[ ]*508: R_MIPS_NONE \*ABS\*\+0x3ffffc
0+050c <[^>]*> 00000000 nop
0+0510 <[^>]*> d8400000 beqzc v0,0+0514 <[^>]*>
[ ]*510: R_MIPS_PC21_S2 .L1.2-0x4
[ ]*510: R_MIPS_PC21_S2 .L1.*2-0x4
[ ]*510: R_MIPS_NONE \*ABS\*-0x4
[ ]*510: R_MIPS_NONE \*ABS\*-0x4
0+0514 <[^>]*> 00000000 nop
@ -697,17 +697,17 @@ Disassembly of section .text:
[ ]*524: R_MIPS_NONE \*ABS\*-0x4
0+0528 <[^>]*> 00000000 nop
0+052c <[^>]*> f8400000 bnezc v0,0+0530 <[^>]*>
[ ]*52c: R_MIPS_PC21_S2 L0.-0x400000
[ ]*52c: R_MIPS_PC21_S2 L0.*-0x400000
[ ]*52c: R_MIPS_NONE \*ABS\*-0x400000
[ ]*52c: R_MIPS_NONE \*ABS\*-0x400000
0+0530 <[^>]*> 00000000 nop
0+0534 <[^>]*> f8400000 bnezc v0,0+0538 <[^>]*>
[ ]*534: R_MIPS_PC21_S2 L0.\+0x3ffffc
[ ]*534: R_MIPS_PC21_S2 L0.*\+0x3ffffc
[ ]*534: R_MIPS_NONE \*ABS\*\+0x3ffffc
[ ]*534: R_MIPS_NONE \*ABS\*\+0x3ffffc
0+0538 <[^>]*> 00000000 nop
0+053c <[^>]*> f8400000 bnezc v0,0+0540 <[^>]*>
[ ]*53c: R_MIPS_PC21_S2 .L1.2-0x4
[ ]*53c: R_MIPS_PC21_S2 .L1.*2-0x4
[ ]*53c: R_MIPS_NONE \*ABS\*-0x4
[ ]*53c: R_MIPS_NONE \*ABS\*-0x4
0+0540 <[^>]*> 00000000 nop
@ -715,15 +715,15 @@ Disassembly of section .text:
0+0548 <[^>]*> f8037fff jialc v1,32767
0+054c <[^>]*> 3c43ffff aui v1,v0,0xffff
0+0550 <[^>]*> ec600000 lapc v1,0+0550 <[^>]*>
[ ]*550: R_MIPS_PC19_S2 .L1.2
[ ]*550: R_MIPS_PC19_S2 .L1.*2
[ ]*550: R_MIPS_NONE \*ABS\*
[ ]*550: R_MIPS_NONE \*ABS\*
0+0554 <[^>]*> ec800000 lapc a0,0+0554 <[^>]*>
[ ]*554: R_MIPS_PC19_S2 L0.-0x100000
[ ]*554: R_MIPS_PC19_S2 L0.*-0x100000
[ ]*554: R_MIPS_NONE \*ABS\*-0x100000
[ ]*554: R_MIPS_NONE \*ABS\*-0x100000
0+0558 <[^>]*> ec800000 lapc a0,0+0558 <[^>]*>
[ ]*558: R_MIPS_PC19_S2 L0.\+0xffffc
[ ]*558: R_MIPS_PC19_S2 L0.*\+0xffffc
[ ]*558: R_MIPS_NONE \*ABS\*\+0xffffc
[ ]*558: R_MIPS_NONE \*ABS\*\+0xffffc
0+055c <[^>]*> ec840000 lapc a0,f+ffff0055c <[^>]*>
@ -731,15 +731,15 @@ Disassembly of section .text:
0+0564 <[^>]*> ec7effff auipc v1,0xffff
0+0568 <[^>]*> ec7fffff aluipc v1,0xffff
0+056c <[^>]*> ec880000 lwpc a0,0+056c <[^>]*>
[ ]*56c: R_MIPS_PC19_S2 .L1.2
[ ]*56c: R_MIPS_PC19_S2 .L1.*2
[ ]*56c: R_MIPS_NONE \*ABS\*
[ ]*56c: R_MIPS_NONE \*ABS\*
0+0570 <[^>]*> ec880000 lwpc a0,0+0570 <[^>]*>
[ ]*570: R_MIPS_PC19_S2 L0.-0x100000
[ ]*570: R_MIPS_PC19_S2 L0.*-0x100000
[ ]*570: R_MIPS_NONE \*ABS\*-0x100000
[ ]*570: R_MIPS_NONE \*ABS\*-0x100000
0+0574 <[^>]*> ec880000 lwpc a0,0+0574 <[^>]*>
[ ]*574: R_MIPS_PC19_S2 L0.\+0xffffc
[ ]*574: R_MIPS_PC19_S2 L0.*\+0xffffc
[ ]*574: R_MIPS_NONE \*ABS\*\+0xffffc
[ ]*574: R_MIPS_NONE \*ABS\*\+0xffffc
0+0578 <[^>]*> ec8c0000 lwpc a0,f+ffff00578 <[^>]*>

172
gas/testsuite/gas/mips/r6.d
View File

@ -56,10 +56,10 @@ Disassembly of section .text:
0+00b8 <[^>]*> 4682081b cmp.sne.s \$f0,\$f1,\$f2
0+00bc <[^>]*> 46a2081b cmp.sne.d \$f0,\$f1,\$f2
0+00c0 <[^>]*> 4520ffff bc1eqz \$f0,000000c0 <[^>]*>
[ ]*c0: R_MIPS_PC16 .L1.1
[ ]*c0: R_MIPS_PC16 .L1.*1
0+00c4 <[^>]*> 00000000 nop
0+00c8 <[^>]*> 453fffff bc1eqz \$f31,000000c8 <[^>]*>
[ ]*c8: R_MIPS_PC16 .L1.1
[ ]*c8: R_MIPS_PC16 .L1.*1
0+00cc <[^>]*> 00000000 nop
0+00d0 <[^>]*> 453fffff bc1eqz \$f31,000000d0 <[^>]*>
[ ]*d0: R_MIPS_PC16 new
@ -68,10 +68,10 @@ Disassembly of section .text:
[ ]*d8: R_MIPS_PC16 external_label
0+00dc <[^>]*> 00000000 nop
0+00e0 <[^>]*> 45a0ffff bc1nez \$f0,000000e0 <[^>]*>
[ ]*e0: R_MIPS_PC16 .L1.1
[ ]*e0: R_MIPS_PC16 .L1.*1
0+00e4 <[^>]*> 00000000 nop
0+00e8 <[^>]*> 45bfffff bc1nez \$f31,000000e8 <[^>]*>
[ ]*e8: R_MIPS_PC16 .L1.1
[ ]*e8: R_MIPS_PC16 .L1.*1
0+00ec <[^>]*> 00000000 nop
0+00f0 <[^>]*> 45bfffff bc1nez \$f31,000000f0 <[^>]*>
[ ]*f0: R_MIPS_PC16 new
@ -80,10 +80,10 @@ Disassembly of section .text:
[ ]*f8: R_MIPS_PC16 external_label
0+00fc <[^>]*> 00000000 nop
0+0100 <[^>]*> 4920ffff bc2eqz \$0,00000100 <[^>]*>
[ ]*100: R_MIPS_PC16 .L1.1
[ ]*100: R_MIPS_PC16 .L1.*1
0+0104 <[^>]*> 00000000 nop
0+0108 <[^>]*> 493fffff bc2eqz \$31,00000108 <[^>]*>
[ ]*108: R_MIPS_PC16 .L1.1
[ ]*108: R_MIPS_PC16 .L1.*1
0+010c <[^>]*> 00000000 nop
0+0110 <[^>]*> 493fffff bc2eqz \$31,00000110 <[^>]*>
[ ]*110: R_MIPS_PC16 new
@ -92,10 +92,10 @@ Disassembly of section .text:
[ ]*118: R_MIPS_PC16 external_label
0+011c <[^>]*> 00000000 nop
0+0120 <[^>]*> 49a0ffff bc2nez \$0,00000120 <[^>]*>
[ ]*120: R_MIPS_PC16 .L1.1
[ ]*120: R_MIPS_PC16 .L1.*1
0+0124 <[^>]*> 00000000 nop
0+0128 <[^>]*> 49bfffff bc2nez \$31,00000128 <[^>]*>
[ ]*128: R_MIPS_PC16 .L1.1
[ ]*128: R_MIPS_PC16 .L1.*1
0+012c <[^>]*> 00000000 nop
0+0130 <[^>]*> 49bfffff bc2nez \$31,00000130 <[^>]*>
[ ]*130: R_MIPS_PC16 new
@ -169,31 +169,31 @@ Disassembly of section .text:
[ ]*228: R_MIPS_PC16 ext
0+022c <[^>]*> 00000000 nop
0+0230 <[^>]*> 20828000 bovc a0,v0,fffe0234 <[^>]*>
[ ]*230: R_MIPS_PC16 L0.
[ ]*230: R_MIPS_PC16 L0.*
0+0234 <[^>]*> 00000000 nop
0+0238 <[^>]*> 20827fff bovc a0,v0,00020238 <[^>]*>
[ ]*238: R_MIPS_PC16 L0.
[ ]*238: R_MIPS_PC16 L0.*
0+023c <[^>]*> 00000000 nop
0+0240 <[^>]*> 2082ffff bovc a0,v0,00000240 <[^>]*>
[ ]*240: R_MIPS_PC16 .L1.2
[ ]*240: R_MIPS_PC16 .L1.*2
0+0244 <[^>]*> 00000000 nop
0+0248 <[^>]*> 2042ffff bovc v0,v0,00000248 <[^>]*>
[ ]*248: R_MIPS_PC16 ext
0+024c <[^>]*> 00000000 nop
0+0250 <[^>]*> 20428000 bovc v0,v0,fffe0254 <[^>]*>
[ ]*250: R_MIPS_PC16 L0.
[ ]*250: R_MIPS_PC16 L0.*
0+0254 <[^>]*> 00000000 nop
0+0258 <[^>]*> 2002ffff beqzalc v0,00000258 <[^>]*>
[ ]*258: R_MIPS_PC16 ext
0+025c <[^>]*> 00000000 nop
0+0260 <[^>]*> 20028000 beqzalc v0,fffe0264 <[^>]*>
[ ]*260: R_MIPS_PC16 L0.
[ ]*260: R_MIPS_PC16 L0.*
0+0264 <[^>]*> 00000000 nop
0+0268 <[^>]*> 20027fff beqzalc v0,00020268 <[^>]*>
[ ]*268: R_MIPS_PC16 L0.
[ ]*268: R_MIPS_PC16 L0.*
0+026c <[^>]*> 00000000 nop
0+0270 <[^>]*> 2002ffff beqzalc v0,00000270 <[^>]*>
[ ]*270: R_MIPS_PC16 .L1.2
[ ]*270: R_MIPS_PC16 .L1.*2
0+0274 <[^>]*> 00000000 nop
0+0278 <[^>]*> 2043ffff beqc v0,v1,00000278 <[^>]*>
[ ]*278: R_MIPS_PC16 ext
@ -202,13 +202,13 @@ Disassembly of section .text:
[ ]*280: R_MIPS_PC16 ext
0+0284 <[^>]*> 00000000 nop
0+0288 <[^>]*> 20438000 beqc v0,v1,fffe028c <[^>]*>
[ ]*288: R_MIPS_PC16 L0.
[ ]*288: R_MIPS_PC16 L0.*
0+028c <[^>]*> 00000000 nop
0+0290 <[^>]*> 20437fff beqc v0,v1,00020290 <[^>]*>
[ ]*290: R_MIPS_PC16 L0.
[ ]*290: R_MIPS_PC16 L0.*
0+0294 <[^>]*> 00000000 nop
0+0298 <[^>]*> 2043ffff beqc v0,v1,00000298 <[^>]*>
[ ]*298: R_MIPS_PC16 .L1.2
[ ]*298: R_MIPS_PC16 .L1.*2
0+029c <[^>]*> 00000000 nop
0+02a0 <[^>]*> 6000ffff bnvc zero,zero,000002a0 <[^>]*>
[ ]*2a0: R_MIPS_PC16 ext
@ -226,31 +226,31 @@ Disassembly of section .text:
[ ]*2c0: R_MIPS_PC16 ext
0+02c4 <[^>]*> 00000000 nop
0+02c8 <[^>]*> 60828000 bnvc a0,v0,fffe02cc <[^>]*>
[ ]*2c8: R_MIPS_PC16 L0.
[ ]*2c8: R_MIPS_PC16 L0.*
0+02cc <[^>]*> 00000000 nop
0+02d0 <[^>]*> 60827fff bnvc a0,v0,000202d0 <[^>]*>
[ ]*2d0: R_MIPS_PC16 L0.
[ ]*2d0: R_MIPS_PC16 L0.*
0+02d4 <[^>]*> 00000000 nop
0+02d8 <[^>]*> 6082ffff bnvc a0,v0,000002d8 <[^>]*>
[ ]*2d8: R_MIPS_PC16 .L1.2
[ ]*2d8: R_MIPS_PC16 .L1.*2
0+02dc <[^>]*> 00000000 nop
0+02e0 <[^>]*> 6042ffff bnvc v0,v0,000002e0 <[^>]*>
[ ]*2e0: R_MIPS_PC16 ext
0+02e4 <[^>]*> 00000000 nop
0+02e8 <[^>]*> 60428000 bnvc v0,v0,fffe02ec <[^>]*>
[ ]*2e8: R_MIPS_PC16 L0.
[ ]*2e8: R_MIPS_PC16 L0.*
0+02ec <[^>]*> 00000000 nop
0+02f0 <[^>]*> 6002ffff bnezalc v0,000002f0 <[^>]*>
[ ]*2f0: R_MIPS_PC16 ext
0+02f4 <[^>]*> 00000000 nop
0+02f8 <[^>]*> 60028000 bnezalc v0,fffe02fc <[^>]*>
[ ]*2f8: R_MIPS_PC16 L0.
[ ]*2f8: R_MIPS_PC16 L0.*
0+02fc <[^>]*> 00000000 nop
0+0300 <[^>]*> 60027fff bnezalc v0,00020300 <[^>]*>
[ ]*300: R_MIPS_PC16 L0.
[ ]*300: R_MIPS_PC16 L0.*
0+0304 <[^>]*> 00000000 nop
0+0308 <[^>]*> 6002ffff bnezalc v0,00000308 <[^>]*>
[ ]*308: R_MIPS_PC16 .L1.2
[ ]*308: R_MIPS_PC16 .L1.*2
0+030c <[^>]*> 00000000 nop
0+0310 <[^>]*> 6043ffff bnec v0,v1,00000310 <[^>]*>
[ ]*310: R_MIPS_PC16 ext
@ -259,197 +259,197 @@ Disassembly of section .text:
[ ]*318: R_MIPS_PC16 ext
0+031c <[^>]*> 00000000 nop
0+0320 <[^>]*> 60438000 bnec v0,v1,fffe0324 <[^>]*>
[ ]*320: R_MIPS_PC16 L0.
[ ]*320: R_MIPS_PC16 L0.*
0+0324 <[^>]*> 00000000 nop
0+0328 <[^>]*> 60437fff bnec v0,v1,00020328 <[^>]*>
[ ]*328: R_MIPS_PC16 L0.
[ ]*328: R_MIPS_PC16 L0.*
0+032c <[^>]*> 00000000 nop
0+0330 <[^>]*> 6043ffff bnec v0,v1,00000330 <[^>]*>
[ ]*330: R_MIPS_PC16 .L1.2
[ ]*330: R_MIPS_PC16 .L1.*2
0+0334 <[^>]*> 00000000 nop
0+0338 <[^>]*> 5802ffff blezc v0,00000338 <[^>]*>
[ ]*338: R_MIPS_PC16 ext
0+033c <[^>]*> 00000000 nop
0+0340 <[^>]*> 58028000 blezc v0,fffe0344 <[^>]*>
[ ]*340: R_MIPS_PC16 L0.
[ ]*340: R_MIPS_PC16 L0.*
0+0344 <[^>]*> 00000000 nop
0+0348 <[^>]*> 58027fff blezc v0,00020348 <[^>]*>
[ ]*348: R_MIPS_PC16 L0.
[ ]*348: R_MIPS_PC16 L0.*
0+034c <[^>]*> 00000000 nop
0+0350 <[^>]*> 5802ffff blezc v0,00000350 <[^>]*>
[ ]*350: R_MIPS_PC16 .L1.2
[ ]*350: R_MIPS_PC16 .L1.*2
0+0354 <[^>]*> 00000000 nop
0+0358 <[^>]*> 5842ffff bgezc v0,00000358 <[^>]*>
[ ]*358: R_MIPS_PC16 ext
0+035c <[^>]*> 00000000 nop
0+0360 <[^>]*> 58428000 bgezc v0,fffe0364 <[^>]*>
[ ]*360: R_MIPS_PC16 L0.
[ ]*360: R_MIPS_PC16 L0.*
0+0364 <[^>]*> 00000000 nop
0+0368 <[^>]*> 58427fff bgezc v0,00020368 <[^>]*>
[ ]*368: R_MIPS_PC16 L0.
[ ]*368: R_MIPS_PC16 L0.*
0+036c <[^>]*> 00000000 nop
0+0370 <[^>]*> 5842ffff bgezc v0,00000370 <[^>]*>
[ ]*370: R_MIPS_PC16 .L1.2
[ ]*370: R_MIPS_PC16 .L1.*2
0+0374 <[^>]*> 00000000 nop
0+0378 <[^>]*> 5843ffff bgec v0,v1,00000378 <[^>]*>
[ ]*378: R_MIPS_PC16 ext
0+037c <[^>]*> 00000000 nop
0+0380 <[^>]*> 58438000 bgec v0,v1,fffe0384 <[^>]*>
[ ]*380: R_MIPS_PC16 L0.
[ ]*380: R_MIPS_PC16 L0.*
0+0384 <[^>]*> 00000000 nop
0+0388 <[^>]*> 58437fff bgec v0,v1,00020388 <[^>]*>
[ ]*388: R_MIPS_PC16 L0.
[ ]*388: R_MIPS_PC16 L0.*
0+038c <[^>]*> 00000000 nop
0+0390 <[^>]*> 5843ffff bgec v0,v1,00000390 <[^>]*>
[ ]*390: R_MIPS_PC16 .L1.2
[ ]*390: R_MIPS_PC16 .L1.*2
0+0394 <[^>]*> 00000000 nop
0+0398 <[^>]*> 5862ffff bgec v1,v0,00000398 <[^>]*>
[ ]*398: R_MIPS_PC16 .L1.2
[ ]*398: R_MIPS_PC16 .L1.*2
0+039c <[^>]*> 00000000 nop
0+03a0 <[^>]*> 5c02ffff bgtzc v0,000003a0 <[^>]*>
[ ]*3a0: R_MIPS_PC16 ext
0+03a4 <[^>]*> 00000000 nop
0+03a8 <[^>]*> 5c028000 bgtzc v0,fffe03ac <[^>]*>
[ ]*3a8: R_MIPS_PC16 L0.
[ ]*3a8: R_MIPS_PC16 L0.*
0+03ac <[^>]*> 00000000 nop
0+03b0 <[^>]*> 5c027fff bgtzc v0,000203b0 <[^>]*>
[ ]*3b0: R_MIPS_PC16 L0.
[ ]*3b0: R_MIPS_PC16 L0.*
0+03b4 <[^>]*> 00000000 nop
0+03b8 <[^>]*> 5c02ffff bgtzc v0,000003b8 <[^>]*>
[ ]*3b8: R_MIPS_PC16 .L1.2
[ ]*3b8: R_MIPS_PC16 .L1.*2
0+03bc <[^>]*> 00000000 nop
0+03c0 <[^>]*> 5c42ffff bltzc v0,000003c0 <[^>]*>
[ ]*3c0: R_MIPS_PC16 ext
0+03c4 <[^>]*> 00000000 nop
0+03c8 <[^>]*> 5c428000 bltzc v0,fffe03cc <[^>]*>
[ ]*3c8: R_MIPS_PC16 L0.
[ ]*3c8: R_MIPS_PC16 L0.*
0+03cc <[^>]*> 00000000 nop
0+03d0 <[^>]*> 5c427fff bltzc v0,000203d0 <[^>]*>
[ ]*3d0: R_MIPS_PC16 L0.
[ ]*3d0: R_MIPS_PC16 L0.*
0+03d4 <[^>]*> 00000000 nop
0+03d8 <[^>]*> 5c42ffff bltzc v0,000003d8 <[^>]*>
[ ]*3d8: R_MIPS_PC16 .L1.2
[ ]*3d8: R_MIPS_PC16 .L1.*2
0+03dc <[^>]*> 00000000 nop
0+03e0 <[^>]*> 5c43ffff bltc v0,v1,000003e0 <[^>]*>
[ ]*3e0: R_MIPS_PC16 ext
0+03e4 <[^>]*> 00000000 nop
0+03e8 <[^>]*> 5c438000 bltc v0,v1,fffe03ec <[^>]*>
[ ]*3e8: R_MIPS_PC16 L0.
[ ]*3e8: R_MIPS_PC16 L0.*
0+03ec <[^>]*> 00000000 nop
0+03f0 <[^>]*> 5c437fff bltc v0,v1,000203f0 <[^>]*>
[ ]*3f0: R_MIPS_PC16 L0.
[ ]*3f0: R_MIPS_PC16 L0.*
0+03f4 <[^>]*> 00000000 nop
0+03f8 <[^>]*> 5c43ffff bltc v0,v1,000003f8 <[^>]*>
[ ]*3f8: R_MIPS_PC16 .L1.2
[ ]*3f8: R_MIPS_PC16 .L1.*2
0+03fc <[^>]*> 00000000 nop
0+0400 <[^>]*> 5c62ffff bltc v1,v0,00000400 <[^>]*>
[ ]*400: R_MIPS_PC16 .L1.2
[ ]*400: R_MIPS_PC16 .L1.*2
0+0404 <[^>]*> 00000000 nop
0+0408 <[^>]*> 1802ffff blezalc v0,00000408 <[^>]*>
[ ]*408: R_MIPS_PC16 ext
0+040c <[^>]*> 00000000 nop
0+0410 <[^>]*> 18028000 blezalc v0,fffe0414 <[^>]*>
[ ]*410: R_MIPS_PC16 L0.
[ ]*410: R_MIPS_PC16 L0.*
0+0414 <[^>]*> 00000000 nop
0+0418 <[^>]*> 18027fff blezalc v0,00020418 <[^>]*>
[ ]*418: R_MIPS_PC16 L0.
[ ]*418: R_MIPS_PC16 L0.*
0+041c <[^>]*> 00000000 nop
0+0420 <[^>]*> 1802ffff blezalc v0,00000420 <[^>]*>
[ ]*420: R_MIPS_PC16 .L1.2
[ ]*420: R_MIPS_PC16 .L1.*2
0+0424 <[^>]*> 00000000 nop
0+0428 <[^>]*> 1842ffff bgezalc v0,00000428 <[^>]*>
[ ]*428: R_MIPS_PC16 ext
0+042c <[^>]*> 00000000 nop
0+0430 <[^>]*> 18428000 bgezalc v0,fffe0434 <[^>]*>
[ ]*430: R_MIPS_PC16 L0.
[ ]*430: R_MIPS_PC16 L0.*
0+0434 <[^>]*> 00000000 nop
0+0438 <[^>]*> 18427fff bgezalc v0,00020438 <[^>]*>
[ ]*438: R_MIPS_PC16 L0.
[ ]*438: R_MIPS_PC16 L0.*
0+043c <[^>]*> 00000000 nop
0+0440 <[^>]*> 1842ffff bgezalc v0,00000440 <[^>]*>
[ ]*440: R_MIPS_PC16 .L1.2
[ ]*440: R_MIPS_PC16 .L1.*2
0+0444 <[^>]*> 00000000 nop
0+0448 <[^>]*> 1843ffff bgeuc v0,v1,00000448 <[^>]*>
[ ]*448: R_MIPS_PC16 ext
0+044c <[^>]*> 00000000 nop
0+0450 <[^>]*> 18438000 bgeuc v0,v1,fffe0454 <[^>]*>
[ ]*450: R_MIPS_PC16 L0.
[ ]*450: R_MIPS_PC16 L0.*
0+0454 <[^>]*> 00000000 nop
0+0458 <[^>]*> 18437fff bgeuc v0,v1,00020458 <[^>]*>
[ ]*458: R_MIPS_PC16 L0.
[ ]*458: R_MIPS_PC16 L0.*
0+045c <[^>]*> 00000000 nop
0+0460 <[^>]*> 1843ffff bgeuc v0,v1,00000460 <[^>]*>
[ ]*460: R_MIPS_PC16 .L1.2
[ ]*460: R_MIPS_PC16 .L1.*2
0+0464 <[^>]*> 00000000 nop
0+0468 <[^>]*> 1862ffff bgeuc v1,v0,00000468 <[^>]*>
[ ]*468: R_MIPS_PC16 .L1.2
[ ]*468: R_MIPS_PC16 .L1.*2
0+046c <[^>]*> 00000000 nop
0+0470 <[^>]*> 1c02ffff bgtzalc v0,00000470 <[^>]*>
[ ]*470: R_MIPS_PC16 ext
0+0474 <[^>]*> 00000000 nop
0+0478 <[^>]*> 1c028000 bgtzalc v0,fffe047c <[^>]*>
[ ]*478: R_MIPS_PC16 L0.
[ ]*478: R_MIPS_PC16 L0.*
0+047c <[^>]*> 00000000 nop
0+0480 <[^>]*> 1c027fff bgtzalc v0,00020480 <[^>]*>
[ ]*480: R_MIPS_PC16 L0.
[ ]*480: R_MIPS_PC16 L0.*
0+0484 <[^>]*> 00000000 nop
0+0488 <[^>]*> 1c02ffff bgtzalc v0,00000488 <[^>]*>
[ ]*488: R_MIPS_PC16 .L1.2
[ ]*488: R_MIPS_PC16 .L1.*2
0+048c <[^>]*> 00000000 nop
0+0490 <[^>]*> 1c42ffff bltzalc v0,00000490 <[^>]*>
[ ]*490: R_MIPS_PC16 ext
0+0494 <[^>]*> 00000000 nop
0+0498 <[^>]*> 1c428000 bltzalc v0,fffe049c <[^>]*>
[ ]*498: R_MIPS_PC16 L0.
[ ]*498: R_MIPS_PC16 L0.*
0+049c <[^>]*> 00000000 nop
0+04a0 <[^>]*> 1c427fff bltzalc v0,000204a0 <[^>]*>
[ ]*4a0: R_MIPS_PC16 L0.
[ ]*4a0: R_MIPS_PC16 L0.*
0+04a4 <[^>]*> 00000000 nop
0+04a8 <[^>]*> 1c42ffff bltzalc v0,000004a8 <[^>]*>
[ ]*4a8: R_MIPS_PC16 .L1.2
[ ]*4a8: R_MIPS_PC16 .L1.*2
0+04ac <[^>]*> 00000000 nop
0+04b0 <[^>]*> 1c43ffff bltuc v0,v1,000004b0 <[^>]*>
[ ]*4b0: R_MIPS_PC16 ext
0+04b4 <[^>]*> 00000000 nop
0+04b8 <[^>]*> 1c438000 bltuc v0,v1,fffe04bc <[^>]*>
[ ]*4b8: R_MIPS_PC16 L0.
[ ]*4b8: R_MIPS_PC16 L0.*
0+04bc <[^>]*> 00000000 nop
0+04c0 <[^>]*> 1c437fff bltuc v0,v1,000204c0 <[^>]*>
[ ]*4c0: R_MIPS_PC16 L0.
[ ]*4c0: R_MIPS_PC16 L0.*
0+04c4 <[^>]*> 00000000 nop
0+04c8 <[^>]*> 1c43ffff bltuc v0,v1,000004c8 <[^>]*>
[ ]*4c8: R_MIPS_PC16 .L1.2
[ ]*4c8: R_MIPS_PC16 .L1.*2
0+04cc <[^>]*> 00000000 nop
0+04d0 <[^>]*> 1c62ffff bltuc v1,v0,000004d0 <[^>]*>
[ ]*4d0: R_MIPS_PC16 .L1.2
[ ]*4d0: R_MIPS_PC16 .L1.*2
0+04d4 <[^>]*> 00000000 nop
0+04d8 <[^>]*> cbffffff bc 000004d8 <[^>]*>
[ ]*4d8: R_MIPS_PC26_S2 ext
0+04dc <[^>]*> ca000000 bc f80004e0 <[^>]*>
[ ]*4dc: R_MIPS_PC26_S2 L0.
[ ]*4dc: R_MIPS_PC26_S2 L0.*
0+04e0 <[^>]*> c9ffffff bc 080004e0 <[^>]*>
[ ]*4e0: R_MIPS_PC26_S2 L0.
[ ]*4e0: R_MIPS_PC26_S2 L0.*
0+04e4 <[^>]*> cbffffff bc 000004e4 <[^>]*>
[ ]*4e4: R_MIPS_PC26_S2 .L1.2
[ ]*4e4: R_MIPS_PC26_S2 .L1.*2
0+04e8 <[^>]*> ebffffff balc 000004e8 <[^>]*>
[ ]*4e8: R_MIPS_PC26_S2 ext
0+04ec <[^>]*> ea000000 balc f80004f0 <[^>]*>
[ ]*4ec: R_MIPS_PC26_S2 L0.
[ ]*4ec: R_MIPS_PC26_S2 L0.*
0+04f0 <[^>]*> e9ffffff balc 080004f0 <[^>]*>
[ ]*4f0: R_MIPS_PC26_S2 L0.
[ ]*4f0: R_MIPS_PC26_S2 L0.*
0+04f4 <[^>]*> ebffffff balc 000004f4 <[^>]*>
[ ]*4f4: R_MIPS_PC26_S2 .L1.2
[ ]*4f4: R_MIPS_PC26_S2 .L1.*2
0+04f8 <[^>]*> d85fffff beqzc v0,000004f8 <[^>]*>
[ ]*4f8: R_MIPS_PC21_S2 ext
0+04fc <[^>]*> 00000000 nop
0+0500 <[^>]*> d8500000 beqzc v0,ffc00504 <[^>]*>
[ ]*500: R_MIPS_PC21_S2 L0.
[ ]*500: R_MIPS_PC21_S2 L0.*
0+0504 <[^>]*> 00000000 nop
0+0508 <[^>]*> d84fffff beqzc v0,00400508 <[^>]*>
[ ]*508: R_MIPS_PC21_S2 L0.
[ ]*508: R_MIPS_PC21_S2 L0.*
0+050c <[^>]*> 00000000 nop
0+0510 <[^>]*> d85fffff beqzc v0,00000510 <[^>]*>
[ ]*510: R_MIPS_PC21_S2 .L1.2
[ ]*510: R_MIPS_PC21_S2 .L1.*2
0+0514 <[^>]*> 00000000 nop
0+0518 <[^>]*> d8038000 jic v1,-32768
0+051c <[^>]*> d8037fff jic v1,32767
@ -458,33 +458,33 @@ Disassembly of section .text:
[ ]*524: R_MIPS_PC21_S2 ext
0+0528 <[^>]*> 00000000 nop
0+052c <[^>]*> f8500000 bnezc v0,ffc00530 <[^>]*>
[ ]*52c: R_MIPS_PC21_S2 L0.
[ ]*52c: R_MIPS_PC21_S2 L0.*
0+0530 <[^>]*> 00000000 nop
0+0534 <[^>]*> f84fffff bnezc v0,00400534 <[^>]*>
[ ]*534: R_MIPS_PC21_S2 L0.
[ ]*534: R_MIPS_PC21_S2 L0.*
0+0538 <[^>]*> 00000000 nop
0+053c <[^>]*> f85fffff bnezc v0,0000053c <[^>]*>
[ ]*53c: R_MIPS_PC21_S2 .L1.2
[ ]*53c: R_MIPS_PC21_S2 .L1.*2
0+0540 <[^>]*> 00000000 nop
0+0544 <[^>]*> f8038000 jialc v1,-32768
0+0548 <[^>]*> f8037fff jialc v1,32767
0+054c <[^>]*> 3c43ffff aui v1,v0,0xffff
0+0550 <[^>]*> ec600000 lapc v1,00000550 <[^>]*>
[ ]*550: R_MIPS_PC19_S2 .L1.2
[ ]*550: R_MIPS_PC19_S2 .L1.*2
0+0554 <[^>]*> ec840000 lapc a0,fff00554 <[^>]*>
[ ]*554: R_MIPS_PC19_S2 L0.
[ ]*554: R_MIPS_PC19_S2 L0.*
0+0558 <[^>]*> ec83ffff lapc a0,00100554 <[^>]*>
[ ]*558: R_MIPS_PC19_S2 L0.
[ ]*558: R_MIPS_PC19_S2 L0.*
0+055c <[^>]*> ec840000 lapc a0,fff0055c <[^>]*>
0+0560 <[^>]*> ec83ffff lapc a0,0010055c <[^>]*>
0+0564 <[^>]*> ec7effff auipc v1,0xffff
0+0568 <[^>]*> ec7fffff aluipc v1,0xffff
0+056c <[^>]*> ec880000 lwpc a0,0000056c <[^>]*>
[ ]*56c: R_MIPS_PC19_S2 .L1.2
[ ]*56c: R_MIPS_PC19_S2 .L1.*2
0+0570 <[^>]*> ec8c0000 lwpc a0,fff00570 <[^>]*>
[ ]*570: R_MIPS_PC19_S2 L0.
[ ]*570: R_MIPS_PC19_S2 L0.*
0+0574 <[^>]*> ec8bffff lwpc a0,00100570 <[^>]*>
[ ]*574: R_MIPS_PC19_S2 L0.
[ ]*574: R_MIPS_PC19_S2 L0.*
0+0578 <[^>]*> ec8c0000 lwpc a0,fff00578 <[^>]*>
0+057c <[^>]*> ec8bffff lwpc a0,00100578 <[^>]*>
0+0580 <[^>]*> 00000000 nop

6
gas/testsuite/gas/mips/tmips16-e.d
View File

@ -12,7 +12,7 @@ SYMBOL TABLE:
0+0000000 l d \.data 0+0000000 (|\.data)
0+0000000 l d \.bss 0+0000000 (|\.bss)
0+0000002 l \.text 0+0000000 0xf0 l1
0+0000004 l \.text 0+0000000 0xf0 \.L1.1
0+0000004 l \.text 0+0000000 0xf0 \.L1.*1
0+0000000 l d foo 0+0000000 (|foo)
0+0000000 l d \.reginfo 0+0000000 (|\.reginfo)
0+0000000 l d \.MIPS\.abiflags 0+0000000 (|\.MIPS\.abiflags)
@ -25,8 +25,8 @@ RELOCATION RECORDS FOR \[foo\]:
OFFSET [ ]+ TYPE VALUE
0+0000000 R_MIPS_32 l1
0+0000004 R_MIPS_32 l1
0+0000008 R_MIPS_32 \.L1.1
0+000000c R_MIPS_32 \.L1.1
0+0000008 R_MIPS_32 \.L1.*1
0+000000c R_MIPS_32 \.L1.*1
0+0000010 R_MIPS_32 g1
0+0000014 R_MIPS_32 g1

6
gas/testsuite/gas/mips/tmipsel16-e.d
View File

@ -12,7 +12,7 @@ SYMBOL TABLE:
0+0000000 l d \.data 0+0000000 (|\.data)
0+0000000 l d \.bss 0+0000000 (|\.bss)
0+0000002 l \.text 0+0000000 0xf0 l1
0+0000004 l \.text 0+0000000 0xf0 \.L1.1
0+0000004 l \.text 0+0000000 0xf0 \.L1.*1
0+0000000 l d foo 0+0000000 (|foo)
0+0000000 l d \.reginfo 0+0000000 (|\.reginfo)
0+0000000 l d \.MIPS\.abiflags 0+0000000 (|\.MIPS\.abiflags)
@ -25,8 +25,8 @@ RELOCATION RECORDS FOR \[foo\]:
OFFSET [ ]+ TYPE VALUE
0+0000000 R_MIPS_32 l1
0+0000004 R_MIPS_32 l1
0+0000008 R_MIPS_32 \.L1.1
0+000000c R_MIPS_32 \.L1.1
0+0000008 R_MIPS_32 \.L1.*1
0+000000c R_MIPS_32 \.L1.*1
0+0000010 R_MIPS_32 g1
0+0000014 R_MIPS_32 g1

12
gas/testsuite/gas/mn10300/relax.d
View File

@ -5,32 +5,32 @@
RELOCATION RECORDS FOR \[.rlcb\]:
OFFSET TYPE VALUE
0+8003 R_MN10300_PCREL8 .L0._0\+0x00000001
0+8003 R_MN10300_PCREL8 .L0.*_0\+0x00000001
0+8005 R_MN10300_PCREL32 .L1\+0x00000001
RELOCATION RECORDS FOR \[.rlfcb\]:
OFFSET TYPE VALUE
0+8004 R_MN10300_PCREL8 .L0._1\+0x00000002
0+8004 R_MN10300_PCREL8 .L0.*_1\+0x00000002
0+8006 R_MN10300_PCREL32 .L2\+0x00000001
RELOCATION RECORDS FOR \[.rscb\]:
OFFSET TYPE VALUE
0+103 R_MN10300_PCREL8 .L0._2\+0x00000001
0+103 R_MN10300_PCREL8 .L0.*_2\+0x00000001
0+105 R_MN10300_PCREL16 .L3\+0x00000001
RELOCATION RECORDS FOR \[.rsfcb\]:
OFFSET TYPE VALUE
0+104 R_MN10300_PCREL8 .L0._3\+0x00000002
0+104 R_MN10300_PCREL8 .L0.*_3\+0x00000002
0+106 R_MN10300_PCREL16 .L4\+0x00000001
RELOCATION RECORDS FOR \[.rsucb\]:
OFFSET TYPE VALUE
0+104 R_MN10300_PCREL8 .L0._4\+0x00000002
0+104 R_MN10300_PCREL8 .L0.*_4\+0x00000002
0+106 R_MN10300_PCREL16 .L5\+0x00000001
RELOCATION RECORDS FOR \[.rlucb\]:
OFFSET TYPE VALUE
0+8004 R_MN10300_PCREL8 .L0._5\+0x00000002
0+8004 R_MN10300_PCREL8 .L0.*_5\+0x00000002
0+8006 R_MN10300_PCREL32 .L6\+0x00000001