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[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC

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2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
This commit is contained in:
Jiong Wang 2015-08-19 10:57:34 +01:00
parent 45face3ba1
commit 13289c10e2
13 changed files with 85 additions and 0 deletions
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8
bfd/ChangeLog
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@ -1,3 +1,11 @@
2015-08-19 Jiong Wang <jiong.wang@arm.com>
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
2015-08-19 Alan Modra <amodra@gmail.com>
* elf-s390-common.c: Simplify expressions using

3
bfd/bfd-in2.h
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@ -5797,6 +5797,9 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
/* Unsigned 12 bit byte offset to module TLS base address. */
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. */
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC,
/* Unsigned 12 bit byte offset to global offset table entry for a symbols
tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. */

15
bfd/elfnn-aarch64.c
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@ -1057,6 +1057,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. */
HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
/* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
0, /* rightshift */

1
bfd/libbfd.h
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@ -2760,6 +2760,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC",
"BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
"BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12",
"BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC",
"BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
"BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
"BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",

4
bfd/reloc.c
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@ -6847,6 +6847,10 @@ ENUM
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
ENUMDOC
Unsigned 12 bit byte offset to module TLS base address.
ENUM
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
ENUMDOC
No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
ENUM
BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
ENUMDOC

6
gas/ChangeLog
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@ -1,3 +1,9 @@
2015-08-19 Jiong Wang <jiong.wang@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifiers.
(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
(aarch64_force_relocation): Likewise.
2015-08-17 Alan Modra <amodra@gmail.com>
* gas/config/tc-arm.c (s_align): Delete.

11
gas/config/tc-aarch64.c
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@ -2531,6 +2531,15 @@ static struct reloc_table_entry reloc_table[] = {
0,
0},
/* Same as dtprel_lo12, no overflow check. */
{"dtprel_lo12_nc", 0,
0, /* adr_type */
0,
0,
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC,
0,
0},
/* Get to the page containing GOT TLS entry for a symbol */
{"gottprel", 0,
0, /* adr_type */
@ -6797,6 +6806,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
@ -7010,6 +7020,7 @@ aarch64_force_relocation (struct fix *fixp)
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:

7
gas/testsuite/ChangeLog
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@ -1,3 +1,10 @@
2015-08-19 Jiong Wang <jiong.wang@arm.com>
* gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
* gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
* gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
* gas/arm/nops.d: New.

10
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d Normal file
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@ -0,0 +1,10 @@
#as: -mabi=ilp32
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
00000000 <.*>:
0: 110002a8 add w8, w21, #0x0
0: R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC x

5
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s Normal file
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@ -0,0 +1,5 @@
// Test file for AArch64 GAS -- dtprel_lo12_nc ILP32
func:
// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
add w8, w21, #:dtprel_lo12_nc:x

9
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d Normal file
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@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 91000347 add x7, x26, #0x0
0: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC x

5
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.s Normal file
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@ -0,0 +1,5 @@
// Test file for AArch64 GAS -- dtprel_lo12_nc
func:
// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
add x7, x26, #:dtprel_lo12_nc:x

1
include/elf/aarch64.h
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@ -133,6 +133,7 @@ RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)