PR binutils/2877

* doc/as.texi: Fix spelling typo: branchs => branches.
* doc/c-m68hc11.texi: Likewise.
* config/tc-m68hc11.c: Likewise.
  Support old spelling of command line switch for backwards compatibility.
This commit is contained in:
Nick Clifton 2006-07-06 10:34:02 +00:00
parent d95ef3ab53
commit 1370e33d0d
4 changed files with 40 additions and 28 deletions

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@ -1,3 +1,13 @@
2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
Nick Clifton <nickc@redhat.com>
PR binutils/2877
* doc/as.texi: Fix spelling typo: branchs => branches.
* doc/c-m68hc11.texi: Likewise.
* config/tc-m68hc11.c: Likewise.
Support old spelling of command line switch for backwards
compatibility.
2006-07-04 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>

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@ -210,7 +210,7 @@ static void s_m68hc11_mark_symbol (int);
jmp L
Setting the flag forbidds this. */
static short flag_fixed_branchs = 0;
static short flag_fixed_branches = 0;
/* Force to use long jumps (absolute) instead of relative branches. */
static short flag_force_long_jumps = 0;
@ -290,10 +290,12 @@ const char *md_shortopts = "Sm:";
struct option md_longopts[] = {
#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE)
{"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
{"force-long-branches", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
{"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH}, /* Misspelt version kept for backwards compatibility. */
#define OPTION_SHORT_BRANCHS (OPTION_MD_BASE + 1)
{"short-branchs", no_argument, NULL, OPTION_SHORT_BRANCHS},
#define OPTION_SHORT_BRANCHES (OPTION_MD_BASE + 1)
{"short-branches", no_argument, NULL, OPTION_SHORT_BRANCHES},
{"short-branchs", no_argument, NULL, OPTION_SHORT_BRANCHES}, /* Misspelt version kept for backwards compatibility. */
#define OPTION_STRICT_DIRECT_MODE (OPTION_MD_BASE + 2)
{"strict-direct-mode", no_argument, NULL, OPTION_STRICT_DIRECT_MODE},
@ -374,8 +376,8 @@ Motorola 68HC11/68HC12/68HCS12 options:\n\
-mlong use 32-bit int ABI\n\
-mshort-double use 32-bit double ABI\n\
-mlong-double use 64-bit double ABI (default)\n\
--force-long-branchs always turn relative branchs into absolute ones\n\
-S,--short-branchs do not turn relative branchs into absolute ones\n\
--force-long-branches always turn relative branches into absolute ones\n\
-S,--short-branches do not turn relative branches into absolute ones\n\
when the offset is out of range\n\
--strict-direct-mode do not turn the direct mode into extended mode\n\
when the instruction does not support direct mode\n\
@ -447,9 +449,9 @@ md_parse_option (int c, char *arg)
switch (c)
{
/* -S means keep external to 2 bit offset rather than 16 bit one. */
case OPTION_SHORT_BRANCHS:
case OPTION_SHORT_BRANCHES:
case 'S':
flag_fixed_branchs = 1;
flag_fixed_branches = 1;
break;
case OPTION_FORCE_LONG_BRANCH:
@ -1587,7 +1589,7 @@ build_jump_insn (struct m68hc11_opcode *opcode, operand operands[],
if ((jmp_mode == 0 && flag_force_long_jumps)
|| (operands[0].exp.X_op == O_constant
&& (!check_range (n, opcode->format) &&
(jmp_mode == 1 || flag_fixed_branchs == 0))))
(jmp_mode == 1 || flag_fixed_branches == 0))))
{
frag = frag_now;
where = frag_now_fix ();
@ -1671,7 +1673,7 @@ build_jump_insn (struct m68hc11_opcode *opcode, operand operands[],
&abs_symbol, 0, 1, BFD_RELOC_M68HC11_RL_JUMP);
/* Branch offset must fit in 8-bits, don't do some relax. */
if (jmp_mode == 0 && flag_fixed_branchs)
if (jmp_mode == 0 && flag_fixed_branches)
{
opcode = m68hc11_new_insn (1);
number_to_chars_bigendian (opcode, code, 1);
@ -1753,7 +1755,7 @@ build_dbranch_insn (struct m68hc11_opcode *opcode, operand operands[],
if ((jmp_mode == 0 && flag_force_long_jumps)
|| (operands[1].exp.X_op == O_constant
&& (!check_range (n, M6812_OP_IBCC_MARKER) &&
(jmp_mode == 1 || flag_fixed_branchs == 0))))
(jmp_mode == 1 || flag_fixed_branches == 0))))
{
f = frag_more (2);
code ^= 0x20;
@ -1784,7 +1786,7 @@ build_dbranch_insn (struct m68hc11_opcode *opcode, operand operands[],
else
{
/* Branch offset must fit in 8-bits, don't do some relax. */
if (jmp_mode == 0 && flag_fixed_branchs)
if (jmp_mode == 0 && flag_fixed_branches)
{
fixup8 (&operands[0].exp, M6811_OP_JUMP_REL, M6811_OP_JUMP_REL);
}
@ -2484,8 +2486,8 @@ md_assemble (char *str)
opc = (struct m68hc11_opcode_def *) hash_find (m68hc11_hash, name);
/* If it's not recognized, look for 'jbsr' and 'jbxx'. These are
pseudo insns for relative branch. For these branchs, we always
optimize them (turned into absolute branchs) even if --short-branchs
pseudo insns for relative branch. For these branches, we always
optimize them (turned into absolute branches) even if --short-branches
is given. */
if (opc == NULL && name[0] == 'j' && name[1] == 'b')
{
@ -3018,7 +3020,7 @@ md_estimate_size_before_relax (fragS *fragP, asection *segment)
|| IS_OPCODE (fragP->fr_opcode[0], M6811_BRA)
|| IS_OPCODE (fragP->fr_opcode[0], M6812_BSR));
if (flag_fixed_branchs)
if (flag_fixed_branches)
as_bad_where (fragP->fr_file, fragP->fr_line,
_("bra or bsr with undefined symbol."));

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@ -344,7 +344,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-m68hc11}|@b{-m68hc12}|@b{-m68hcs12}]
[@b{-mshort}|@b{-mlong}]
[@b{-mshort-double}|@b{-mlong-double}]
[@b{--force-long-branchs}] [@b{--short-branchs}]
[@b{--force-long-branches}] [@b{--short-branches}]
[@b{--strict-direct-mode}] [@b{--print-insn-syntax}]
[@b{--print-opcodes}] [@b{--generate-example}]
@end ifset
@ -868,13 +868,13 @@ Specify to use the 32-bit double ABI.
@item -mlong-double
Specify to use the 64-bit double ABI.
@item --force-long-branchs
@item --force-long-branches
Relative branches are turned into absolute ones. This concerns
conditional branches, unconditional branches and branches to a
sub routine.
@item -S | --short-branchs
Do not turn relative branchs into absolute ones
@item -S | --short-branches
Do not turn relative branches into absolute ones
when the offset is out of range.
@item --strict-direct-mode

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@ -82,9 +82,9 @@ mode addressing. When it is used with the direct page mode,
This option prevents @code{@value{AS}} from doing this, and the wrong
usage of the direct page mode will raise an error.
@cindex @samp{--short-branchs}
@item --short-branchs
The @samp{--short-branchs} option turns off the translation of
@cindex @samp{--short-branches}
@item --short-branches
The @samp{--short-branches} option turns off the translation of
relative branches into absolute branches when the branch offset is
out of range. By default @code{@value{AS}} transforms the relative
branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne},
@ -93,15 +93,15 @@ branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne},
an absolute branch when the offset is out of the -128 .. 127 range.
In that case, the @samp{bsr} instruction is translated into a
@samp{jsr}, the @samp{bra} instruction is translated into a
@samp{jmp} and the conditional branchs instructions are inverted and
@samp{jmp} and the conditional branches instructions are inverted and
followed by a @samp{jmp}. This option disables these translations
and @code{@value{AS}} will generate an error if a relative branch
is out of range. This option does not affect the optimization
associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes.
@cindex @samp{--force-long-branchs}
@item --force-long-branchs
The @samp{--force-long-branchs} option forces the translation of
@cindex @samp{--force-long-branches}
@item --force-long-branches
The @samp{--force-long-branches} option forces the translation of
relative branches into absolute branches. This option does not affect
the optimization associated to the @samp{jbra}, @samp{jbsr} and
@samp{jbXX} pseudo opcodes.
@ -382,7 +382,7 @@ Certain pseudo opcodes are permitted for branch instructions.
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by prepending @samp{j} to
the start of Motorola mnemonic. These pseudo opcodes are not affected
by the @samp{--short-branchs} or @samp{--force-long-branchs} options.
by the @samp{--short-branches} or @samp{--force-long-branches} options.
The following table summarizes the pseudo-operations.
@ -390,7 +390,7 @@ The following table summarizes the pseudo-operations.
Displacement Width
+-------------------------------------------------------------+
| Options |
| --short-branchs --force-long-branchs |
| --short-branches --force-long-branches |
+--------------------------+----------------------------------+
Op |BYTE WORD | BYTE WORD |
+--------------------------+----------------------------------+