x86: correct operand type checks
Again these look to be typos: No template currently allows for any two (or all three) of RegXMM, RegYMM, and RegZMM in a single operand. Quite clearly ! are missing, after the addition of which the checks for the first and (if present) second operands also fully match up.
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@ -1,3 +1,8 @@
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2017-12-15 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (match_template): Add missing ! to
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reg{x,y,z}mm checks in q- and l-suffix handling.
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2017-12-15 Jan Beulich <jbeulich@suse.com>
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2017-12-15 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (build_modrm_byte): Add missing ! to reg64
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* config/tc-i386.c (build_modrm_byte): Add missing ! to reg64
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@ -4968,9 +4968,9 @@ match_template (char mnem_suffix)
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&& !operand_types[0].bitfield.regymm
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&& !operand_types[0].bitfield.regymm
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&& !operand_types[0].bitfield.regzmm)
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&& !operand_types[0].bitfield.regzmm)
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|| (!operand_types[t->operands > 1].bitfield.regmmx
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|| (!operand_types[t->operands > 1].bitfield.regmmx
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&& operand_types[t->operands > 1].bitfield.regxmm
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&& !operand_types[t->operands > 1].bitfield.regxmm
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&& operand_types[t->operands > 1].bitfield.regymm
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&& !operand_types[t->operands > 1].bitfield.regymm
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&& operand_types[t->operands > 1].bitfield.regzmm))
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&& !operand_types[t->operands > 1].bitfield.regzmm))
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&& (t->base_opcode != 0x0fc7
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&& (t->base_opcode != 0x0fc7
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|| t->extension_opcode != 1 /* cmpxchg8b */))
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|| t->extension_opcode != 1 /* cmpxchg8b */))
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continue;
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continue;
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@ -4985,7 +4985,7 @@ match_template (char mnem_suffix)
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&& ((!operand_types[0].bitfield.regmmx
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&& ((!operand_types[0].bitfield.regmmx
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&& !operand_types[0].bitfield.regxmm)
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&& !operand_types[0].bitfield.regxmm)
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|| (!operand_types[t->operands > 1].bitfield.regmmx
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|| (!operand_types[t->operands > 1].bitfield.regmmx
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&& operand_types[t->operands > 1].bitfield.regxmm)))
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&& !operand_types[t->operands > 1].bitfield.regxmm)))
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continue;
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continue;
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/* Do not verify operands when there are none. */
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/* Do not verify operands when there are none. */
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