Add AArch64 SVE to NEWS and GDB manual
gdb/ * NEWS: Add SVE to 8.2 section. gdb/doc/ * doc/gdb.texinfo (AArch64 SVE): New subsubsection.
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2018-08-21 Alan Hayward <alan.hayward@arm.com>
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* NEWS: Add SVE to 8.2 section.
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2018-08-21 Pedro Alves <palves@redhat.com>
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* guile/scm-utils.c (gdbscm_parse_function_args_1): New, factored
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@ -90,6 +90,9 @@ GNU/Linux/RISC-V riscv*-*-linux*
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* C expressions can now use _Alignof, and C++ expressions can now use
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alignof.
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* Support for SVE on AArch64 Linux. Note that GDB does not detect changes to
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the vector length while the process is running.
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* New commands
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set debug fbsd-nat
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@ -1,3 +1,7 @@
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2018-08-21 Alan Hayward <alan.hayward@arm.com>
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* gdb.texinfo (AArch64 SVE): New subsubsection.
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2018-08-14 Jan Vrany <jan.vrany@fit.cvut.cz>
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* gdb.texinfo (GDB/MI Data Manipulation): Document
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@ -23451,6 +23451,22 @@ Show whether AArch64 debugging messages are displayed.
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@end table
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@subsubsection AArch64 SVE.
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@cindex AArch64 SVE.
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When @value{GDBN} is debugging the AArch64 architecture, if the Scalable Vector
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Extension (SVE) is present, then @value{GDBN} will provide the vector registers
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@code{$z0} through @code{$z31}, vector predicate registers @code{$p0} through
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@code{$p15}, and the @code{$ffr} register. In addition, the pseudo register
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@code{$vg} will be provided. This is the vector granule for the current thread
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and represents the number of 64-bit chunks in an SVE @code{z} register.
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If the vector length changes, then the @code{$vg} register will be updated,
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but the lengths of the @code{z} and @code{p} registers will not change. This
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is a known limitation of @value{GDBN} and does not affect the execution of the
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target process.
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@node i386
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@subsection x86 Architecture-specific Issues
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