microMIPS/GAS: Handle several percent-ops with macros
In the microMIPS mode also accept %half, %got, %call, %got_hi, %got_lo, %call_hi, %call_lo, %neg, %got_page, %highest, %got_disp, %tlsgd, %tlsldm, %dtprel_hi, %dtprel_lo, %gottprel, %tprel_hi and %tprel_lo percent-ops with macros, so that they can be used with instructions that expand into sequences if relocation is required due to their limited offset span, such as LL, LWL, etc., fixing GAS assertions: .../gas/testsuite/gas/mips/elf-rel28.s: Assembler messages: .../gas/testsuite/gas/mips/elf-rel28.s:17: Internal error in macro_build at .../gas/config/tc-mips.c:8854. Please report this bug. observed if an attempt is made to assemble the `elf-rel28.s' test case modified to use one of the affected instructions to microMIPS code. gas/ * config/tc-mips.c (macro_build) <'i', 'j'>: Also accept BFD_RELOC_16, BFD_RELOC_MIPS_GOT16, BFD_RELOC_MIPS_CALL16, BFD_RELOC_MIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16, BFD_RELOC_MIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16, BFD_RELOC_MIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE, BFD_RELOC_MIPS_HIGHEST, BFD_RELOC_MIPS_GOT_DISP, BFD_RELOC_MIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM, BFD_RELOC_MIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16, BFD_RELOC_MIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL_HI16 and BFD_RELOC_MIPS_TLS_TPREL_LO16 relocations if in the microMIPS mode. * testsuite/gas/mips/elf-rel28-lldscd-n32.d: New test. * testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d: New test. * testsuite/gas/mips/elf-rel28-lldscd-n64.d: New test. * testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d: New test. * testsuite/gas/mips/elf-rel28.s: Add instruction selection. * testsuite/gas/mips/mips.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki
parent
156f2c001e
commit
14c80123c0
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@ -1,3 +1,23 @@
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2018-07-02 Maciej W. Rozycki <macro@mips.com>
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* config/tc-mips.c (macro_build) <'i', 'j'>: Also accept
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BFD_RELOC_16, BFD_RELOC_MIPS_GOT16, BFD_RELOC_MIPS_CALL16,
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BFD_RELOC_MIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16,
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BFD_RELOC_MIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16,
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BFD_RELOC_MIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE,
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BFD_RELOC_MIPS_HIGHEST, BFD_RELOC_MIPS_GOT_DISP,
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BFD_RELOC_MIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM,
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BFD_RELOC_MIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16,
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BFD_RELOC_MIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL_HI16 and
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BFD_RELOC_MIPS_TLS_TPREL_LO16 relocations if in the microMIPS
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mode.
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* testsuite/gas/mips/elf-rel28-lldscd-n32.d: New test.
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* testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d: New test.
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* testsuite/gas/mips/elf-rel28-lldscd-n64.d: New test.
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* testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d: New test.
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* testsuite/gas/mips/elf-rel28.s: Add instruction selection.
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* testsuite/gas/mips/mips.exp: Run the new tests.
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2018-07-02 Maciej W. Rozycki <macro@mips.com>
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* testsuite/gas/mips/elf-rel28-micromips-n32.d: New test.
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@ -8851,7 +8851,26 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
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|| *r == BFD_RELOC_MIPS_HIGHER
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|| *r == BFD_RELOC_HI16_S
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|| *r == BFD_RELOC_LO16
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|| *r == BFD_RELOC_MIPS_GOT_OFST);
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|| *r == BFD_RELOC_MIPS_GOT_OFST
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|| (mips_opts.micromips
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&& (*r == BFD_RELOC_16
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|| *r == BFD_RELOC_MIPS_GOT16
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|| *r == BFD_RELOC_MIPS_CALL16
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|| *r == BFD_RELOC_MIPS_GOT_HI16
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|| *r == BFD_RELOC_MIPS_GOT_LO16
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|| *r == BFD_RELOC_MIPS_CALL_HI16
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|| *r == BFD_RELOC_MIPS_CALL_LO16
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|| *r == BFD_RELOC_MIPS_SUB
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|| *r == BFD_RELOC_MIPS_GOT_PAGE
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|| *r == BFD_RELOC_MIPS_HIGHEST
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|| *r == BFD_RELOC_MIPS_GOT_DISP
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|| *r == BFD_RELOC_MIPS_TLS_GD
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|| *r == BFD_RELOC_MIPS_TLS_LDM
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|| *r == BFD_RELOC_MIPS_TLS_DTPREL_HI16
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|| *r == BFD_RELOC_MIPS_TLS_DTPREL_LO16
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|| *r == BFD_RELOC_MIPS_TLS_GOTTPREL
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|| *r == BFD_RELOC_MIPS_TLS_TPREL_HI16
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|| *r == BFD_RELOC_MIPS_TLS_TPREL_LO16)));
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break;
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case 'o':
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@ -0,0 +1,138 @@
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#source: elf-rel28.s
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#as: -march=from-abi -mmicromips -n32 --defsym tlldscd=1
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#objdump: -dr
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#name: MIPS ELF reloc 28 (LLD/SCD, microMIPS, n32)
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.*: file format .*
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Disassembly of section \.text:
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.* <foo>:
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_CALL_HI16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_CALL_LO16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_CALL16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_DISP bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_PAGE bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_OFST bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_HI16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_LO16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GPREL16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MIPS_16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_HIGHEST bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_HIGHER bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_SUB bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_GD bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_LDM bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_DTPREL_HI16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_DTPREL_LO16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_TPREL_HI16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_TPREL_LO16 bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_GOTTPREL bar
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.*: 6081 7000 lld a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_CALL_HI16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_CALL_LO16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_CALL16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_DISP bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_PAGE bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_OFST bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_HI16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT_LO16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GOT16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_GPREL16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MIPS_16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_HIGHEST bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_HIGHER bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_SUB bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_GD bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_LDM bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_DTPREL_HI16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_DTPREL_LO16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_TPREL_HI16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_TPREL_LO16 bar
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.*: 6081 f000 scd a0,0\(at\)
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.*: 3024 0000 addiu at,a0,0
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.*: R_MICROMIPS_TLS_GOTTPREL bar
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.*: 6081 f000 scd a0,0\(at\)
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\.\.\.
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@ -0,0 +1,222 @@
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#source: elf-rel28.s
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#as: -march=from-abi -mmicromips -64 --defsym tlldscd=1
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#objdump: -dr
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#name: MIPS ELF reloc 28 (LLD/SCD, microMIPS, n64)
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.*: file format .*
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Disassembly of section \.text:
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.* <foo>:
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_CALL_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_CALL_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_CALL16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_GOT_DISP bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_GOT_PAGE bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_GOT_OFST bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_GOT_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_GOT_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_GOT16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_GPREL16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MIPS_16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_HIGHEST bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_HIGHER bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_SUB bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_TLS_GD bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_TLS_LDM bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_TLS_DTPREL_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_TLS_DTPREL_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_TLS_TPREL_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
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.*: 6081 7000 lld a0,0\(at\)
|
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.*: 5c24 0000 daddiu at,a0,0
|
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.*: R_MICROMIPS_TLS_TPREL_LO16 bar
|
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
|
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.*: 6081 7000 lld a0,0\(at\)
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_TLS_GOTTPREL bar
|
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
|
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.*: 6081 7000 lld a0,0\(at\)
|
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.*: 5c24 0000 daddiu at,a0,0
|
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.*: R_MICROMIPS_CALL_HI16 bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: 6081 f000 scd a0,0\(at\)
|
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.*: 5c24 0000 daddiu at,a0,0
|
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.*: R_MICROMIPS_CALL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: 6081 f000 scd a0,0\(at\)
|
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.*: 5c24 0000 daddiu at,a0,0
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.*: R_MICROMIPS_CALL16 bar
|
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.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_GOT_DISP bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_GOT_PAGE bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_GOT_OFST bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_GOT_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_GOT_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_GOT16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_GPREL16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MIPS_16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_HIGHEST bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_HIGHER bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_SUB bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_TLS_GD bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_TLS_LDM bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_TLS_DTPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_TLS_DTPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_TLS_TPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_TLS_TPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
.*: 5c24 0000 daddiu at,a0,0
|
||||
.*: R_MICROMIPS_TLS_GOTTPREL bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: 6081 f000 scd a0,0\(at\)
|
||||
\.\.\.
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
#source: elf-rel28.s
|
||||
#as: -march=from-abi -n32 --defsym tlldscd=1
|
||||
#objdump: -dr
|
||||
#name: MIPS ELF reloc 28 (LLD/SCD, n32)
|
||||
|
||||
.*: file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <foo>:
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_HI16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_LO16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_CALL16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_DISP bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_PAGE bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_OFST bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_HI16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_LO16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GPREL16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHEST bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHER bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_SUB bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GD bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_LDM bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_HI16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_LO16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_HI16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_LO16 bar
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GOTTPREL bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_HI16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_LO16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_CALL16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_DISP bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_PAGE bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_OFST bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_HI16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_LO16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GPREL16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHEST bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHER bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_SUB bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GD bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_LDM bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_HI16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_LO16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_HI16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_LO16 bar
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GOTTPREL bar
|
||||
\.\.\.
|
||||
|
|
@ -0,0 +1,180 @@
|
|||
#source: elf-rel28.s
|
||||
#as: -march=from-abi -64 --defsym tlldscd=1
|
||||
#objdump: -dr
|
||||
#name: MIPS ELF reloc 28 (LLD/SCD, n64)
|
||||
|
||||
.*: file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <foo>:
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_CALL16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_DISP bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_PAGE bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_OFST bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GOT16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_GPREL16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHEST bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHER bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_SUB bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GD bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_LDM bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: d0840000 lld a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GOTTPREL bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_CALL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_CALL16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_DISP bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_PAGE bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_OFST bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GOT16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_GPREL16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHEST bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHER bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_SUB bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GD bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_LDM bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: f0840000 scd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GOTTPREL bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
\.\.\.
|
||||
|
|
@ -1,3 +1,15 @@
|
|||
# By default test ld/sd.
|
||||
|
||||
# If defined, test lld/scd instead.
|
||||
.ifdef tlldscd
|
||||
.macro ld ops:vararg
|
||||
lld \ops
|
||||
.endm
|
||||
.macro sd ops:vararg
|
||||
scd \ops
|
||||
.endm
|
||||
.endif
|
||||
|
||||
.ent foo
|
||||
foo:
|
||||
# Many of these do not make conceptual sense, but they should
|
||||
|
|
|
|||
|
|
@ -1224,6 +1224,10 @@ if { [istarget mips*-*-vxworks*] } {
|
|||
run_dump_test "elf-rel28-micromips-n32"
|
||||
run_dump_test "elf-rel28-n64"
|
||||
run_dump_test "elf-rel28-micromips-n64"
|
||||
run_dump_test "elf-rel28-lldscd-n32"
|
||||
run_dump_test "elf-rel28-lldscd-micromips-n32"
|
||||
run_dump_test "elf-rel28-lldscd-n64"
|
||||
run_dump_test "elf-rel28-lldscd-micromips-n64"
|
||||
run_dump_test_arches "elf-rel29" [mips_arch_list_matching mips3]
|
||||
}
|
||||
run_list_test_arches "elf-rel30" "-32" [mips_arch_list_all]
|
||||
|
|
|
|||
Loading…
Reference in New Issue