Mon Jun 30 15:30:38 1997 Michael Snyder (msnyder@cleaver.cygnus.com)
* mips-tdep.c (mips_push_arguments): tweak alignment of small structs passed in registers for little-endian non-EABI mode.
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@ -1,3 +1,8 @@
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Mon Jun 30 15:30:38 1997 Michael Snyder (msnyder@cleaver.cygnus.com)
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* mips-tdep.c (mips_push_arguments): tweak alignment of small
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structs passed in registers for little-endian non-EABI mode.
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Mon Jun 30 13:05:39 1997 Michael Snyder (msnyder@cleaver.cygnus.com)
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* breakpoint.c (frame_in_dummy): use generic dummy if available.
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@ -1349,15 +1349,23 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
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{
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CORE_ADDR regval = extract_address (val, partial_len);
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/* It's a simple argument being passed in a general
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register.
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If the argument length is smaller than the register size,
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we have to adjust the argument on big endian targets.
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/* A simple argument being passed in a general register.
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If the length is smaller than the register size, we
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have to adjust the alignment on big endian targets.
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For structs, it appears that we have to
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do the same even in little endian mode.
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But don't do this adjustment on EABI targets. */
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if (TARGET_BYTE_ORDER == BIG_ENDIAN
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&& partial_len < MIPS_REGSIZE
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&& !MIPS_EABI)
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regval <<= ((MIPS_REGSIZE - partial_len) * TARGET_CHAR_BIT);
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if (!MIPS_EABI &&
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TYPE_LENGTH (arg_type) < MIPS_REGSIZE &&
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(TARGET_BYTE_ORDER == BIG_ENDIAN ||
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typecode == TYPE_CODE_STRUCT ||
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typecode == TYPE_CODE_UNION))
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regval <<= ((MIPS_REGSIZE - partial_len) *
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TARGET_CHAR_BIT);
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write_register (argreg, regval);
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argreg++;
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@ -1384,7 +1392,6 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
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typecode == TYPE_CODE_UNION) &&
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len < MIPS_REGSIZE)
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longword_offset = MIPS_REGSIZE - len;
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write_memory (sp + stack_offset + longword_offset,
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val, partial_len);
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stack_offset += ROUND_UP (partial_len, MIPS_REGSIZE);
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