Add support for ARMv8-M Mainline with DSP extension
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ (elf32_arm_merge_eabi_attributes): Add merging logic for Tag_DSP_extension. binutils/ * readelf.c (display_arm_attribute): Add output for Tag_DSP_extension. (arm_attr_public_tags): Define DSP_extension attribute. gas/ * NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions. * config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP instructions. (arm_extensions): Add dsp extension for ARMv8-M Mainline. (aeabi_set_public_attributes): Memorize the feature bits of the architecture selected for Tag_CPU_arch. Use it to set Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension. (arm_convert_symbolic_attribute): Define Tag_DSP_extension. * testsuite/gas/arm/arch7em-bad.d: Rename to ... * testsuite/gas/arm/arch7em-bad-1.d: This. * testsuite/gas/arm/arch7em-bad-2.d: New file. * testsuite/gas/arm/arch7em-bad-3.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise. include/ * elf/arm.h (Tag_DSP_extension): Define. ld/ * testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New test. * testsuite/ld-arm/attr-merge-10b-dsp.s: New file. * testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
This commit is contained in:
Thomas Preud'homme
parent
d942732e82
commit
15afaa63f3
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@ -1,3 +1,8 @@
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2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
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(elf32_arm_merge_eabi_attributes): Add merging logic for
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Tag_DSP_extension.
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2016-05-10 Pip Cet <pipcet@gmail.com>
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PR ld/20059
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@ -12737,6 +12737,31 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
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}
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}
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break;
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case Tag_DSP_extension:
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/* No need to change output value if any of:
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- pre (<=) ARMv5T input architecture (do not have DSP)
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- M input profile not ARMv7E-M and do not have DSP. */
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if (in_attr[Tag_CPU_arch].i <= 3
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|| (in_attr[Tag_CPU_arch_profile].i == 'M'
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&& in_attr[Tag_CPU_arch].i != 13
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&& in_attr[i].i == 0))
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; /* Do nothing. */
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/* Output value should be 0 if DSP part of architecture, ie.
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- post (>=) ARMv5te architecture output
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- A, R or S profile output or ARMv7E-M output architecture. */
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else if (out_attr[Tag_CPU_arch].i >= 4
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&& (out_attr[Tag_CPU_arch_profile].i == 'A'
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|| out_attr[Tag_CPU_arch_profile].i == 'R'
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|| out_attr[Tag_CPU_arch_profile].i == 'S'
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|| out_attr[Tag_CPU_arch].i == 13))
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out_attr[i].i = 0;
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/* Otherwise, DSP instructions are added and not part of output
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architecture. */
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else
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out_attr[i].i = 1;
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break;
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case Tag_FP_arch:
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{
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/* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
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@ -1,3 +1,8 @@
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2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* readelf.c (display_arm_attribute): Add output for Tag_DSP_extension.
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(arm_attr_public_tags): Define DSP_extension attribute.
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2016-05-10 Andrew Burgess <andrew.burgess@embecosm.com>
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* doc/binutils.texi (nm): Update description of --size-sort.
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@ -12964,6 +12964,8 @@ static const char * arm_attr_tag_FP_HP_extension[] =
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{"Not Allowed", "Allowed"};
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static const char * arm_attr_tag_ABI_FP_16bit_format[] =
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{"None", "IEEE 754", "Alternative Format"};
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static const char * arm_attr_tag_DSP_extension[] =
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{"Follow architecture", "Allowed"};
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static const char * arm_attr_tag_MPextension_use[] =
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{"Not Allowed", "Allowed"};
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static const char * arm_attr_tag_DIV_use[] =
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@ -13014,6 +13016,7 @@ static arm_attr_public_tag arm_attr_public_tags[] =
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LOOKUP(38, ABI_FP_16bit_format),
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LOOKUP(42, MPextension_use),
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LOOKUP(44, DIV_use),
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LOOKUP(46, DSP_extension),
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{64, "nodefaults", 0, NULL},
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{65, "also_compatible_with", 0, NULL},
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LOOKUP(66, T2EE_use),
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@ -1,3 +1,24 @@
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2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions.
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* config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP
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instructions.
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(arm_extensions): Add dsp extension for ARMv8-M Mainline.
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(aeabi_set_public_attributes): Memorize the feature bits of the
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architecture selected for Tag_CPU_arch. Use it to set
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Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension.
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(arm_convert_symbolic_attribute): Define Tag_DSP_extension.
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* testsuite/gas/arm/arch7em-bad.d: Rename to ...
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* testsuite/gas/arm/arch7em-bad-1.d: This.
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* testsuite/gas/arm/arch7em-bad-2.d: New file.
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* testsuite/gas/arm/arch7em-bad-3.d: Likewise.
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* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
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* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
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* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
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* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
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* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
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* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.
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2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.c (struct arm_option_extension_value_table): Make
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4
gas/NEWS
4
gas/NEWS
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@ -1,4 +1,8 @@
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-*- text -*-
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* Support for the ARMv8-M architecture has been added to the ARM port. Support
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for the ARMv8-M Security and DSP Extensions has also been added to the ARM
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port.
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* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
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.extCoreRegister pseudo-ops that allow an user to define custom
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instructions, conditional codes, auxiliary and core registers.
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@ -220,6 +220,9 @@ static const arm_feature_set arm_ext_v6t2_v8m =
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/* Instructions shared between ARMv8-A and ARMv8-M. */
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static const arm_feature_set arm_ext_atomics =
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_ATOMICS);
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/* DSP instructions Tag_DSP_extension refers to. */
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static const arm_feature_set arm_ext_dsp =
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ARM_FEATURE_CORE_LOW (ARM_EXT_V5E | ARM_EXT_V5ExP | ARM_EXT_V6_DSP);
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static const arm_feature_set arm_ext_v8_2 =
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_2A);
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/* FP16 instructions. */
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@ -25487,6 +25490,9 @@ static const struct arm_option_extension_value_table arm_extensions[] =
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ARM_EXT_OPT ("crypto", FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
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ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8),
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ARM_FEATURE_CORE_LOW (ARM_EXT_V8)),
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ARM_EXT_OPT ("dsp", ARM_FEATURE_CORE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP),
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ARM_FEATURE_CORE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP),
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ARM_FEATURE_CORE (ARM_EXT_V7M, ARM_EXT2_V8M)),
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ARM_EXT_OPT ("fp", FPU_ARCH_VFP_ARMV8, ARM_FEATURE_COPROC (FPU_VFP_ARMV8),
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ARM_FEATURE_CORE_LOW (ARM_EXT_V8)),
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ARM_EXT_OPT ("fp16", ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
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@ -26124,6 +26130,7 @@ aeabi_set_public_attributes (void)
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char profile;
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int virt_sec = 0;
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int fp16_optional = 0;
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arm_feature_set arm_arch = ARM_ARCH_NONE;
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arm_feature_set flags;
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arm_feature_set tmp;
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arm_feature_set arm_arch_v8m_base = ARM_ARCH_V8M_BASE;
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@ -26163,6 +26170,7 @@ aeabi_set_public_attributes (void)
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if (ARM_CPU_HAS_FEATURE (tmp, p->flags))
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{
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arch = p->val;
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arm_arch = p->flags;
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ARM_CLEAR_FEATURE (tmp, tmp, p->flags);
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}
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}
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@ -26179,18 +26187,27 @@ aeabi_set_public_attributes (void)
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&& !ARM_CPU_HAS_FEATURE (flags, arm_ext_v7a)
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&& ARM_CPU_HAS_FEATURE (flags, arm_ext_v7m)
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&& ARM_CPU_HAS_FEATURE (flags, arm_ext_v6_dsp))
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arch = TAG_CPU_ARCH_V7E_M;
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{
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arch = TAG_CPU_ARCH_V7E_M;
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arm_arch = (arm_feature_set) ARM_ARCH_V7EM;
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}
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ARM_CLEAR_FEATURE (tmp, flags, arm_arch_v8m_base);
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if (arch == TAG_CPU_ARCH_V8M_BASE && ARM_CPU_HAS_FEATURE (tmp, arm_arch_any))
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arch = TAG_CPU_ARCH_V8M_MAIN;
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{
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arch = TAG_CPU_ARCH_V8M_MAIN;
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arm_arch = (arm_feature_set) ARM_ARCH_V8M_MAIN;
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}
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/* In cpu_arch_ver ARMv8-A is before ARMv8-M for atomics to be detected as
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coming from ARMv8-A. However, since ARMv8-A has more instructions than
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ARMv8-M, -march=all must be detected as ARMv8-A. */
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if (arch == TAG_CPU_ARCH_V8M_MAIN
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&& ARM_FEATURE_CORE_EQUAL (selected_cpu, arm_arch_any))
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arch = TAG_CPU_ARCH_V8;
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{
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arch = TAG_CPU_ARCH_V8;
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arm_arch = (arm_feature_set) ARM_ARCH_V8A;
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}
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/* Tag_CPU_name. */
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if (selected_cpu_name[0])
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@ -26228,6 +26245,17 @@ aeabi_set_public_attributes (void)
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if (profile != '\0')
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aeabi_set_attribute_int (Tag_CPU_arch_profile, profile);
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/* Tag_DSP_extension. */
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if (ARM_CPU_HAS_FEATURE (flags, arm_ext_dsp))
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{
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arm_feature_set ext;
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/* DSP instructions not in architecture. */
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ARM_CLEAR_FEATURE (ext, flags, arm_arch);
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if (ARM_CPU_HAS_FEATURE (ext, arm_ext_dsp))
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aeabi_set_attribute_int (Tag_DSP_extension, 1);
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}
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/* Tag_ARM_ISA_use. */
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if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v1)
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|| arch == 0)
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@ -26623,6 +26651,7 @@ arm_convert_symbolic_attribute (const char *name)
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T (Tag_conformance),
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T (Tag_T2EE_use),
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T (Tag_Virtualization_use),
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T (Tag_DSP_extension),
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/* We deliberately do not include Tag_MPextension_use_legacy. */
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#undef T
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};
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@ -0,0 +1,4 @@
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#name: Valid v8-M Mainline with DSP extension, invalid v8-M Baseline
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#as: -march=armv8-m.base
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#source: arch7em.s
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#error-output: arch7em-bad.l
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@ -0,0 +1,4 @@
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#name: Valid v8-M Mainline with DSP extension, invalid v8-M Mainline
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#as: -march=armv8-m.main
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#source: arch7em.s
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#error-output: arch7em-bad.l
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@ -0,0 +1,47 @@
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#name: ARMv8-M Mainline with DSP instructions (base)
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#source: archv8m.s
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#as: -march=armv8-m.main+dsp
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#objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+.* <[^>]*> 47a0 blx r4
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0+.* <[^>]*> 47c8 blx r9
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0+.* <[^>]*> 4720 bx r4
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0+.* <[^>]*> 4748 bx r9
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0+.* <[^>]*> e841 f000 tt r0, r1
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0+.* <[^>]*> e849 f800 tt r8, r9
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0+.* <[^>]*> e841 f040 ttt r0, r1
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0+.* <[^>]*> e849 f840 ttt r8, r9
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0+.* <[^>]*> f24f 1023 movw r0, #61731 ; 0xf123
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0+.* <[^>]*> f24f 1823 movw r8, #61731 ; 0xf123
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0+.* <[^>]*> f2cf 1023 movt r0, #61731 ; 0xf123
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0+.* <[^>]*> f2cf 1823 movt r8, #61731 ; 0xf123
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0+.* <[^>]*> b154 cbz r4, 0+.* <[^>]*>
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0+.* <[^>]*> b94c cbnz r4, 0+.* <[^>]*>
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0+.* <[^>]*> f000 b808 b.w 0+.* <[^>]*>
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0+.* <[^>]*> fb91 f0f2 sdiv r0, r1, r2
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0+.* <[^>]*> fb99 f8fa sdiv r8, r9, sl
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0+.* <[^>]*> fbb1 f0f2 udiv r0, r1, r2
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0+.* <[^>]*> fbb9 f8fa udiv r8, r9, sl
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0+.* <[^>]*> 4408 add r0, r1
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0+.* <[^>]*> f3bf 8f2f clrex
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0+.* <[^>]*> e851 0f01 ldrex r0, \[r1, #4\]
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0+.* <[^>]*> e8d1 0f4f ldrexb r0, \[r1\]
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0+.* <[^>]*> e8d1 0f5f ldrexh r0, \[r1\]
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0+.* <[^>]*> e842 1001 strex r0, r1, \[r2, #4\]
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0+.* <[^>]*> e8c2 1f40 strexb r0, r1, \[r2\]
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0+.* <[^>]*> e8c2 1f50 strexh r0, r1, \[r2\]
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0+.* <[^>]*> e8d1 0faf lda r0, \[r1\]
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0+.* <[^>]*> e8d1 0f8f ldab r0, \[r1\]
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0+.* <[^>]*> e8d1 0f9f ldah r0, \[r1\]
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0+.* <[^>]*> e8c1 0faf stl r0, \[r1\]
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0+.* <[^>]*> e8c1 0f8f stlb r0, \[r1\]
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0+.* <[^>]*> e8c1 0f9f stlh r0, \[r1\]
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0+.* <[^>]*> e8d1 0fef ldaex r0, \[r1\]
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0+.* <[^>]*> e8d1 0fcf ldaexb r0, \[r1\]
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0+.* <[^>]*> e8d1 0fdf ldaexh r0, \[r1\]
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0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
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0+.* <[^>]*> e8c2 1fc0 stlexb r0, r1, \[r2\]
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0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
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@ -0,0 +1,17 @@
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#name: ARMv8-M Mainline with DSP instructions (Security Extensions 1)
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#source: archv8m-cmse.s
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#as: -march=armv8-m.main+dsp
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#objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+.* <[^>]*> e97f e97f sg
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0+.* <[^>]*> 47a4 blxns r4
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0+.* <[^>]*> 47cc blxns r9
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0+.* <[^>]*> 4724 bxns r4
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0+.* <[^>]*> 474c bxns r9
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0+.* <[^>]*> e841 f080 tta r0, r1
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0+.* <[^>]*> e849 f880 tta r8, r9
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0+.* <[^>]*> e841 f0c0 ttat r0, r1
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0+.* <[^>]*> e849 f8c0 ttat r8, r9
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@ -0,0 +1,10 @@
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#name: ARMv8-M Mainline with DSP instructions (Security Extensions 2)
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#source: archv8m-cmse-main.s
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#as: -march=armv8-m.main+dsp
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#objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+.* <[^>]*> ec31 0a00 vlldm r1
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0+.* <[^>]*> ec22 0a00 vlstm r2
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@ -0,0 +1,32 @@
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#name: ARMv8-M Mainline with DSP instructions (Security Extensions 3)
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#source: archv8m-cmse-msr.s
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#as: -march=armv8-m.main+dsp
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#objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
|
||||
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
|
||||
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
|
||||
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
|
||||
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
|
||||
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
|
||||
|
|
@ -0,0 +1,140 @@
|
|||
#name: ARMv8-M Mainline with DSP instructions (extension)
|
||||
#source: arch7em.s
|
||||
#as: -march=armv8-m.main+dsp
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
|
||||
|
||||
.*: +file format .*arm.*
|
||||
|
||||
Disassembly of section .text:
|
||||
0[0-9a-f]+ <[^>]+> eac0 0000 pkhbt r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> eac0 0900 pkhbt r9, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> eac9 0000 pkhbt r0, r9, r0
|
||||
0[0-9a-f]+ <[^>]+> eac0 0009 pkhbt r0, r0, r9
|
||||
0[0-9a-f]+ <[^>]+> eac0 5000 pkhbt r0, r0, r0, lsl #20
|
||||
0[0-9a-f]+ <[^>]+> eac0 00c0 pkhbt r0, r0, r0, lsl #3
|
||||
0[0-9a-f]+ <[^>]+> eac3 0102 pkhbt r1, r3, r2
|
||||
0[0-9a-f]+ <[^>]+> eac2 4163 pkhtb r1, r2, r3, asr #17
|
||||
0[0-9a-f]+ <[^>]+> fa83 f182 qadd r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa92 f113 qadd16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa82 f113 qadd8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f113 qasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f113 qasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa83 f192 qdadd r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa83 f1b2 qdsub r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa83 f1a2 qsub r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fad2 f113 qsub16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fac2 f113 qsub8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f113 qsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f113 qsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa92 f103 sadd16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa82 f103 sadd8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f103 sasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f103 sasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fad2 f103 ssub16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fac2 f103 ssub8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f103 ssax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f103 ssax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa92 f123 shadd16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa82 f123 shadd8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f123 shasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f123 shasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fad2 f123 shsub16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fac2 f123 shsub8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f123 shsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f123 shsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa92 f143 uadd16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa82 f143 uadd8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f143 uasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f143 uasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fad2 f143 usub16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fac2 f143 usub8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f143 usax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f143 usax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa92 f163 uhadd16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa82 f163 uhadd8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f163 uhasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f163 uhasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fad2 f163 uhsub16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fac2 f163 uhsub8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f163 uhsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f163 uhsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa92 f153 uqadd16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa82 f153 uqadd8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f153 uqasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f153 uqasx r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fad2 f153 uqsub16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fac2 f153 uqsub8 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f153 uqsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fae2 f153 uqsax r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> faa2 f183 sel r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fb10 0000 smlabb r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 0900 smlabb r9, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb19 0000 smlabb r0, r9, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 0009 smlabb r0, r0, r9, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 9000 smlabb r0, r0, r0, r9
|
||||
0[0-9a-f]+ <[^>]+> fb10 0020 smlatb r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 0010 smlabt r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 0030 smlatt r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb30 0000 smlawb r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb30 0010 smlawt r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb20 0000 smlad r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb20 0010 smladx r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb40 0000 smlsd r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb40 0010 smlsdx r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb50 0000 smmla r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb50 0010 smmlar r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb60 0000 smmls r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb60 0010 smmlsr r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb70 0000 usada8 r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 0080 smlalbb r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 9080 smlalbb r9, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 0980 smlalbb r0, r9, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc9 0080 smlalbb r0, r0, r9, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 0089 smlalbb r0, r0, r0, r9
|
||||
0[0-9a-f]+ <[^>]+> fbc0 00a0 smlaltb r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 0090 smlalbt r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 00b0 smlaltt r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 00c0 smlald r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbc0 00d0 smlaldx r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbd0 00c0 smlsld r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbd0 00d0 smlsldx r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fbe0 0060 umaal r0, r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 f000 smulbb r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 f900 smulbb r9, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb19 f000 smulbb r0, r9, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 f009 smulbb r0, r0, r9
|
||||
0[0-9a-f]+ <[^>]+> fb10 f020 smultb r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 f010 smulbt r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb10 f030 smultt r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb30 f000 smulwb r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb30 f010 smulwt r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb50 f000 smmul r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb50 f010 smmulr r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb20 f000 smuad r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb20 f010 smuadx r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb40 f000 smusd r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb40 f010 smusdx r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fb70 f000 usad8 r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> f320 0000 ssat16 r0, #1, r0
|
||||
0[0-9a-f]+ <[^>]+> f320 0900 ssat16 r9, #1, r0
|
||||
0[0-9a-f]+ <[^>]+> f320 0009 ssat16 r0, #10, r0
|
||||
0[0-9a-f]+ <[^>]+> f329 0000 ssat16 r0, #1, r9
|
||||
0[0-9a-f]+ <[^>]+> f3a0 0000 usat16 r0, #0, r0
|
||||
0[0-9a-f]+ <[^>]+> f3a0 0900 usat16 r9, #0, r0
|
||||
0[0-9a-f]+ <[^>]+> f3a0 0009 usat16 r0, #9, r0
|
||||
0[0-9a-f]+ <[^>]+> f3a9 0000 usat16 r0, #0, r9
|
||||
0[0-9a-f]+ <[^>]+> fa2f f182 sxtb16 r1, r2
|
||||
0[0-9a-f]+ <[^>]+> fa2f f889 sxtb16 r8, r9
|
||||
0[0-9a-f]+ <[^>]+> fa3f f182 uxtb16 r1, r2
|
||||
0[0-9a-f]+ <[^>]+> fa3f f889 uxtb16 r8, r9
|
||||
0[0-9a-f]+ <[^>]+> fa40 f080 sxtab r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fa40 f080 sxtab r0, r0, r0
|
||||
0[0-9a-f]+ <[^>]+> fa40 f990 sxtab r9, r0, r0, ror #8
|
||||
0[0-9a-f]+ <[^>]+> fa49 f0a0 sxtab r0, r9, r0, ror #16
|
||||
0[0-9a-f]+ <[^>]+> fa40 f0b9 sxtab r0, r0, r9, ror #24
|
||||
0[0-9a-f]+ <[^>]+> fa22 f183 sxtab16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa02 f183 sxtah r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa52 f183 uxtab r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa32 f183 uxtab16 r1, r2, r3
|
||||
0[0-9a-f]+ <[^>]+> fa12 f183 uxtah r1, r2, r3
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
# name: attributes for -march=armv8-m.main+dsp
|
||||
# source: blank.s
|
||||
# as: -march=armv8-m.main+dsp
|
||||
# readelf: -A
|
||||
# This test is only valid on EABI based ports.
|
||||
# target: *-*-*eabi* *-*-nacl*
|
||||
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_CPU_name: "8-M.MAIN"
|
||||
Tag_CPU_arch: v8-M.mainline
|
||||
Tag_CPU_arch_profile: Microcontroller
|
||||
Tag_THUMB_ISA_use: Yes
|
||||
Tag_DSP_extension: Allowed
|
||||
|
|
@ -1,3 +1,7 @@
|
|||
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||||
|
||||
* elf/arm.h (Tag_DSP_extension): Define.
|
||||
|
||||
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||||
|
||||
* arm.h (ARM_FSET_CPU_SUBSET): Define macro.
|
||||
|
|
|
|||
|
|
@ -311,6 +311,7 @@ enum
|
|||
Tag_MPextension_use,
|
||||
Tag_undefined_43,
|
||||
Tag_DIV_use,
|
||||
Tag_DSP_extension = 46,
|
||||
Tag_nodefaults = 64,
|
||||
Tag_also_compatible_with,
|
||||
Tag_T2EE_use,
|
||||
|
|
|
|||
|
|
@ -1,3 +1,10 @@
|
|||
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||||
|
||||
* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New
|
||||
test.
|
||||
* testsuite/ld-arm/attr-merge-10b-dsp.s: New file.
|
||||
* testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
|
||||
|
||||
2016-05-10 Christophe Lyon <christophe.lyon@linaro.org>
|
||||
|
||||
* ld/testsuite/ld-elf/flags1.d (xfail): Remove *-*-nacl*".
|
||||
|
|
|
|||
|
|
@ -411,6 +411,9 @@ set armeabitests_common {
|
|||
{"EABI attribute merging 10" "-r" "" "" {attr-merge-10a.s attr-merge-10b.s}
|
||||
{{readelf -A attr-merge-10.attr}}
|
||||
"attr-merge-10"}
|
||||
{"EABI attribute merging 10 (DSP)" "-r" "" "" {attr-merge-10a.s attr-merge-10b-dsp.s}
|
||||
{{readelf -A attr-merge-10-dsp.attr}}
|
||||
"attr-merge-10-dsp"}
|
||||
{"EABI attribute arch merging 1" "-r" "" "" {arch-v6k.s arch-v6t2.s}
|
||||
{{readelf -A attr-merge-arch-1.attr}}
|
||||
"attr-merge-arch-1"}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,7 @@
|
|||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_CPU_name: "8-M.MAIN"
|
||||
Tag_CPU_arch: v8-M.mainline
|
||||
Tag_CPU_arch_profile: Microcontroller
|
||||
Tag_THUMB_ISA_use: Yes
|
||||
Tag_DSP_extension: Allowed
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
.arch armv8-m.main
|
||||
|
||||
@ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M.MAIN
|
||||
.eabi_attribute Tag_CPU_arch, 17
|
||||
.eabi_attribute Tag_CPU_arch_profile, 'M'
|
||||
.eabi_attribute Tag_DSP_extension, 1
|
||||
Loading…
Reference in New Issue