2001-11-29 Elena Zannoni <ezannoni@redhat.com>
* Makefile.in (ppc-linux-nat.o): Add dependency on ppc-tdep.h. * ppc-tdep.h (PPC_GPLAST_REGNUM): Define. * ppc-linux-nat.c: Include ppc-tdep.h. (ppc_register_u_addr): Don't use the static array regmap[], dynamically define the mapping instead. (supply_gregset): Ditto. (fill_gregset): Ditto. (COPY_REG): Delete macro defintion. (regmap): Delete array.
This commit is contained in:
Elena Zannoni
parent
c1c829a984
commit
16333c4fa1
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@ -1,3 +1,17 @@
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2001-11-29 Elena Zannoni <ezannoni@redhat.com>
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* Makefile.in (ppc-linux-nat.o): Add dependency on ppc-tdep.h.
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* ppc-tdep.h (PPC_GPLAST_REGNUM): Define.
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* ppc-linux-nat.c: Include ppc-tdep.h.
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(ppc_register_u_addr): Don't use the static array regmap[],
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dynamically define the mapping instead.
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(supply_gregset): Ditto.
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(fill_gregset): Ditto.
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(COPY_REG): Delete macro defintion.
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(regmap): Delete array.
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2001-11-29 Jim Blandy <jimb@redhat.com>
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Tighten up GDB's support for returning structs by value.
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@ -1818,7 +1818,7 @@ ppc-bdm.o: ppc-bdm.c $(defs_h) $(gdbcore_h) $(gdb_string_h) $(frame_h) \
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$(objfiles_h) $(gdb_stabs_h) $(serial_h) ocd.h $(regcache_h)
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ppc-linux-nat.o: ppc-linux-nat.c $(defs_h) $(gdbcore_h) $(frame_h) \
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$(inferior_h) $(target_h) $(regcache_h)
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$(inferior_h) $(target_h) $(regcache_h) ppc-tdep.h
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ppc-linux-tdep.o: ppc-linux-tdep.c $(defs_h) $(gdbcore_h) $(inferior_h) \
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$(target_h) ppc-tdep.h $(regcache_h) $(value_h)
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@ -35,6 +35,7 @@
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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#include "ppc-tdep.h"
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int
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kernel_u_size (void)
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@ -42,21 +43,49 @@ kernel_u_size (void)
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return (sizeof (struct user));
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}
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static int regmap[] =
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{PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
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PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
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PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
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PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
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PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
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PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
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PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
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PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
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PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ};
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/* *INDENT-OFF* */
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/* registers layout, as presented by the ptrace interface:
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PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
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PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
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PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
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PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
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PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
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PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
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PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
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PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
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PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
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/* *INDENT_ON * */
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int
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ppc_register_u_addr (int ustart, int regnum)
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ppc_register_u_addr (int ustart, int regno)
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{
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return (ustart + 4 * regmap[regnum]);
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int u_addr = -1;
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/* General purpose registers occupy 1 slot each in the buffer */
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if (regno >= PPC_GP0_REGNUM && regno <= PPC_GPLAST_REGNUM )
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u_addr = (ustart + (PT_R0 + regno) * 4);
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/* Floating point regs: 2 slots each */
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if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
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u_addr = (ustart + (PT_FPR0 + (regno - FP0_REGNUM) * 2) * 4);
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/* UISA special purpose registers: 1 slot each */
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if (regno == PC_REGNUM)
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u_addr = ustart + PT_NIP * 4;
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if (regno == PPC_LR_REGNUM)
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u_addr = ustart + PT_LNK * 4;
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if (regno == PPC_CR_REGNUM)
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u_addr = ustart + PT_CCR * 4;
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if (regno == PPC_XER_REGNUM)
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u_addr = ustart + PT_XER * 4;
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if (regno == PPC_CTR_REGNUM)
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u_addr = ustart + PT_CTR * 4;
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if (regno == PPC_MQ_REGNUM)
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u_addr = ustart + PT_MQ * 4;
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if (regno == PPC_PS_REGNUM)
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u_addr = ustart + PT_MSR * 4;
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return u_addr;
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}
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void
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@ -68,8 +97,13 @@ supply_gregset (gdb_gregset_t *gregsetp)
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for (regi = 0; regi < 32; regi++)
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supply_register (regi, (char *) (regp + regi));
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for (regi = FIRST_UISA_SP_REGNUM; regi <= LAST_UISA_SP_REGNUM; regi++)
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supply_register (regi, (char *) (regp + regmap[regi]));
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supply_register (PC_REGNUM, (char *) (regp + PT_NIP));
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supply_register (PPC_LR_REGNUM, (char *) (regp + PT_LNK));
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supply_register (PPC_CR_REGNUM, (char *) (regp + PT_CCR));
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supply_register (PPC_XER_REGNUM, (char *) (regp + PT_XER));
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supply_register (PPC_CTR_REGNUM, (char *) (regp + PT_CTR));
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supply_register (PPC_MQ_REGNUM, (char *) (regp + PT_MQ));
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supply_register (PPC_PS_REGNUM, (char *) (regp + PT_MSR));
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}
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void
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@ -78,19 +112,26 @@ fill_gregset (gdb_gregset_t *gregsetp, int regno)
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int regi;
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elf_greg_t *regp = (elf_greg_t *) gregsetp;
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#define COPY_REG(_idx_,_regi_) \
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if ((regno == -1) || regno == _regi_) \
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regcache_collect (_regi_, regp + _idx_)
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for (regi = 0; regi < 32; regi++)
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{
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COPY_REG (regmap[regi], regi);
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if ((regno == -1) || regno == regi)
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regcache_collect (regi, regp + PT_R0 + regi);
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}
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for (regi = FIRST_UISA_SP_REGNUM; regi <= LAST_UISA_SP_REGNUM; regi++)
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{
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COPY_REG (regmap[regi], regi);
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}
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if ((regno == -1) || regno == PC_REGNUM)
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regcache_collect (PC_REGNUM, regp + PT_NIP);
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if ((regno == -1) || regno == PPC_LR_REGNUM)
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regcache_collect (PPC_LR_REGNUM, regp + PT_LNK);
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if ((regno == -1) || regno == PPC_CR_REGNUM)
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regcache_collect (PPC_CR_REGNUM, regp + PT_CCR);
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if ((regno == -1) || regno == PPC_XER_REGNUM)
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regcache_collect (PPC_XER_REGNUM, regp + PT_XER);
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if ((regno == -1) || regno == PPC_CTR_REGNUM)
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regcache_collect (PPC_CTR_REGNUM, regp + PT_CTR);
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if ((regno == -1) || regno == PPC_MQ_REGNUM)
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regcache_collect (PPC_MQ_REGNUM, regp + PT_MQ);
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if ((regno == -1) || regno == PPC_PS_REGNUM)
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regcache_collect (PPC_PS_REGNUM, regp + PT_MSR);
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}
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void
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@ -46,6 +46,7 @@ CORE_ADDR rs6000_frame_chain (struct frame_info *);
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/* Some important register numbers. */
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#define PPC_GP0_REGNUM 0 /* GPR register 0 */
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#define PPC_GPLAST_REGNUM 31 /* GPR register 31 */
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#define PPC_TOC_REGNUM 2 /* TOC register */
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#define PPC_PS_REGNUM 65 /* Processor (or machine) status (%msr) */
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#define PPC_CR_REGNUM 66 /* Condition register */
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