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New files for IA-64 port.

This commit is contained in:
Kevin Buettner 2000-03-21 00:11:10 +00:00
parent 2b628194f8
commit 16461d7d89
9 changed files with 2436 additions and 0 deletions
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6
gdb/ChangeLog
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2000-03-20 Kevin Buettner <kevinb@redhat.com>
* ia64-linux-nat.c, ia64-tdep.c, config/ia64/linux.mh,
config/ia64/linux.mt, config/ia64/nm-linux.h, config/ia64/tm-ia64.h,
config/ia64/tm-linux.h, config/ia64/xm-linux.h: New files.
2000-03-20 Kevin Buettner <kevinb@redhat.com>
* utils.c (floatformat_from_doublest): Don't assume that a long

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gdb/config/ia64/linux.mh Normal file
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# Host: Intel IA-64 running GNU/Linux
XM_FILE= xm-linux.h
XDEPFILES= ser-tcp.o
NAT_FILE= nm-linux.h
NATDEPFILES= infptrace.o solib.o inftarg.o fork-child.o corelow.o \
core-aout.o core-regset.o ia64-linux-nat.o
# Don't use gnu-regex.c; it interferes with some stuff in libc.
REGEX=
# NAT_CLIBS is a hack to be sure; I expect we'll be able to remove this
# line in the near future
NAT_CLIBS= -lc -lnss_dns -lnss_files -lresolv -lc

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gdb/config/ia64/linux.mt Normal file
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# Target: Intel IA-64 running GNU/Linux
TDEPFILES= ia64-tdep.o
TM_FILE= tm-linux.h
GDBSERVER_DEPFILES= low-linux.o
GDBSERVER_LIBS= -lc -lnss_dns -lnss_files -lresolv -lc

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gdb/config/ia64/nm-linux.h Normal file
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/* Native support for GNU/Linux, for GDB, the GNU debugger.
Copyright (C) 1999
Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifndef NM_LINUX_H
#define NM_LINUX_H
/* We define this if link.h is available, because with ELF we use SVR4 style
shared libraries. */
#ifdef HAVE_LINK_H
#define SVR4_SHARED_LIBS
#include "solib.h" /* Support for shared libraries. */
#endif
/* Note: It seems likely that we'll have to eventually define
FETCH_INFERIOR_REGISTERS. But until that time, we'll make do
with the following. */
#define CANNOT_FETCH_REGISTER(regno) ia64_cannot_fetch_register(regno)
extern int ia64_cannot_fetch_register (int regno);
#define CANNOT_STORE_REGISTER(regno) ia64_cannot_store_register(regno)
extern int ia64_cannot_store_register (int regno);
#ifdef GDBSERVER
#define REGISTER_U_ADDR(addr, blockend, regno) \
(addr) = ia64_register_u_addr ((blockend),(regno));
extern int ia64_register_u_addr(int, int);
#endif /* GDBSERVER */
#define PTRACE_ARG3_TYPE long
#define PTRACE_XFER_TYPE long
/* Tell gdb that we can attach and detach other processes */
#define ATTACH_DETACH
#endif /* #ifndef NM_LINUX_H */

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gdb/config/ia64/tm-ia64.h Normal file
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/* Definitions to target GDB to GNU/Linux on an ia64 architecture.
Copyright 1992, 1993 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifndef TM_IA64_H
#define TM_IA64_H
#if !defined(GDBSERVER)
#define GDB_MULTI_ARCH 1
#else /* defines needed for GDBSERVER */
/* ia64 is little endian by default */
#define TARGET_BYTE_ORDER LITTLE_ENDIAN
/* Say how long (ordinary) registers are. This is a piece of bogosity
used in push_word and a few other places; REGISTER_RAW_SIZE is the
real way to know how big a register is. */
#define REGISTER_SIZE 8
#undef NUM_REGS
#define NUM_REGS 590
/* Some pseudo register numbers */
#define PC_REGNUM IA64_IP_REGNUM
#define SP_REGNUM IA64_GR12_REGNUM
#define FP_REGNUM IA64_VFP_REGNUM
/* Total amount of space needed to store our copies of the machine's
register state, the array `registers'. On the ia64, all registers
fit in 64 bits except for the floating point registers which require
84 bits. But 84 isn't a nice number, so we'll just allocate 128
bits for each of these. The expression below says that we
need 8 bytes for each register, plus an additional 8 bytes for each
of the 128 floating point registers. */
#define REGISTER_BYTES (NUM_REGS*8+128*8)
/* Index within `registers' of the first byte of the space for
register N. */
#define REGISTER_BYTE(N) (((N) * 8) \
+ ((N) <= IA64_FR0_REGNUM ? 0 : 8 * (((N) > IA64_FR127_REGNUM) ? 128 : (N) - IA64_FR0_REGNUM)))
/* Number of bytes of storage in the actual machine representation
for register N. */
#define REGISTER_RAW_SIZE(N) \
((IA64_FR0_REGNUM <= (N) && (N) <= IA64_FR127_REGNUM) ? 16 : 8)
/* Largest value REGISTER_RAW_SIZE can have. */
#define MAX_REGISTER_RAW_SIZE 16
#define GDBSERVER_RESUME_REGS { IA64_IP_REGNUM, IA64_PSR_REGNUM, SP_REGNUM, IA64_BSP_REGNUM, IA64_CFM_REGNUM }
#endif /* GDBSERVER */
/* Register numbers of various important registers */
/* General registers; there are 128 of these 64 bit wide registers. The
first 32 are static and the last 96 are stacked. */
#define IA64_GR0_REGNUM 0
#define IA64_GR1_REGNUM (IA64_GR0_REGNUM+1)
#define IA64_GR2_REGNUM (IA64_GR0_REGNUM+2)
#define IA64_GR3_REGNUM (IA64_GR0_REGNUM+3)
#define IA64_GR4_REGNUM (IA64_GR0_REGNUM+4)
#define IA64_GR5_REGNUM (IA64_GR0_REGNUM+5)
#define IA64_GR6_REGNUM (IA64_GR0_REGNUM+6)
#define IA64_GR7_REGNUM (IA64_GR0_REGNUM+7)
#define IA64_GR8_REGNUM (IA64_GR0_REGNUM+8)
#define IA64_GR9_REGNUM (IA64_GR0_REGNUM+9)
#define IA64_GR10_REGNUM (IA64_GR0_REGNUM+10)
#define IA64_GR11_REGNUM (IA64_GR0_REGNUM+11)
#define IA64_GR12_REGNUM (IA64_GR0_REGNUM+12)
#define IA64_GR31_REGNUM (IA64_GR0_REGNUM+31)
#define IA64_GR32_REGNUM (IA64_GR0_REGNUM+32)
#define IA64_GR127_REGNUM (IA64_GR0_REGNUM+127)
/* Floating point registers; 128 82-bit wide registers */
#define IA64_FR0_REGNUM 128
#define IA64_FR1_REGNUM (IA64_FR0_REGNUM+1)
#define IA64_FR2_REGNUM (IA64_FR0_REGNUM+2)
#define IA64_FR8_REGNUM (IA64_FR0_REGNUM+8)
#define IA64_FR9_REGNUM (IA64_FR0_REGNUM+9)
#define IA64_FR10_REGNUM (IA64_FR0_REGNUM+10)
#define IA64_FR11_REGNUM (IA64_FR0_REGNUM+11)
#define IA64_FR12_REGNUM (IA64_FR0_REGNUM+12)
#define IA64_FR13_REGNUM (IA64_FR0_REGNUM+13)
#define IA64_FR14_REGNUM (IA64_FR0_REGNUM+14)
#define IA64_FR15_REGNUM (IA64_FR0_REGNUM+15)
#define IA64_FR16_REGNUM (IA64_FR0_REGNUM+16)
#define IA64_FR31_REGNUM (IA64_FR0_REGNUM+31)
#define IA64_FR32_REGNUM (IA64_FR0_REGNUM+32)
#define IA64_FR127_REGNUM (IA64_FR0_REGNUM+127)
/* Predicate registers; There are 64 of these one bit registers.
It'd be more convenient (implementation-wise) to use a single
64 bit word with all of these register in them. Note that there's
also a IA64_PR_REGNUM below which contains all the bits and is used for
communicating the actual values to the target. */
#define IA64_PR0_REGNUM 256
#define IA64_PR1_REGNUM (IA64_PR0_REGNUM+1)
#define IA64_PR2_REGNUM (IA64_PR0_REGNUM+2)
#define IA64_PR3_REGNUM (IA64_PR0_REGNUM+3)
#define IA64_PR4_REGNUM (IA64_PR0_REGNUM+4)
#define IA64_PR5_REGNUM (IA64_PR0_REGNUM+5)
#define IA64_PR6_REGNUM (IA64_PR0_REGNUM+6)
#define IA64_PR7_REGNUM (IA64_PR0_REGNUM+7)
#define IA64_PR8_REGNUM (IA64_PR0_REGNUM+8)
#define IA64_PR9_REGNUM (IA64_PR0_REGNUM+9)
#define IA64_PR10_REGNUM (IA64_PR0_REGNUM+10)
#define IA64_PR11_REGNUM (IA64_PR0_REGNUM+11)
#define IA64_PR12_REGNUM (IA64_PR0_REGNUM+12)
#define IA64_PR13_REGNUM (IA64_PR0_REGNUM+13)
#define IA64_PR14_REGNUM (IA64_PR0_REGNUM+14)
#define IA64_PR15_REGNUM (IA64_PR0_REGNUM+15)
#define IA64_PR16_REGNUM (IA64_PR0_REGNUM+16)
#define IA64_PR17_REGNUM (IA64_PR0_REGNUM+17)
#define IA64_PR18_REGNUM (IA64_PR0_REGNUM+18)
#define IA64_PR19_REGNUM (IA64_PR0_REGNUM+19)
#define IA64_PR20_REGNUM (IA64_PR0_REGNUM+20)
#define IA64_PR21_REGNUM (IA64_PR0_REGNUM+21)
#define IA64_PR22_REGNUM (IA64_PR0_REGNUM+22)
#define IA64_PR23_REGNUM (IA64_PR0_REGNUM+23)
#define IA64_PR24_REGNUM (IA64_PR0_REGNUM+24)
#define IA64_PR25_REGNUM (IA64_PR0_REGNUM+25)
#define IA64_PR26_REGNUM (IA64_PR0_REGNUM+26)
#define IA64_PR27_REGNUM (IA64_PR0_REGNUM+27)
#define IA64_PR28_REGNUM (IA64_PR0_REGNUM+28)
#define IA64_PR29_REGNUM (IA64_PR0_REGNUM+29)
#define IA64_PR30_REGNUM (IA64_PR0_REGNUM+30)
#define IA64_PR31_REGNUM (IA64_PR0_REGNUM+31)
#define IA64_PR32_REGNUM (IA64_PR0_REGNUM+32)
#define IA64_PR33_REGNUM (IA64_PR0_REGNUM+33)
#define IA64_PR34_REGNUM (IA64_PR0_REGNUM+34)
#define IA64_PR35_REGNUM (IA64_PR0_REGNUM+35)
#define IA64_PR36_REGNUM (IA64_PR0_REGNUM+36)
#define IA64_PR37_REGNUM (IA64_PR0_REGNUM+37)
#define IA64_PR38_REGNUM (IA64_PR0_REGNUM+38)
#define IA64_PR39_REGNUM (IA64_PR0_REGNUM+39)
#define IA64_PR40_REGNUM (IA64_PR0_REGNUM+40)
#define IA64_PR41_REGNUM (IA64_PR0_REGNUM+41)
#define IA64_PR42_REGNUM (IA64_PR0_REGNUM+42)
#define IA64_PR43_REGNUM (IA64_PR0_REGNUM+43)
#define IA64_PR44_REGNUM (IA64_PR0_REGNUM+44)
#define IA64_PR45_REGNUM (IA64_PR0_REGNUM+45)
#define IA64_PR46_REGNUM (IA64_PR0_REGNUM+46)
#define IA64_PR47_REGNUM (IA64_PR0_REGNUM+47)
#define IA64_PR48_REGNUM (IA64_PR0_REGNUM+48)
#define IA64_PR49_REGNUM (IA64_PR0_REGNUM+49)
#define IA64_PR50_REGNUM (IA64_PR0_REGNUM+50)
#define IA64_PR51_REGNUM (IA64_PR0_REGNUM+51)
#define IA64_PR52_REGNUM (IA64_PR0_REGNUM+52)
#define IA64_PR53_REGNUM (IA64_PR0_REGNUM+53)
#define IA64_PR54_REGNUM (IA64_PR0_REGNUM+54)
#define IA64_PR55_REGNUM (IA64_PR0_REGNUM+55)
#define IA64_PR56_REGNUM (IA64_PR0_REGNUM+56)
#define IA64_PR57_REGNUM (IA64_PR0_REGNUM+57)
#define IA64_PR58_REGNUM (IA64_PR0_REGNUM+58)
#define IA64_PR59_REGNUM (IA64_PR0_REGNUM+59)
#define IA64_PR60_REGNUM (IA64_PR0_REGNUM+60)
#define IA64_PR61_REGNUM (IA64_PR0_REGNUM+61)
#define IA64_PR62_REGNUM (IA64_PR0_REGNUM+62)
#define IA64_PR63_REGNUM (IA64_PR0_REGNUM+63)
/* Branch registers: 8 64-bit registers for holding branch targets */
#define IA64_BR0_REGNUM 320
#define IA64_BR1_REGNUM (IA64_BR0_REGNUM+1)
#define IA64_BR2_REGNUM (IA64_BR0_REGNUM+2)
#define IA64_BR3_REGNUM (IA64_BR0_REGNUM+3)
#define IA64_BR4_REGNUM (IA64_BR0_REGNUM+4)
#define IA64_BR5_REGNUM (IA64_BR0_REGNUM+5)
#define IA64_BR6_REGNUM (IA64_BR0_REGNUM+6)
#define IA64_BR7_REGNUM (IA64_BR0_REGNUM+7)
/* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in
gcc/config/ia64/ia64.h. */
#define IA64_VFP_REGNUM 328
/* Virtual return address pointer; this matches IA64_RETURN_ADDRESS_POINTER_REGNUM
in gcc/config/ia64/ia64.h. */
#define IA64_VRAP_REGNUM 329
/* Predicate registers: There are 64 of these 1-bit registers. We
define a single register which is used to communicate these values
to/from the target. We will somehow contrive to make it appear that
IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */
#define IA64_PR_REGNUM 330
/* Instruction pointer: 64 bits wide */
#define IA64_IP_REGNUM 331
/* Process Status Register */
#define IA64_PSR_REGNUM 332
/* Current Frame Marker (Raw form may be the cr.ifs) */
#define IA64_CFM_REGNUM 333
/* Application registers; 128 64-bit wide registers possible, but some
of them are reserved */
#define IA64_AR0_REGNUM 334
#define IA64_KR0_REGNUM (IA64_AR0_REGNUM+0)
#define IA64_KR7_REGNUM (IA64_KR0_REGNUM+7)
#define IA64_RSC_REGNUM (IA64_AR0_REGNUM+16)
#define IA64_BSP_REGNUM (IA64_AR0_REGNUM+17)
#define IA64_BSPSTORE_REGNUM (IA64_AR0_REGNUM+18)
#define IA64_RNAT_REGNUM (IA64_AR0_REGNUM+19)
#define IA64_FCR_REGNUM (IA64_AR0_REGNUM+21)
#define IA64_EFLAG_REGNUM (IA64_AR0_REGNUM+24)
#define IA64_CSD_REGNUM (IA64_AR0_REGNUM+25)
#define IA64_SSD_REGNUM (IA64_AR0_REGNUM+26)
#define IA64_CFLG_REGNUM (IA64_AR0_REGNUM+27)
#define IA64_FSR_REGNUM (IA64_AR0_REGNUM+28)
#define IA64_FIR_REGNUM (IA64_AR0_REGNUM+29)
#define IA64_FDR_REGNUM (IA64_AR0_REGNUM+30)
#define IA64_CCV_REGNUM (IA64_AR0_REGNUM+32)
#define IA64_UNAT_REGNUM (IA64_AR0_REGNUM+36)
#define IA64_FPSR_REGNUM (IA64_AR0_REGNUM+40)
#define IA64_ITC_REGNUM (IA64_AR0_REGNUM+44)
#define IA64_PFS_REGNUM (IA64_AR0_REGNUM+64)
#define IA64_LC_REGNUM (IA64_AR0_REGNUM+65)
#define IA64_EC_REGNUM (IA64_AR0_REGNUM+66)
/* NAT (Not A Thing) Bits for the general registers; there are 128 of these */
#define IA64_NAT0_REGNUM 462
#define IA64_NAT31_REGNUM (IA64_NAT0_REGNUM+31)
#define IA64_NAT32_REGNUM (IA64_NAT0_REGNUM+32)
#define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM+127)
#endif /* TM_IA64_H */

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/* Definitions to target GDB to GNU/Linux on IA-64 Linux.
Copyright 1992, 1993 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifndef TM_LINUX_H
#define TM_LINUX_H
#define IA64_GNULINUX_TARGET
#include "ia64/tm-ia64.h"
#include "tm-linux.h"
#define TARGET_ELF64
#endif /* #ifndef TM_LINUX_H */

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/* Native support for GNU/Linux, for GDB, the GNU debugger.
Copyright (C) 1999 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifndef XM_LINUX_H
#define XM_LINUX_H
#define HOST_BYTE_ORDER LITTLE_ENDIAN
#define HAVE_TERMIOS
/* This is the amount to subtract from u.u_ar0
to get the offset in the core file of the register values. */
#define KERNEL_U_ADDR 0x0
#define NEED_POSIX_SETPGID
/* Need R_OK etc, but USG isn't defined. */
#include <unistd.h>
#endif /* #ifndef XM_LINUX_H */

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/* Functions specific to running gdb native on IA64 running Linux.
Copyright 1999 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "defs.h"
#include "inferior.h"
#include "target.h"
#include "gdbcore.h"
#include <signal.h>
#include <sys/ptrace.h>
#include <sys/wait.h>
#ifdef HAVE_SYS_REG_H
#include <sys/reg.h>
#endif
#include <sys/user.h>
#include <asm/ptrace_offsets.h>
#include <sys/procfs.h>
/* These must match the order of the register names.
Some sort of lookup table is needed because the offsets associated
with the registers are all over the board. */
static int u_offsets[] =
{
/* general registers */
-1, /* gr0 not available; i.e, it's always zero */
PT_R1,
PT_R2,
PT_R3,
PT_R4,
PT_R5,
PT_R6,
PT_R7,
PT_R8,
PT_R9,
PT_R10,
PT_R11,
PT_R12,
PT_R13,
PT_R14,
PT_R15,
PT_R16,
PT_R17,
PT_R18,
PT_R19,
PT_R20,
PT_R21,
PT_R22,
PT_R23,
PT_R24,
PT_R25,
PT_R26,
PT_R27,
PT_R28,
PT_R29,
PT_R30,
PT_R31,
/* gr32 through gr127 not directly available via the ptrace interface */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
/* Floating point registers */
-1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
PT_F2,
PT_F3,
PT_F4,
PT_F5,
PT_F6,
PT_F7,
PT_F8,
PT_F9,
PT_F10,
PT_F11,
PT_F12,
PT_F13,
PT_F14,
PT_F15,
PT_F16,
PT_F17,
PT_F18,
PT_F19,
PT_F20,
PT_F21,
PT_F22,
PT_F23,
PT_F24,
PT_F25,
PT_F26,
PT_F27,
PT_F28,
PT_F29,
PT_F30,
PT_F31,
PT_F32,
PT_F33,
PT_F34,
PT_F35,
PT_F36,
PT_F37,
PT_F38,
PT_F39,
PT_F40,
PT_F41,
PT_F42,
PT_F43,
PT_F44,
PT_F45,
PT_F46,
PT_F47,
PT_F48,
PT_F49,
PT_F50,
PT_F51,
PT_F52,
PT_F53,
PT_F54,
PT_F55,
PT_F56,
PT_F57,
PT_F58,
PT_F59,
PT_F60,
PT_F61,
PT_F62,
PT_F63,
PT_F64,
PT_F65,
PT_F66,
PT_F67,
PT_F68,
PT_F69,
PT_F70,
PT_F71,
PT_F72,
PT_F73,
PT_F74,
PT_F75,
PT_F76,
PT_F77,
PT_F78,
PT_F79,
PT_F80,
PT_F81,
PT_F82,
PT_F83,
PT_F84,
PT_F85,
PT_F86,
PT_F87,
PT_F88,
PT_F89,
PT_F90,
PT_F91,
PT_F92,
PT_F93,
PT_F94,
PT_F95,
PT_F96,
PT_F97,
PT_F98,
PT_F99,
PT_F100,
PT_F101,
PT_F102,
PT_F103,
PT_F104,
PT_F105,
PT_F106,
PT_F107,
PT_F108,
PT_F109,
PT_F110,
PT_F111,
PT_F112,
PT_F113,
PT_F114,
PT_F115,
PT_F116,
PT_F117,
PT_F118,
PT_F119,
PT_F120,
PT_F121,
PT_F122,
PT_F123,
PT_F124,
PT_F125,
PT_F126,
PT_F127,
/* predicate registers - we don't fetch these individually */
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
/* branch registers */
PT_B0,
PT_B1,
PT_B2,
PT_B3,
PT_B4,
PT_B5,
PT_B6,
PT_B7,
/* virtual frame pointer and virtual return address pointer */
-1, -1,
/* other registers */
PT_PR,
PT_CR_IIP, /* ip */
PT_CR_IPSR, /* psr */
PT_CR_IFS, /* cfm */
/* kernel registers not visible via ptrace interface (?) */
-1, -1, -1, -1, -1, -1, -1, -1,
/* hole */
-1, -1, -1, -1, -1, -1, -1, -1,
PT_AR_RSC,
PT_AR_BSP,
PT_AR_BSPSTORE,
PT_AR_RNAT,
-1,
-1, /* Not available: FCR, IA32 floating control register */
-1, -1,
-1, /* Not available: EFLAG */
-1, /* Not available: CSD */
-1, /* Not available: SSD */
-1, /* Not available: CFLG */
-1, /* Not available: FSR */
-1, /* Not available: FIR */
-1, /* Not available: FDR */
-1,
PT_AR_CCV,
-1, -1, -1,
PT_AR_UNAT,
-1, -1, -1,
PT_AR_FPSR,
-1, -1, -1,
-1, /* Not available: ITC */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1,
PT_AR_PFS,
PT_AR_LC,
-1, /* Not available: EC, the Epilog Count register */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1,
/* nat bits - not fetched directly; instead we obtain these bits from
either rnat or unat or from memory. */
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
};
CORE_ADDR
register_addr (regno, blockend)
int regno;
CORE_ADDR blockend;
{
CORE_ADDR addr;
if (regno < 0 || regno >= NUM_REGS)
error ("Invalid register number %d.", regno);
if (u_offsets[regno] == -1)
addr = 0;
else
addr = (CORE_ADDR) u_offsets[regno];
return addr;
}
int ia64_cannot_fetch_register (regno)
int regno;
{
return regno < 0 || regno >= NUM_REGS || u_offsets[regno] == -1;
}
int ia64_cannot_store_register (regno)
int regno;
{
/* Rationale behind not permitting stores to bspstore...
The IA-64 architecture provides bspstore and bsp which refer
memory locations in the RSE's backing store. bspstore is the
next location which will be written when the RSE needs to write
to memory. bsp is the address at which r32 in the current frame
would be found if it were written to the backing store.
The IA-64 architecture provides read-only access to bsp and
read/write access to bspstore (but only when the RSE is in
the enforced lazy mode). It should be noted that stores
to bspstore also affect the value of bsp. Changing bspstore
does not affect the number of dirty entries between bspstore
and bsp, so changing bspstore by N words will also cause bsp
to be changed by (roughly) N as well. (It could be N-1 or N+1
depending upon where the NaT collection bits fall.)
OTOH, the linux kernel provides read/write access to bsp (and
currently read/write access to bspstore as well). But it
is definitely the case that if you change one, the other
will change at the same time. It is more useful to gdb to
be able to change bsp. So in order to prevent strange and
undesirable things from happening when a dummy stack frame
is popped (after calling an inferior function), we allow
bspstore to be read, but not written. (Note that popping
a (generic) dummy stack frame causes all registers that
were previously read from the inferior process to be written
back.) */
return regno < 0 || regno >= NUM_REGS || u_offsets[regno] == -1
|| regno == IA64_BSPSTORE_REGNUM;
}
void
supply_gregset (gregsetp)
gregset_t *gregsetp;
{
int regi;
greg_t *regp = (greg_t *) gregsetp;
for (regi = IA64_GR0_REGNUM; regi <= IA64_GR31_REGNUM; regi++)
{
supply_register (regi, (char *) (regp + (regi - IA64_GR0_REGNUM)));
}
/* FIXME: NAT collection bits are at index 32; gotta deal with these
somehow... */
supply_register (IA64_PR_REGNUM, (char *) (regp + 33));
for (regi = IA64_BR0_REGNUM; regi <= IA64_BR7_REGNUM; regi++)
{
supply_register (regi, (char *) (regp + 34 + (regi - IA64_BR0_REGNUM)));
}
supply_register (IA64_IP_REGNUM, (char *) (regp + 42));
supply_register (IA64_CFM_REGNUM, (char *) (regp + 43));
supply_register (IA64_PSR_REGNUM, (char *) (regp + 44));
supply_register (IA64_RSC_REGNUM, (char *) (regp + 45));
supply_register (IA64_BSP_REGNUM, (char *) (regp + 46));
supply_register (IA64_BSPSTORE_REGNUM, (char *) (regp + 47));
supply_register (IA64_RNAT_REGNUM, (char *) (regp + 48));
supply_register (IA64_CCV_REGNUM, (char *) (regp + 49));
supply_register (IA64_UNAT_REGNUM, (char *) (regp + 50));
supply_register (IA64_FPSR_REGNUM, (char *) (regp + 51));
supply_register (IA64_PFS_REGNUM, (char *) (regp + 52));
supply_register (IA64_LC_REGNUM, (char *) (regp + 53));
supply_register (IA64_EC_REGNUM, (char *) (regp + 54));
}
void
fill_gregset (gregsetp, regno)
gregset_t *gregsetp;
int regno;
{
fprintf(stderr, "Warning: fill_gregset not implemented!\n");
/* FIXME: Implement later */
}

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