MIPS: Fix the encoding of immediates with microMIPS JALX
The microMIPS JALX instruction shares the R_MICROMIPS_26_S1 relocation with microMIPS J/JAL/JALS instructions, however unlike the latters its encoded immediate argument is unusually shifted left by 2 rather than 1 in calculating the value used for the operation requested. We already handle this exception in `mips_elf_calculate_relocation' in LD, in a scenario where JALX is produced as a result of relaxing JAL for the purpose of making a cross-mode jump. We also get it right in the disassembler in `decode_micromips_operand'. What we don't correctly do however is processing microMIPS JALX produced by GAS from an assembly source, where a non-zero constant argument or a symbol reference with a non-zero in-place addend has been used. In this case the same calculation is made as for microMIPS J/JAL/JALS, causing the wrong encoding to be produced by GAS on making an object file, and then again by LD in the final link. The latter in particular causes the calculation, where the addend fits in the relocatable field, to produce different final addresses for the same source code depending on whether REL or RELA relocations are used. Correct these issues by special-casing microMIPS JALX in the places that have been previously missed. bfd/ * elfxx-mips.c (mips_elf_read_rel_addend): Adjust the addend for microMIPS JALX. gas/ * config/tc-mips.c (append_insn): Correct the encoding of a constant argument for microMIPS JALX. (tc_gen_reloc): Correct the encoding of an in-place addend for microMIPS JALX. * testsuite/gas/mips/jalx-addend.d: New test. * testsuite/gas/mips/jalx-addend-n32.d: New test. * testsuite/gas/mips/jalx-addend-n64.d: New test. * testsuite/gas/mips/jalx-imm.d: New test. * testsuite/gas/mips/jalx-imm-n32.d: New test. * testsuite/gas/mips/jalx-imm-n64.d: New test. * testsuite/gas/mips/jalx-addend.s: New test source. * testsuite/gas/mips/jalx-imm.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/jalx-addend.d: New test. * testsuite/ld-mips-elf/jalx-addend-n32.d: New test. * testsuite/ld-mips-elf/jalx-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki
parent
134c0c8bf4
commit
17c6c9d9f3
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@ -1,3 +1,8 @@
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2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
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* elfxx-mips.c (mips_elf_read_rel_addend): Adjust the addend for
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microMIPS JALX.
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2016-05-19 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/20117
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@ -7780,16 +7780,24 @@ mips_elf_read_rel_addend (bfd *abfd, const Elf_Internal_Rela *rel,
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bfd_byte *location;
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unsigned int r_type;
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bfd_vma addend;
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bfd_vma bytes;
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r_type = ELF_R_TYPE (abfd, rel->r_info);
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location = contents + rel->r_offset;
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/* Get the addend, which is stored in the input file. */
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_bfd_mips_elf_reloc_unshuffle (abfd, r_type, FALSE, location);
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addend = mips_elf_obtain_contents (howto, rel, abfd, contents);
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bytes = mips_elf_obtain_contents (howto, rel, abfd, contents);
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_bfd_mips_elf_reloc_shuffle (abfd, r_type, FALSE, location);
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return addend & howto->src_mask;
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addend = bytes & howto->src_mask;
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/* Shift is 2, unusually, for microMIPS JALX. Adjust the addend
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accordingly. */
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if (r_type == R_MICROMIPS_26_S1 && (bytes >> 26) == 0x3c)
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addend <<= 1;
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return addend;
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}
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/* REL is a relocation in ABFD that needs a partnering LO16 relocation
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@ -1,3 +1,19 @@
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2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
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* config/tc-mips.c (append_insn): Correct the encoding of a
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constant argument for microMIPS JALX.
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(tc_gen_reloc): Correct the encoding of an in-place addend for
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microMIPS JALX.
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* testsuite/gas/mips/jalx-addend.d: New test.
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* testsuite/gas/mips/jalx-addend-n32.d: New test.
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* testsuite/gas/mips/jalx-addend-n64.d: New test.
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* testsuite/gas/mips/jalx-imm.d: New test.
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* testsuite/gas/mips/jalx-imm-n32.d: New test.
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* testsuite/gas/mips/jalx-imm-n64.d: New test.
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* testsuite/gas/mips/jalx-addend.s: New test source.
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* testsuite/gas/mips/jalx-imm.s: New test source.
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* testsuite/gas/mips/mips.exp: Run the new tests.
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2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
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* config/tc-mips.c: Correct tab-after-space formatting mistakes
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@ -7044,7 +7044,9 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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{
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int shift;
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shift = mips_opts.micromips ? 1 : 2;
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/* Shift is 2, unusually, for microMIPS JALX. */
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shift = (mips_opts.micromips
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&& strcmp (ip->insn_mo->name, "jalx") != 0) ? 1 : 2;
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if ((address_expr->X_add_number & ((1 << shift) - 1)) != 0)
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as_bad (_("jump to misaligned address (0x%lx)"),
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(unsigned long) address_expr->X_add_number);
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@ -17225,6 +17227,15 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
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Relocations want only the symbol offset. */
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reloc->addend = fixp->fx_addnumber + reloc->address;
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}
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else if (HAVE_IN_PLACE_ADDENDS
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&& fixp->fx_r_type == BFD_RELOC_MICROMIPS_JMP
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&& (read_compressed_insn (fixp->fx_frag->fr_literal
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+ fixp->fx_where, 4) >> 26) == 0x3c)
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{
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/* Shift is 2, unusually, for microMIPS JALX. Adjust the in-place
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addend accordingly. */
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reloc->addend = fixp->fx_addnumber >> 1;
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}
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else
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reloc->addend = fixp->fx_addnumber;
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@ -0,0 +1,29 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JAL/JALX addend encoding (n32)
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#as: -n32 -march=from-abi
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#source: jalx-addend.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f400 0000 jal 00000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 foo-0x3fffffe
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f000 0000 jalx 00000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 bar-0x7fffffc
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 74000000 jalx 00000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MIPS_26 foo-0x7fffffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 0c000000 jal 00000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MIPS_26 bar-0x7fffffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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@ -0,0 +1,37 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JAL/JALX addend encoding (n64)
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#as: -64 -march=from-abi
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#source: jalx-addend.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f400 0000 jal 0000000000000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 foo-0x3fffffe
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x3fffffe
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x3fffffe
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f000 0000 jalx 0000000000000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 bar-0x7fffffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x7fffffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x7fffffc
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 74000000 jalx 0000000000000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MIPS_26 foo-0x7fffffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x7fffffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x7fffffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 0c000000 jal 0000000000000000 <foo-0x1000>
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[ ]*[0-9a-f]+: R_MIPS_26 bar-0x7fffffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x7fffffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x7fffffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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@ -0,0 +1,28 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JAL/JALX addend encoding
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#as: -32
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f600 0001 jal 04000002 <bar\+0x3ffefe2>
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[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 foo
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f200 0001 jalx 08000004 <bar\+0x7ffefe4>
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[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 bar
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 76000001 jalx 08000004 <bar\+0x7ffefe4>
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[ ]*[0-9a-f]+: R_MIPS_26 foo
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 0e000001 jal 08000004 <bar\+0x7ffefe4>
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[ ]*[0-9a-f]+: R_MIPS_26 bar
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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@ -0,0 +1,35 @@
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.text
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.set noreorder
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.space 0x1000
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.align 4
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.set micromips
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.globl foo
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.ent foo
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foo:
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nor $0, $0
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jal foo - 0x3fffffe
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nor $0, $0
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jalx bar - 0x7fffffc
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end foo
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.align 4
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.set nomicromips
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.globl bar
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.ent bar
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bar:
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nor $0, $0
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jalx foo - 0x7fffffc
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nor $0, $0
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jal bar - 0x7fffffc
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end bar
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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@ -0,0 +1,5 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JAL/JALX immediate operand encoding (n32)
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#as: -n32 -march=from-abi
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#source: jalx-imm.s
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#dump: jalx-imm.d
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@ -0,0 +1,5 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JAL/JALX immediate operand encoding (n64)
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#as: -64 -march=from-abi
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#source: jalx-imm.s
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#dump: jalx-imm.d
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@ -0,0 +1,24 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JAL/JALX immediate operand encoding
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#as: -32
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f600 0001 jal 0+4000002 <bar\+0x3ffefe2>
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> f200 0001 jalx 0+8000004 <bar\+0x7ffefe4>
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 76000001 jalx 0+8000004 <bar\+0x7ffefe4>
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 0e000001 jal 0+8000004 <bar\+0x7ffefe4>
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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@ -0,0 +1,35 @@
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.text
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.set noreorder
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.space 0x1000
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.align 4
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.set micromips
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.globl foo
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.ent foo
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foo:
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nor $0, $0
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jal 0x4000002
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nor $0, $0
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jalx 0x8000004
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end foo
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.align 4
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.set nomicromips
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.globl bar
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.ent bar
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bar:
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nor $0, $0
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jalx 0x8000004
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nor $0, $0
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jal 0x8000004
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end bar
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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@ -794,6 +794,14 @@ if { [istarget mips*-*-vxworks*] } {
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run_dump_test "mips16-jalx"
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run_dump_test "mips-jalx"
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run_dump_test "mips-jalx-2"
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run_dump_test "jalx-imm"
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run_dump_test "jalx-addend"
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if $has_newabi {
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run_dump_test "jalx-imm-n32"
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run_dump_test "jalx-addend-n32"
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run_dump_test "jalx-imm-n64"
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run_dump_test "jalx-addend-n64"
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}
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# Check MIPS16 HI16/LO16 relocations
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run_dump_test "mips16-hilo"
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if $has_newabi {
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@ -1,3 +1,10 @@
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2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/ld-mips-elf/jalx-addend.d: New test.
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* testsuite/ld-mips-elf/jalx-addend-n32.d: New test.
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* testsuite/ld-mips-elf/jalx-addend-n64.d: New test.
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* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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2016-05-19 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/20117
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@ -0,0 +1,6 @@
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#name: MIPS JAL/JALX addend calculation (n32)
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#source: ../../../gas/testsuite/gas/mips/jalx-addend.s
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#as: -EB -n32 -march=from-abi
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#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
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#objdump: -dr --prefix-addresses --show-raw-insn
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#dump: jalx-addend.d
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@ -0,0 +1,6 @@
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#name: MIPS JAL/JALX addend calculation (n64)
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#source: ../../../gas/testsuite/gas/mips/jalx-addend.s
|
||||
#as: -EB -64 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#dump: jalx-addend.d
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
#name: MIPS JAL/JALX addend calculation
|
||||
#source: ../../../gas/testsuite/gas/mips/jalx-addend.s
|
||||
#as: -EB -32
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
\.\.\.
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> f400 0801 jal 0*18001002 <.*>
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> f100 0409 jalx 0*14001024 <.*>
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 0000 0000 nop
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 75000401 jalx 0*14001004 <.*>
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 0d000409 jal 0*14001024 <.*>
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
\.\.\.
|
||||
|
|
@ -168,6 +168,12 @@ if { $linux_gnu } {
|
|||
"jalx-2"]]
|
||||
}
|
||||
|
||||
run_dump_test "jalx-addend" [list [list ld $abi_ldflags(o32)]]
|
||||
if $has_newabi {
|
||||
run_dump_test "jalx-addend-n32" [list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "jalx-addend-n64" [list [list ld $abi_ldflags(n64)]]
|
||||
}
|
||||
|
||||
# Test multi-got link. We only do this on GNU/Linux because it requires
|
||||
# the "traditional" emulations.
|
||||
if { $linux_gnu } {
|
||||
|
|
|
|||
Loading…
Reference in New Issue