o Add support for configuring wordsize, fp hardware and target
endianness. Provide defaults for some tier-1 mips targets. o Parameterize all functions with SIM_DESC.
This commit is contained in:
Andrew Cagney
parent
6a587c4aae
commit
18c64df613
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@ -1,3 +1,82 @@
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Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (sim_monitor): Add SD argument.
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(sim_warning): Delete. Replace calls with calls to
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sim_io_eprintf.
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(sim_error): Delete. Replace calls with sim_io_error.
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(open_trace, writeout32, writeout16, getnum): Add SD argument.
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(mips_set_profile): Rename from sim_set_profile. Add SD argument.
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(mips_set_profile_size): Rename from sim_set_profile_size. Add SD
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argument.
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(mips_size): Rename from sim_size. Add SD argument.
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* interp.c (simulator): Delete global variable.
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(callback): Delete global variable.
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(mips_option_handler, sim_open, sim_write, sim_read,
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sim_store_register, sim_fetch_register, sim_info, sim_do_command,
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sim_size,sim_monitor): Use sim_io_* not callback->*.
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(sim_open): ZALLOC simulator struct.
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(PROFILE): Do not define.
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Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (sim_open), support.h: Replace CHECKSIM macro found in
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support.h with corresponding code.
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* sim-main.h (word64, uword64), support.h: Move definition to
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sim-main.h.
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(WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
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* support.h: Delete
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* Makefile.in: Update dependencies
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* interp.c: Do not include.
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Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (address_translation, load_memory, store_memory,
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cache_op): Rename to from AddressTranslation et.al., make global,
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add SD argument
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* sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
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CacheOp): Define.
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* interp.c (SignalException): Rename to signal_exception, make
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global.
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* interp.c (Interrupt, ...): Move definitions to sim-main.h.
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* sim-main.h (SignalException, SignalExceptionInterrupt,
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SignalExceptionInstructionFetch, SignalExceptionAddressStore,
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SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
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SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
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Define.
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* interp.c, support.h: Use.
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Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
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to value_fpr / store_fpr. Add SD argument.
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(NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
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Multiply, Divide, Recip, SquareRoot, Convert): Make global.
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* sim-main.h (ValueFPR, StoreFPR): Define.
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Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (sim_engine_run): Check consistency between configure
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WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
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and HASFPU.
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* configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
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(mips_fpu): Configure WITH_FLOATING_POINT.
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(mips_endian): Configure WITH_TARGET_ENDIAN.
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* configure: Update.
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Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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start-sanitize-r5900
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Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
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@ -35,6 +35,8 @@ SIM_EXTRA_CFLAGS = \
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SIM_EXTRA_CLEAN = clean-extra
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SIM_EXTRA_ALL = tmp.igen
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# List of main object files for `run'.
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SIM_RUN_OBJS = nrun.o
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@ -42,20 +44,25 @@ SIM_RUN_OBJS = nrun.o
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## COMMON_POST_CONFIG_FRAG
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interp.o: $(srcdir)/interp.c engine.c $(srcdir)/support.h config.h
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interp.o: $(srcdir)/interp.c engine.c config.h
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engine.c: gencode
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./gencode @SIMCONF@ > $@
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./gencode @SIMCONF@ > tmp-engine
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mv tmp-engine engine.c
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tmp.igen: gencode
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./gencode --igen @SIMCONF@ > tmp-igen
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mv tmp-igen tmp.igen
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gencode: gencode.o getopt.o getopt1.o
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$(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o
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gencode.o: $(srcdir)/gencode.c
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$(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c
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getopt.o: $(srcdir)/../../libiberty/getopt.c
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$(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c
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getopt1.o: $(srcdir)/../../libiberty/getopt1.c
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$(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c
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clean-extra:
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rm -f gencode engine.c
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rm -f gencode engine.c tmp.igen
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@ -59,6 +59,12 @@
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@ -91,14 +97,18 @@ ac_help="$ac_help
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--enable-sim-profile=opts Enable profiling flags"
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ac_help="$ac_help
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--enable-sim-inline=inlines Specify which functions should be inlined."
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ac_help="$ac_help
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--enable-sim-endian=endian Specify target byte endian orientation."
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ac_help="$ac_help
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--enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses."
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ac_help="$ac_help
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--enable-sim-hostendain=end Specify host byte endian orientation."
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ac_help="$ac_help
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--enable-sim-warnings=opts Extra CFLAGS for turning on compiler warnings"
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ac_help="$ac_help
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--enable-sim-endian=endian Specify target byte endian orientation."
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ac_help="$ac_help
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--enable-sim-bitsize=n Specify target bitsize (32 or 64)."
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ac_help="$ac_help
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--enable-sim-float Specify that the target processor has floating point hardware."
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# Initialize some variables set by options.
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# The variables have the same names as the options, with
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@ -608,7 +618,7 @@ fi
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echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
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echo "configure:612: checking how to run the C preprocessor" >&5
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echo "configure:622: checking how to run the C preprocessor" >&5
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# On Suns, sometimes $CPP names a directory.
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if test -n "$CPP" && test -d "$CPP"; then
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CPP=
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@ -623,13 +633,13 @@ else
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# On the NeXT, cc -E runs the code through the compiler's parser,
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# not just through cpp.
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cat > conftest.$ac_ext <<EOF
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#line 627 "configure"
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#line 637 "configure"
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#include "confdefs.h"
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#include <assert.h>
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Syntax Error
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EOF
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ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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{ (eval echo configure:633: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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{ (eval echo configure:643: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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ac_err=`grep -v '^ *+' conftest.out`
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if test -z "$ac_err"; then
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:
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@ -640,13 +650,13 @@ else
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rm -rf conftest*
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CPP="${CC-cc} -E -traditional-cpp"
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cat > conftest.$ac_ext <<EOF
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#line 644 "configure"
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#line 654 "configure"
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#include "confdefs.h"
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#include <assert.h>
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Syntax Error
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EOF
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ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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{ (eval echo configure:650: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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{ (eval echo configure:660: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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ac_err=`grep -v '^ *+' conftest.out`
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if test -z "$ac_err"; then
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:
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@ -719,7 +729,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
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fi
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echo $ac_n "checking host system type""... $ac_c" 1>&6
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echo "configure:723: checking host system type" >&5
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echo "configure:733: checking host system type" >&5
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host_alias=$host
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case "$host_alias" in
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@ -740,7 +750,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
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echo "$ac_t""$host" 1>&6
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echo $ac_n "checking target system type""... $ac_c" 1>&6
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echo "configure:744: checking target system type" >&5
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echo "configure:754: checking target system type" >&5
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target_alias=$target
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case "$target_alias" in
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@ -758,7 +768,7 @@ target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
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echo "$ac_t""$target" 1>&6
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echo $ac_n "checking build system type""... $ac_c" 1>&6
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echo "configure:762: checking build system type" >&5
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echo "configure:772: checking build system type" >&5
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build_alias=$build
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case "$build_alias" in
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@ -802,7 +812,7 @@ test "$program_transform_name" = "" && program_transform_name="s,x,x,"
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# Extract the first word of "gcc", so it can be a program name with args.
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set dummy gcc; ac_word=$2
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echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
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echo "configure:806: checking for $ac_word" >&5
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echo "configure:816: checking for $ac_word" >&5
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if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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@ -831,7 +841,7 @@ if test -z "$CC"; then
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# Extract the first word of "cc", so it can be a program name with args.
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set dummy cc; ac_word=$2
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echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
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echo "configure:835: checking for $ac_word" >&5
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echo "configure:845: checking for $ac_word" >&5
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if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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@ -879,7 +889,7 @@ fi
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fi
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echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
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echo "configure:883: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
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echo "configure:893: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
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ac_ext=c
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# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
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@ -889,11 +899,11 @@ ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS
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cross_compiling=$ac_cv_prog_cc_cross
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cat > conftest.$ac_ext <<EOF
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#line 893 "configure"
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#line 903 "configure"
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#include "confdefs.h"
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main(){return(0);}
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EOF
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if { (eval echo configure:897: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
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if { (eval echo configure:907: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
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ac_cv_prog_cc_works=yes
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# If we can't run a trivial program, we are probably using a cross compiler.
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if (./conftest; exit) 2>/dev/null; then
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@ -913,12 +923,12 @@ if test $ac_cv_prog_cc_works = no; then
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{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
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fi
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echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
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echo "configure:917: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
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echo "configure:927: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
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echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
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cross_compiling=$ac_cv_prog_cc_cross
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echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
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echo "configure:922: checking whether we are using GNU C" >&5
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echo "configure:932: checking whether we are using GNU C" >&5
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if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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@ -927,7 +937,7 @@ else
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yes;
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#endif
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EOF
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if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:931: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
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if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:941: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
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ac_cv_prog_gcc=yes
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else
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ac_cv_prog_gcc=no
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@ -942,7 +952,7 @@ if test $ac_cv_prog_gcc = yes; then
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ac_save_CFLAGS="$CFLAGS"
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CFLAGS=
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echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
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echo "configure:946: checking whether ${CC-cc} accepts -g" >&5
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echo "configure:956: checking whether ${CC-cc} accepts -g" >&5
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if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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@ -980,7 +990,7 @@ fi
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# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
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# ./install, which can be erroneously created by make from ./install.sh.
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echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
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echo "configure:984: checking for a BSD compatible install" >&5
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echo "configure:994: checking for a BSD compatible install" >&5
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if test -z "$INSTALL"; then
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if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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@ -1045,7 +1055,7 @@ AR=${AR-ar}
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# Extract the first word of "ranlib", so it can be a program name with args.
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set dummy ranlib; ac_word=$2
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echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
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echo "configure:1049: checking for $ac_word" >&5
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echo "configure:1059: checking for $ac_word" >&5
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if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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@ -1079,17 +1089,17 @@ for ac_hdr in stdlib.h string.h strings.h unistd.h time.h sys/time.h sys/resourc
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do
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ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
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echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
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echo "configure:1083: checking for $ac_hdr" >&5
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echo "configure:1093: checking for $ac_hdr" >&5
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if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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cat > conftest.$ac_ext <<EOF
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#line 1088 "configure"
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#line 1098 "configure"
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#include "confdefs.h"
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#include <$ac_hdr>
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EOF
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ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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{ (eval echo configure:1093: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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{ (eval echo configure:1103: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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ac_err=`grep -v '^ *+' conftest.out`
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if test -z "$ac_err"; then
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rm -rf conftest*
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@ -1118,12 +1128,12 @@ done
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for ac_func in getrusage time
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do
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echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
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echo "configure:1122: checking for $ac_func" >&5
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echo "configure:1132: checking for $ac_func" >&5
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if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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cat > conftest.$ac_ext <<EOF
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#line 1127 "configure"
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#line 1137 "configure"
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#include "confdefs.h"
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/* System header to define __stub macros and hopefully few prototypes,
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which can conflict with char $ac_func(); below. */
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@ -1146,7 +1156,7 @@ $ac_func();
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; return 0; }
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EOF
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if { (eval echo configure:1150: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
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if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
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rm -rf conftest*
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eval "ac_cv_func_$ac_func=yes"
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else
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@ -1301,12 +1311,12 @@ fi
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echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
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echo "configure:1305: checking return type of signal handlers" >&5
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echo "configure:1315: checking return type of signal handlers" >&5
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if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 1310 "configure"
|
||||
#line 1320 "configure"
|
||||
#include "confdefs.h"
|
||||
#include <sys/types.h>
|
||||
#include <signal.h>
|
||||
|
|
@ -1323,7 +1333,7 @@ int main() {
|
|||
int i;
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:1327: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
if { (eval echo configure:1337: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
rm -rf conftest*
|
||||
ac_cv_type_signal=void
|
||||
else
|
||||
|
|
@ -1403,52 +1413,6 @@ else
|
|||
fi
|
||||
fi
|
||||
|
||||
|
||||
wire_endian="0"
|
||||
default_endian=""
|
||||
# Check whether --enable-sim-endian or --disable-sim-endian was given.
|
||||
if test "${enable_sim_endian+set}" = set; then
|
||||
enableval="$enable_sim_endian"
|
||||
case "${enableval}" in
|
||||
b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
|
||||
l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
|
||||
yes) if test x"$wire_endian" != x; then
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
|
||||
else
|
||||
if test x"$default_endian" != x; then
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
|
||||
else
|
||||
echo "No hard-wired endian for target $target" 1>&6
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
|
||||
fi
|
||||
fi;;
|
||||
no) if test x"$default_endian" != x; then
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
|
||||
else
|
||||
if test x"$wire_endian" != x; then
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
|
||||
else
|
||||
echo "No default endian for target $target" 1>&6
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
|
||||
fi
|
||||
fi;;
|
||||
*) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
|
||||
esac
|
||||
if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
|
||||
echo "Setting endian flags = $sim_endian" 6>&1
|
||||
fi
|
||||
else
|
||||
if test x"$default_endian" != x; then
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
|
||||
else
|
||||
if test x"$wire_endian" != x; then
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
|
||||
else
|
||||
sim_endian=
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
wire_alignment="NONSTRICT_ALIGNMENT"
|
||||
default_alignment=""
|
||||
|
||||
|
|
@ -1513,14 +1477,14 @@ else
|
|||
|
||||
if test "x$cross_compiling" = "xno"; then
|
||||
echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
|
||||
echo "configure:1517: checking whether byte ordering is bigendian" >&5
|
||||
echo "configure:1481: checking whether byte ordering is bigendian" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
ac_cv_c_bigendian=unknown
|
||||
# See if sys/param.h defines the BYTE_ORDER macro.
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 1524 "configure"
|
||||
#line 1488 "configure"
|
||||
#include "confdefs.h"
|
||||
#include <sys/types.h>
|
||||
#include <sys/param.h>
|
||||
|
|
@ -1531,11 +1495,11 @@ int main() {
|
|||
#endif
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:1535: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
if { (eval echo configure:1499: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
rm -rf conftest*
|
||||
# It does; now see whether it defined to BIG_ENDIAN or not.
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 1539 "configure"
|
||||
#line 1503 "configure"
|
||||
#include "confdefs.h"
|
||||
#include <sys/types.h>
|
||||
#include <sys/param.h>
|
||||
|
|
@ -1546,7 +1510,7 @@ int main() {
|
|||
#endif
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:1550: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
if { (eval echo configure:1514: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
rm -rf conftest*
|
||||
ac_cv_c_bigendian=yes
|
||||
else
|
||||
|
|
@ -1566,7 +1530,7 @@ if test "$cross_compiling" = yes; then
|
|||
{ echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
|
||||
else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 1570 "configure"
|
||||
#line 1534 "configure"
|
||||
#include "confdefs.h"
|
||||
main () {
|
||||
/* Are we little or big endian? From Harbison&Steele. */
|
||||
|
|
@ -1579,7 +1543,7 @@ main () {
|
|||
exit (u.c[sizeof (long) - 1] == 1);
|
||||
}
|
||||
EOF
|
||||
if { (eval echo configure:1583: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest && (./conftest; exit) 2>/dev/null
|
||||
if { (eval echo configure:1547: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest && (./conftest; exit) 2>/dev/null
|
||||
then
|
||||
ac_cv_c_bigendian=no
|
||||
else
|
||||
|
|
@ -1636,7 +1600,7 @@ case "${target}" in
|
|||
mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";;
|
||||
# end-sanitize-tx19
|
||||
# start-sanitize-r5900
|
||||
mips64vr59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";;
|
||||
mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";;
|
||||
# end-sanitize-r5900
|
||||
mips64*-*-*) SIMCONF="-mips0 --warnings";;
|
||||
mips16*-*-*) SIMCONF="-mips0 --warnings";;
|
||||
|
|
@ -1653,21 +1617,172 @@ case "${target}" in
|
|||
esac
|
||||
|
||||
|
||||
|
||||
#
|
||||
# Select the byte order of the target
|
||||
#
|
||||
case "${target}" in
|
||||
# start-sanitize-tx19
|
||||
mipstx19*-*-*) mips_endian=0 ;;
|
||||
# end-sanitize-tx19
|
||||
# start-sanitize-r5900
|
||||
mips64r59*-*-*) mips_endian=LITTLE_ENDIAN ;;
|
||||
# end-sanitize-r5900
|
||||
mips64*-*-*) mips_endian=0 ;;
|
||||
mips16*-*-*) mips_endian=0 ;;
|
||||
mips*-*-*) mips_endian=0 ;;
|
||||
*) mips_endian=0 ;;
|
||||
esac
|
||||
|
||||
wire_endian="$mips_endian"
|
||||
default_endian=""
|
||||
# Check whether --enable-sim-endian or --disable-sim-endian was given.
|
||||
if test "${enable_sim_endian+set}" = set; then
|
||||
enableval="$enable_sim_endian"
|
||||
case "${enableval}" in
|
||||
b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
|
||||
l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
|
||||
yes) if test x"$wire_endian" != x; then
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
|
||||
else
|
||||
if test x"$default_endian" != x; then
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
|
||||
else
|
||||
echo "No hard-wired endian for target $target" 1>&6
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
|
||||
fi
|
||||
fi;;
|
||||
no) if test x"$default_endian" != x; then
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
|
||||
else
|
||||
if test x"$wire_endian" != x; then
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
|
||||
else
|
||||
echo "No default endian for target $target" 1>&6
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
|
||||
fi
|
||||
fi;;
|
||||
*) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
|
||||
esac
|
||||
if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
|
||||
echo "Setting endian flags = $sim_endian" 6>&1
|
||||
fi
|
||||
else
|
||||
if test x"$default_endian" != x; then
|
||||
sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
|
||||
else
|
||||
if test x"$wire_endian" != x; then
|
||||
sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
|
||||
else
|
||||
sim_endian=
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
|
||||
|
||||
#
|
||||
# Select the bitsize of the target
|
||||
#
|
||||
case "${target}" in
|
||||
# start-sanitize-tx19
|
||||
mipstx19*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
|
||||
# end-sanitize-tx19
|
||||
# start-sanitize-r5900
|
||||
mips64r59*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
# end-sanitize-r5900
|
||||
mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
|
||||
*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
esac
|
||||
wire_bitsize="$mips_bitsize"
|
||||
wire_msb="$mips_msb"
|
||||
# Check whether --enable-sim-bitsize or --disable-sim-bitsize was given.
|
||||
if test "${enable_sim_bitsize+set}" = set; then
|
||||
enableval="$enable_sim_bitsize"
|
||||
case "${enableval}" in
|
||||
64,63) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";;
|
||||
32,31) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";;
|
||||
64,0) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
|
||||
32,0) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
|
||||
32) if test x"$wire_msb" != x -a x"$wire_msb" != x0; then
|
||||
sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31"
|
||||
else
|
||||
sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0"
|
||||
fi ;;
|
||||
64) if test x"$wire_msb" != x -a x"$wire_msb" != x0; then
|
||||
sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63"
|
||||
else
|
||||
sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0"
|
||||
fi ;;
|
||||
*) { echo "configure: error: "--enable-sim-bitsize was given $enableval. Expected 32 or 64"" 1>&2; exit 1; }; sim_bitsize="";;
|
||||
esac
|
||||
if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
|
||||
echo "Setting bitsize flags = $sim_bitsize" 6>&1
|
||||
fi
|
||||
else
|
||||
sim_bitsize=""
|
||||
if test x"$wire_bitsize" != x; then
|
||||
sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_bitsize"
|
||||
fi
|
||||
if test x"$wire_msb" != x; then
|
||||
sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_msb"
|
||||
fi
|
||||
fi
|
||||
|
||||
|
||||
|
||||
#
|
||||
# Select the floating hardware support of the target
|
||||
#
|
||||
mips_fpu=HARDWARE_FLOATING_POINT
|
||||
case "${target}" in
|
||||
# start-sanitize-tx19
|
||||
mipstx19*-*-*) mips_fpu=SOFT_FLOATING_POINT ;;
|
||||
# end-sanitize-tx19
|
||||
# start-sanitize-r5900
|
||||
mips64r59*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
# end-sanitize-r5900
|
||||
mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
mips*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
esac
|
||||
|
||||
default_sim_floating_point="$mips_fpu"
|
||||
# Check whether --enable-sim-float or --disable-sim-float was given.
|
||||
if test "${enable_sim_float+set}" = set; then
|
||||
enableval="$enable_sim_float"
|
||||
case "${enableval}" in
|
||||
yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";;
|
||||
no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";;
|
||||
*) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-float"" 1>&2; exit 1; }; sim_float="";;
|
||||
esac
|
||||
if test x"$silent" != x"yes" && test x"$sim_float" != x""; then
|
||||
echo "Setting float flags = $sim_float" 6>&1
|
||||
fi
|
||||
else
|
||||
sim_float="-DWITH_FLOATING_POINT=${default_sim_floating_point}"
|
||||
fi
|
||||
|
||||
|
||||
|
||||
for ac_hdr in string.h strings.h stdlib.h stdlib.h
|
||||
do
|
||||
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
|
||||
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
|
||||
echo "configure:1661: checking for $ac_hdr" >&5
|
||||
echo "configure:1776: checking for $ac_hdr" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 1666 "configure"
|
||||
#line 1781 "configure"
|
||||
#include "confdefs.h"
|
||||
#include <$ac_hdr>
|
||||
EOF
|
||||
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
|
||||
{ (eval echo configure:1671: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
|
||||
{ (eval echo configure:1786: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
|
||||
ac_err=`grep -v '^ *+' conftest.out`
|
||||
if test -z "$ac_err"; then
|
||||
rm -rf conftest*
|
||||
|
|
@ -1694,7 +1809,7 @@ fi
|
|||
done
|
||||
|
||||
echo $ac_n "checking for fabs in -lm""... $ac_c" 1>&6
|
||||
echo "configure:1698: checking for fabs in -lm" >&5
|
||||
echo "configure:1813: checking for fabs in -lm" >&5
|
||||
ac_lib_var=`echo m'_'fabs | sed 'y%./+-%__p_%'`
|
||||
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
|
|
@ -1702,7 +1817,7 @@ else
|
|||
ac_save_LIBS="$LIBS"
|
||||
LIBS="-lm $LIBS"
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 1706 "configure"
|
||||
#line 1821 "configure"
|
||||
#include "confdefs.h"
|
||||
/* Override any gcc2 internal prototype to avoid an error. */
|
||||
/* We use char because int might match the return type of a gcc2
|
||||
|
|
@ -1713,7 +1828,7 @@ int main() {
|
|||
fabs()
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:1717: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
|
||||
if { (eval echo configure:1832: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
|
||||
rm -rf conftest*
|
||||
eval "ac_cv_lib_$ac_lib_var=yes"
|
||||
else
|
||||
|
|
@ -1743,12 +1858,12 @@ fi
|
|||
for ac_func in aint anint sqrt
|
||||
do
|
||||
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
|
||||
echo "configure:1747: checking for $ac_func" >&5
|
||||
echo "configure:1862: checking for $ac_func" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 1752 "configure"
|
||||
#line 1867 "configure"
|
||||
#include "confdefs.h"
|
||||
/* System header to define __stub macros and hopefully few prototypes,
|
||||
which can conflict with char $ac_func(); below. */
|
||||
|
|
@ -1771,7 +1886,7 @@ $ac_func();
|
|||
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:1775: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
|
||||
if { (eval echo configure:1890: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
|
||||
rm -rf conftest*
|
||||
eval "ac_cv_func_$ac_func=yes"
|
||||
else
|
||||
|
|
@ -1910,6 +2025,7 @@ $ac_vpsub
|
|||
$extrasub
|
||||
s%@sim_alignment@%$sim_alignment%g
|
||||
s%@sim_assert@%$sim_assert%g
|
||||
s%@sim_bitsize@%$sim_bitsize%g
|
||||
s%@sim_endian@%$sim_endian%g
|
||||
s%@sim_hostendian@%$sim_hostendian%g
|
||||
s%@sim_float@%$sim_float%g
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@ SIM_AC_COMMON
|
|||
|
||||
dnl Options available in this module
|
||||
SIM_AC_OPTION_INLINE(0)
|
||||
SIM_AC_OPTION_ENDIAN(0)
|
||||
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
|
||||
SIM_AC_OPTION_HOSTENDIAN
|
||||
SIM_AC_OPTION_WARNINGS
|
||||
|
|
@ -36,6 +35,62 @@ case "${target}" in
|
|||
esac
|
||||
AC_SUBST(SIM_SUBTARGET)
|
||||
|
||||
|
||||
#
|
||||
# Select the byte order of the target
|
||||
#
|
||||
case "${target}" in
|
||||
# start-sanitize-tx19
|
||||
mipstx19*-*-*) mips_endian=0 ;;
|
||||
# end-sanitize-tx19
|
||||
# start-sanitize-r5900
|
||||
mips64r59*-*-*) mips_endian=LITTLE_ENDIAN ;;
|
||||
# end-sanitize-r5900
|
||||
mips64*-*-*) mips_endian=0 ;;
|
||||
mips16*-*-*) mips_endian=0 ;;
|
||||
mips*-*-*) mips_endian=0 ;;
|
||||
*) mips_endian=0 ;;
|
||||
esac
|
||||
SIM_AC_OPTION_ENDIAN($mips_endian)
|
||||
|
||||
|
||||
#
|
||||
# Select the bitsize of the target
|
||||
#
|
||||
case "${target}" in
|
||||
# start-sanitize-tx19
|
||||
mipstx19*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
|
||||
# end-sanitize-tx19
|
||||
# start-sanitize-r5900
|
||||
mips64r59*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
# end-sanitize-r5900
|
||||
mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
|
||||
*) mips_bitsize=64 ; mips_msb=63 ;;
|
||||
esac
|
||||
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb)
|
||||
|
||||
|
||||
#
|
||||
# Select the floating hardware support of the target
|
||||
#
|
||||
mips_fpu=HARDWARE_FLOATING_POINT
|
||||
case "${target}" in
|
||||
# start-sanitize-tx19
|
||||
mipstx19*-*-*) mips_fpu=SOFT_FLOATING_POINT ;;
|
||||
# end-sanitize-tx19
|
||||
# start-sanitize-r5900
|
||||
mips64r59*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
# end-sanitize-r5900
|
||||
mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
mips*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
*) mips_fpu=HARD_FLOATING_POINT ;;
|
||||
esac
|
||||
SIM_AC_OPTION_FLOAT($mips_fpu)
|
||||
|
||||
|
||||
AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
|
||||
AC_CHECK_LIB(m, fabs)
|
||||
AC_CHECK_FUNCS(aint anint sqrt)
|
||||
|
|
|
|||
|
|
@ -1570,7 +1570,7 @@ build_operands(doisa,features,insn)
|
|||
ensure that the following opcode processing is not
|
||||
executed. i.e. the code falls straight out to the simulator
|
||||
control loop. */
|
||||
printf(" sim_warning(\"Instruction has lo-order offset bits set in instruction\");\n");
|
||||
printf(" sim_io_eprintf(sd,\"Instruction has lo-order offset bits set in instruction\\n\");\n");
|
||||
printf(" }\n");
|
||||
}
|
||||
#endif
|
||||
|
|
@ -2461,7 +2461,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
printf(" %s tempS UNUSED = (%s)temp;\n", signed_basetype, signed_basetype);
|
||||
if (insn->flags & OVERFLOW) {
|
||||
printf(" if (((op1 < 0) == (op2 < 0)) && ((tempS < 0) != (op1 < 0)))\n");
|
||||
printf(" SignalException(IntegerOverflow);\n");
|
||||
printf(" SignalExceptionIntegerOverflow ();\n");
|
||||
printf(" else\n");
|
||||
}
|
||||
if (!proc64 || (insn->flags & UNSIGNED) || (GETDATASIZEINSN(insn) == DOUBLEWORD))
|
||||
|
|
@ -2473,7 +2473,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
printf(" %s tempS UNUSED = (%s)temp;\n", signed_basetype, signed_basetype);
|
||||
if (insn->flags & OVERFLOW) { /* different signs => overflow if result_sign != arg_sign */
|
||||
printf(" if (((op1 < 0) != (op2 < 0)) && ((tempS < 0) == (op1 < 0)))\n");
|
||||
printf(" SignalException(IntegerOverflow);\n");
|
||||
printf(" SignalExceptionIntegerOverflow ();\n");
|
||||
printf(" else\n");
|
||||
}
|
||||
/* UNSIGNED 32bit operations on a 64bit processor should
|
||||
|
|
@ -2664,7 +2664,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
else {
|
||||
if (features & FEATURE_WARN_LOHI) {
|
||||
printf(" if (%s%sACCESS != 0)\n",regname,(pipe1 ? "1" : ""));
|
||||
printf(" sim_warning(\"MT (move-to) over-writing %s register value\");\n",regname);
|
||||
printf(" sim_io_eprintf(sd,\"MT (move-to) over-writing %s register value\\n\");\n",regname);
|
||||
}
|
||||
printf(" %s%s = op1;\n",regname,(pipe1 ? "1" : ""));
|
||||
}
|
||||
|
|
@ -2784,7 +2784,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
if (features & FEATURE_WARN_RESULT) {
|
||||
/* Give user a warning if either op1 or op2 are not 16bit signed integers */
|
||||
printf(" if (NOTHALFWORDVALUE(op1) || NOTHALFWORDVALUE(op2))\n");
|
||||
printf(" sim_warning(\"MADD16 operation with non-16bit operands\");\n");
|
||||
printf(" sim_io_eprintf(sd,\"MADD16 operation with non-16bit operands\\n\");\n");
|
||||
}
|
||||
printf(" {\n");
|
||||
printf(" uword64 temp = (op1 * op2);\n"); /* 16x16 multiply */
|
||||
|
|
@ -2801,7 +2801,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
case RSVD: /* "Reserved Instruction" on MIPS IV, or if co-proc 3 absent. Otherwise "CoProcessorUnusable" */
|
||||
if (doisa < 4) {
|
||||
printf(" if (CoProcPresent(3))\n");
|
||||
printf(" SignalException(CoProcessorUnusable);\n");
|
||||
printf(" SignalExceptionCoProcessorUnusable ();\n");
|
||||
printf(" else\n");
|
||||
}
|
||||
printf(" SignalException(ReservedInstruction,instruction);\n");
|
||||
|
|
@ -2862,7 +2862,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
if (insn->flags & LINK) {
|
||||
if (features & FEATURE_WARN_R31) {
|
||||
printf(" if (((instruction >> %d) & 0x%08X) == 31)\n",OP_SH_RS,OP_MASK_RS);
|
||||
printf(" sim_warning(\"Branch with link using r31 as source operand\");\n");
|
||||
printf(" sim_io_eprintf(sd,\"Branch with link using r31 as source operand\\n\");\n");
|
||||
}
|
||||
printf(" GPR[31] = (PC + 4); /* NOTE: PC is already 8 ahead */\n");
|
||||
}
|
||||
|
|
@ -2937,7 +2937,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
/* The following check should only occur on normal (non-shifted) memory loads */
|
||||
if ((datalen != 1) && !(insn->flags & (LEFT | RIGHT))) {
|
||||
printf(" if ((vaddr & %d) != 0)\n",(datalen - 1));
|
||||
printf(" SignalException(%s);\n",(isload ? "AddressLoad" : "AddressStore"));
|
||||
printf(" SignalException%s();\n",(isload ? "AddressLoad" : "AddressStore"));
|
||||
printf(" else\n") ;
|
||||
}
|
||||
|
||||
|
|
@ -3609,7 +3609,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
printf(" if (NaN(ofs,format) || NaN(oft,format)) {\n");
|
||||
printf(" if (FCSR & FP_ENABLE(IO)) {\n");
|
||||
printf(" FCSR |= FP_CAUSE(IO);\n");
|
||||
printf(" SignalException(FPE);\n");
|
||||
printf(" SignalExceptionFPE ();\n");
|
||||
printf(" ignore = 1;\n");
|
||||
printf(" }\n");
|
||||
printf(" } else {\n");
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,221 @@
|
|||
/* MIPS Simulator definition.
|
||||
Copyright (C) 1997 Free Software Foundation, Inc.
|
||||
Contributed by Cygnus Support.
|
||||
|
||||
This file is part of GDB, the GNU debugger.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2, or (at your option)
|
||||
any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License along
|
||||
with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||
|
||||
#ifndef SIM_MAIN_H
|
||||
#define SIM_MAIN_H
|
||||
|
||||
/* This simulator doesn't cache the Current Instruction Address */
|
||||
#define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA)
|
||||
#define SIM_ENGINE_RESUME_HOOK(SD, LAST_CPU, CIA)
|
||||
|
||||
#define SIM_HAVE_BIENDIAN
|
||||
#define SIM_HAVE_FLATMEM
|
||||
|
||||
|
||||
/* hobble some common features for moment */
|
||||
#define WITH_PROFILE 0
|
||||
#define WITH_TRACE 0
|
||||
#define WITH_WATCHPOINTS 1
|
||||
|
||||
#include "sim-basics.h"
|
||||
|
||||
/* dummy - not used */
|
||||
typedef int sim_cia;
|
||||
#define NULL_CIA 0
|
||||
|
||||
#include "sim-base.h"
|
||||
|
||||
|
||||
/* Depreciated macros and types for manipulating 64bit values. Use
|
||||
../common/sim-bits.h and ../common/sim-endian.h macros instead. */
|
||||
|
||||
typedef signed64 word64;
|
||||
typedef unsigned64 uword64;
|
||||
|
||||
#define WORD64LO(t) (unsigned int)((t)&0xFFFFFFFF)
|
||||
#define WORD64HI(t) (unsigned int)(((uword64)(t))>>32)
|
||||
#define SET64LO(t) (((uword64)(t))&0xFFFFFFFF)
|
||||
#define SET64HI(t) (((uword64)(t))<<32)
|
||||
#define WORD64(h,l) ((word64)((SET64HI(h)|SET64LO(l))))
|
||||
#define UWORD64(h,l) (SET64HI(h)|SET64LO(l))
|
||||
|
||||
/* Sign-extend the given value (e) as a value (b) bits long. We cannot
|
||||
assume the HI32bits of the operand are zero, so we must perform a
|
||||
mask to ensure we can use the simple subtraction to sign-extend. */
|
||||
#define SIGNEXTEND(e,b) \
|
||||
(((e) & ((uword64) 1 << ((b) - 1))) \
|
||||
? (((e) & (((uword64) 1 << (b)) - 1)) - ((uword64)1 << (b))) \
|
||||
: ((e) & (((((uword64) 1 << ((b) - 1)) - 1) << 1) | 1)))
|
||||
|
||||
/* Check if a value will fit within a halfword: */
|
||||
#define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1))
|
||||
|
||||
/* windows always looses */
|
||||
#include <signal.h>
|
||||
#ifndef SIGBUS
|
||||
#define SIGBUS SIGSEGV
|
||||
#endif
|
||||
#ifdef _WIN32
|
||||
#define SIGTRAP 5
|
||||
#define SIGQUIT 3
|
||||
#endif
|
||||
|
||||
|
||||
/* FIXME: At present the CPU registers are static */
|
||||
struct _sim_cpu {
|
||||
sim_cpu_base base;
|
||||
};
|
||||
|
||||
|
||||
/* MIPS specific simulator watch config */
|
||||
|
||||
void watch_options_install PARAMS ((SIM_DESC sd));
|
||||
|
||||
struct swatch {
|
||||
sim_event *pc;
|
||||
sim_event *clock;
|
||||
sim_event *cycles;
|
||||
};
|
||||
|
||||
|
||||
/* FIXME: At present much of the simulator is still static */
|
||||
struct sim_state {
|
||||
|
||||
struct swatch watch;
|
||||
|
||||
sim_cpu cpu[1];
|
||||
#if (WITH_SMP)
|
||||
#define STATE_CPU(sd,n) (&(sd)->cpu[n])
|
||||
#else
|
||||
#define STATE_CPU(sd,n) (&(sd)->cpu[0])
|
||||
#endif
|
||||
|
||||
sim_state_base base;
|
||||
};
|
||||
|
||||
|
||||
/* Exceptions: */
|
||||
|
||||
/* NOTE: These numbers depend on the processor architecture being
|
||||
simulated: */
|
||||
#define Interrupt (0)
|
||||
#define TLBModification (1)
|
||||
#define TLBLoad (2)
|
||||
#define TLBStore (3)
|
||||
#define AddressLoad (4)
|
||||
#define AddressStore (5)
|
||||
#define InstructionFetch (6)
|
||||
#define DataReference (7)
|
||||
#define SystemCall (8)
|
||||
#define BreakPoint (9)
|
||||
#define ReservedInstruction (10)
|
||||
#define CoProcessorUnusable (11)
|
||||
#define IntegerOverflow (12) /* Arithmetic overflow (IDT monitor raises SIGFPE) */
|
||||
#define Trap (13)
|
||||
#define FPE (15)
|
||||
#define DebugBreakPoint (16)
|
||||
#define Watch (23)
|
||||
|
||||
/* The following exception code is actually private to the simulator
|
||||
world. It is *NOT* a processor feature, and is used to signal
|
||||
run-time errors in the simulator. */
|
||||
#define SimulatorFault (0xFFFFFFFF)
|
||||
|
||||
void signal_exception (SIM_DESC sd, int exception, ...);
|
||||
#define SignalException(exc,instruction) signal_exception (sd, (exc), (instruction))
|
||||
#define SignalExceptionInterrupt() signal_exception (sd, Interrupt)
|
||||
#define SignalExceptionInstructionFetch() signal_exception (sd, InstructionFetch)
|
||||
#define SignalExceptionAddressStore() signal_exception (sd, AddressStore)
|
||||
#define SignalExceptionAddressLoad() signal_exception (sd, AddressLoad)
|
||||
#define SignalExceptionSimulatorFault(buf) signal_exception (sd, SimulatorFault, buf)
|
||||
#define SignalExceptionFPE() signal_exception (sd, FPE)
|
||||
#define SignalExceptionIntegerOverflow() signal_exception (sd, IntegerOverflow)
|
||||
#define SignalExceptionCoProcessorUnusable() signal_exception (sd, CoProcessorUnusable)
|
||||
|
||||
|
||||
/* Floating-point operations: */
|
||||
|
||||
/* FPU registers must be one of the following types. All other values
|
||||
are reserved (and undefined). */
|
||||
typedef enum {
|
||||
fmt_single = 0,
|
||||
fmt_double = 1,
|
||||
fmt_word = 4,
|
||||
fmt_long = 5,
|
||||
/* The following are well outside the normal acceptable format
|
||||
range, and are used in the register status vector. */
|
||||
fmt_unknown = 0x10000000,
|
||||
fmt_uninterpreted = 0x20000000,
|
||||
} FP_formats;
|
||||
|
||||
unsigned64 value_fpr PARAMS ((SIM_DESC sd, int fpr, FP_formats));
|
||||
#define ValueFPR(FPR,FMT) value_fpr (sd, (FPR), (FMT))
|
||||
|
||||
void store_fpr PARAMS ((SIM_DESC sd, int fpr, FP_formats fmt, unsigned64 value));
|
||||
#define StoreFPR(FPR,FMT,VALUE) store_fpr (sd, (FPR), (FMT), (VALUE))
|
||||
|
||||
int NaN PARAMS ((unsigned64 op, FP_formats fmt));
|
||||
int Infinity PARAMS ((unsigned64 op, FP_formats fmt));
|
||||
int Less PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
|
||||
int Equal PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
|
||||
unsigned64 AbsoluteValue PARAMS ((unsigned64 op, FP_formats fmt));
|
||||
unsigned64 Negate PARAMS ((unsigned64 op, FP_formats fmt));
|
||||
unsigned64 Add PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
|
||||
unsigned64 Sub PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
|
||||
unsigned64 Multiply PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
|
||||
unsigned64 Divide PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
|
||||
unsigned64 Recip PARAMS ((unsigned64 op, FP_formats fmt));
|
||||
unsigned64 SquareRoot PARAMS ((unsigned64 op, FP_formats fmt));
|
||||
unsigned64 convert PARAMS ((SIM_DESC sd, int rm, unsigned64 op, FP_formats from, FP_formats to));
|
||||
#define Convert(rm,op,from,to) convert(sd,rm,op,from,to)
|
||||
|
||||
|
||||
/* Co-processor accesses */
|
||||
|
||||
void cop_lw PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg, unsigned int memword));
|
||||
void cop_ld PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg, uword64 memword));
|
||||
unsigned int cop_sw PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg));
|
||||
uword64 cop_sd PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg));
|
||||
|
||||
#define COP_LW(coproc_num,coproc_reg,memword) cop_lw(sd,coproc_num,coproc_reg,memword)
|
||||
#define COP_LD(coproc_num,coproc_reg,memword) cop_ld(sd,coproc_num,coproc_reg,memword)
|
||||
#define COP_SW(coproc_num,coproc_reg) cop_sw(sd,coproc_num,coproc_reg)
|
||||
#define COP_SD(coproc_num,coproc_reg) cop_sd(sd,coproc_num,coproc_reg)
|
||||
|
||||
|
||||
|
||||
/* Memory accesses */
|
||||
|
||||
int address_translation PARAMS ((SIM_DESC sd, uword64 vAddr, int IorD, int LorS, uword64 *pAddr, int *CCA, int host, int raw));
|
||||
#define AddressTranslation(vAddr,IorD,LorS,pAddr,CCA,host,raw) \
|
||||
address_translation(sd, vAddr,IorD,LorS,pAddr,CCA,host,raw)
|
||||
|
||||
void load_memory PARAMS ((SIM_DESC sd, uword64* memvalp, uword64* memval1p, int CCA, int AccessLength, uword64 pAddr, uword64 vAddr, int IorD, int raw));
|
||||
#define LoadMemory(memvalp,memval1p,CCA,AccessLength,pAddr,vAddr,IorD,raw) \
|
||||
load_memory(sd,memvalp,memval1p,CCA,AccessLength,pAddr,vAddr,IorD,raw)
|
||||
|
||||
void store_memory PARAMS ((SIM_DESC sd, int CCA, int AccessLength, uword64 MemElem, uword64 MemElem1, uword64 pAddr, uword64 vAddr, int raw));
|
||||
#define StoreMemory(CCA,AccessLength,MemElem,MemElem1,pAddr,vAddr,raw) \
|
||||
store_memory(sd,CCA,AccessLength,MemElem,MemElem1,pAddr,vAddr,raw)
|
||||
|
||||
void cache_op PARAMS ((SIM_DESC sd, int op, uword64 pAddr, uword64 vAddr, unsigned int instruction));
|
||||
#define CacheOp(op,pAddr,vAddr,instruction) cache_op(sd,op,pAddr,vAddr,instruction)
|
||||
|
||||
#endif
|
||||
|
|
@ -1,108 +0,0 @@
|
|||
/*> support.h <*/
|
||||
/* Support for the MIPS architecture simulator.
|
||||
|
||||
This file is part of the MIPS sim
|
||||
|
||||
THIS SOFTWARE IS NOT COPYRIGHTED
|
||||
|
||||
Cygnus offers the following for use in the public domain. Cygnus
|
||||
makes no warranty with regard to the software or it's performance
|
||||
and the user accepts the software "AS IS" with all faults.
|
||||
|
||||
CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
|
||||
THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
|
||||
|
||||
$Revision$
|
||||
$Author$
|
||||
$Date$
|
||||
*/
|
||||
|
||||
#ifndef __support_h
|
||||
#define __support_h
|
||||
|
||||
/* For 64bit values either use the GCC "long long" feature, or have a
|
||||
structure made from two 32bit values. We can then have macros for
|
||||
accessing the LO and HI parts of the value. Also we can provide
|
||||
macros for the basic operations we want to perform on 64bit values
|
||||
(i.e. ADD64,SUB64,SHIFTLEFT64, etc.). This means we should be able
|
||||
to host the simulator on non-GCC compilers, and 32bit only
|
||||
architectures if desired. */
|
||||
|
||||
/* Control via a build boolean for the moment */
|
||||
#if defined(__GNUC__) || defined(_WIN32)
|
||||
|
||||
#ifdef _WIN32
|
||||
#define SIGTRAP 5
|
||||
#define SIGQUIT 3
|
||||
typedef signed __int64 word64;
|
||||
typedef unsigned __int64 uword64;
|
||||
#else
|
||||
typedef long long word64;
|
||||
typedef unsigned long long uword64;
|
||||
#endif
|
||||
|
||||
#define WORD64LO(t) (unsigned int)((t)&0xFFFFFFFF)
|
||||
#define WORD64HI(t) (unsigned int)(((uword64)(t))>>32)
|
||||
#define SET64LO(t) (((uword64)(t))&0xFFFFFFFF)
|
||||
#define SET64HI(t) (((uword64)(t))<<32)
|
||||
#define WORD64(h,l) ((word64)((SET64HI(h)|SET64LO(l))))
|
||||
#define UWORD64(h,l) (SET64HI(h)|SET64LO(l))
|
||||
|
||||
/* Sign-extend the given value (e) as a value (b) bits long. We cannot
|
||||
assume the HI32bits of the operand are zero, so we must perform a
|
||||
mask to ensure we can use the simple subtraction to sign-extend. */
|
||||
#define SIGNEXTEND(e,b) \
|
||||
(((e) & ((uword64) 1 << ((b) - 1))) \
|
||||
? (((e) & (((uword64) 1 << (b)) - 1)) - ((uword64)1 << (b))) \
|
||||
: ((e) & (((((uword64) 1 << ((b) - 1)) - 1) << 1) | 1)))
|
||||
|
||||
/* Check if a value will fit within a word (unsigned int): */
|
||||
#define NOTWORDVALUE(v) ((((((uword64)(v)>>32) == 0) && !((v) & ((unsigned)1 << 31))) || ((((uword64)(v)>>32) == 0xFFFFFFFF) && ((v) & ((unsigned)1 << 31)))) ? (1 == 0) : (1 == 1))
|
||||
|
||||
/* Check if a value will fit within a halfword: */
|
||||
#define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1))
|
||||
|
||||
/* The following should be executed once at the start of day in the
|
||||
main emulator control function. The simulator assumes char is
|
||||
8bits, and from this: */
|
||||
#define CHECKSIM() {\
|
||||
if (sizeof(int) != (4 * sizeof(char)))\
|
||||
SignalException(SimulatorFault,"sizeof(int) != 4");\
|
||||
if (sizeof(word64) != (8 * sizeof(char)))\
|
||||
SignalException(SimulatorFault,"sizeof(word64) != 8");\
|
||||
}
|
||||
|
||||
#else /* non-GCC build */
|
||||
|
||||
#error "non-GCC build to be completed" /* avoid using long long */
|
||||
|
||||
typedef struct uword64 {
|
||||
unsigned int lo;
|
||||
unsigned int hi;
|
||||
} uword64;
|
||||
|
||||
#define WORD64LO(t) (unsigned int)(t.lo)
|
||||
#define WORD64HI(t) (unsigned int)(t.hi)
|
||||
#define SET64LO(t) (..TODO..) /* need structure into which value will be placed */
|
||||
#define SET64HI(t) (..TODO..) /* need structure into which value will be placed */
|
||||
#define WORD64(h,l) (SET64HI(h)|SET64LO(l))
|
||||
|
||||
/* TODO: Update these to manipulate the split structure values */
|
||||
#define SIGNEXTEND(e,b) /* TODO */
|
||||
#define NOTWORDVALUE(v) /* TODO */
|
||||
#define NOTHALFWORDVALUE(v) /* TODO */
|
||||
|
||||
/* The following should be executed once at the start of day in the
|
||||
main emulator control function. The simulator assumes char is
|
||||
8bits, and from this: */
|
||||
#define CHECKSIM() {\
|
||||
if (sizeof(int) != (4 * sizeof(char)))\
|
||||
SignalException(SimulatorFault,"sizeof(int) != 4");\
|
||||
}
|
||||
|
||||
#endif /* non-GCC build */
|
||||
|
||||
#endif /* __support_h */
|
||||
|
||||
/*> EOF support.h <*/
|
||||
Loading…
Reference in New Issue