* ld-m68hc11/m68hc11.exp: Specific tests for 68HC11/68HC12.

* ld-m68hc11/adj-jump.d: New test for linker relaxation.
	* ld-m68hc11/adj-jump.s: Likewise.
	* ld-m68hc11/adj-brset.s: Likewise.
	* ld-m68hc11/adj-brset.d: Likewise.
	* ld-m68hc11/relax-direct.s: Likewise.
	* ld-m68hc11/relax-direct.d: Likewise.
	* ld-m68hc11/relax-group.s: Likewise.
	* ld-m68hc11/relax-group.d: Likewise.
	* ld-m68hc11/bug-1403.d: Likewise.
	* ld-m68hc11/bug-1403.s: Likewise.
This commit is contained in:
Stephane Carrez 2002-10-14 21:20:16 +00:00
parent eee771c194
commit 19dd1b4833
12 changed files with 665 additions and 0 deletions

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@ -1,3 +1,17 @@
2002-10-14 Stephane Carrez <stcarrez@nerim.fr>
* ld-m68hc11/m68hc11.exp: Specific tests for 68HC11/68HC12.
* ld-m68hc11/adj-jump.d: New test for linker relaxation.
* ld-m68hc11/adj-jump.s: Likewise.
* ld-m68hc11/adj-brset.s: Likewise.
* ld-m68hc11/adj-brset.d: Likewise.
* ld-m68hc11/relax-direct.s: Likewise.
* ld-m68hc11/relax-direct.d: Likewise.
* ld-m68hc11/relax-group.s: Likewise.
* ld-m68hc11/relax-group.d: Likewise.
* ld-m68hc11/bug-1403.d: Likewise.
* ld-m68hc11/bug-1403.s: Likewise.
2002-10-14 Stephen Clarke <stephen.clarke@superh.com>
* ld-sh/ld-r-1.d: Disable for sh64*-*-linux*.
* ld-sh/sh64/sh64.exp: Likewise.

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#source: adj-brset.s
#as: -m68hc11
#ld: --relax
#objdump: -d --prefix-addresses -r
#target: m6811-*-* m6812-*-*
.*: +file format elf32\-m68hc11
Disassembly of section .text:
0+8000 <_start> brclr 140,x \#\$c8 0+804a <L8>
0+8004 <L1> addd \*0+4 <_toto>
0+8006 <L1\+0x2> brclr 20,x \#\$03 0+8004 <L1>
0+800a <L1\+0x6> brclr 90,x \#\$63 0+801a <L3>
0+800e <L2> addd \*0+4 <_toto>
0+8010 <L2\+0x2> brclr 19,y \#\$04 0+800e <L2>
0+8015 <L2\+0x7> brclr 91,y \#\$62 0+8024 <L4>
0+801a <L3> addd \*0+4 <_toto>
0+801c <L3\+0x2> brset 18,x \#\$05 0+801a <L3>
0+8020 <L3\+0x6> brset 92,x \#\$61 0+8030 <L5>
0+8024 <L4> addd \*0+4 <_toto>
0+8026 <L4\+0x2> brset 17,y \#\$06 0+8024 <L4>
0+802b <L4\+0x7> brset 93,y \#\$60 0+8030 <L5>
0+8030 <L5> addd \*0+4 <_toto>
0+8032 <L5\+0x2> brset \*0+32 <_table> \#\$07 0+8030 <L5>
0+8036 <L5\+0x6> brset \*0+3c <_table\+0xa> \#\$5f 0+8044 <L7>
0+803a <L6> addd \*0+4 <_toto>
0+803c <L6\+0x2> brclr \*0+33 <_table\+0x1> \#\$08 0+803a <L6>
0+8040 <L6\+0x6> brset \*0+3d <_table\+0xb> \#\$5e 0+804a <L8>
0+8044 <L7> addd \*0+4 <_toto>
0+8046 <L7\+0x2> brclr \*0+33 <_table\+0x1> \#\$08 0+803a <L6>
0+804a <L8> brclr 140,x \#\$c8 0+8000 <_start>
0+804e <L8\+0x4> rts

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;;; Test 68HC11 linker relaxation and fixup of brclr/brset branches
;;;
.sect .text
.globl _start
_start:
start:
brclr 140,x#200,L8 ; Branch adjustment covers the whole test
;;; The 'addd' is relaxed and we win 1 byte. The next brclr/brset
;;; branch must be fixed and reduced by 1. We check for different
;;; addressing modes because the instruction has different opcode and
;;; different lengths.
L1:
addd _toto
brclr 20,x,#3,L1
brclr 90,x,#99,L3 ; Likewise with forward branch
L2:
addd _toto
brclr 19,y,#4,L2
brclr 91,y,#98,L4
L3:
addd _toto
brset 18,x,#5,L3
brset 92,x,#97,L5
L4:
addd _toto
brset 17,y,#6,L4
brset 93,y,#96,L5
L5:
addd _toto
brset *_table,#7,L5
brset *_table+10,#95,L7
L6:
addd _toto
brclr *_table+1,#8,L6
brset *_table+11,#94,L8
L7:
addd _toto
brclr *_table+1,#8,L6
L8:
brclr 140,x#200,_start ; Branch adjustment covers the whole test
rts
.sect .page0
_bar:
.long 0
_toto:
.long 0
.skip 32
stack:
.skip 10
_table:

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#source: adj-jump.s
#as: -m68hc11
#ld: --relax
#objdump: -d --prefix-addresses -r
#target: m6811-*-* m6812-*-*
.*: +file format elf32\-m68hc11
Disassembly of section .text:
0+8000 <_start> bra 0+8074 <L3>
...
0+8016 <_start\+0x16> bra 0+8074 <L3>
0+8018 <L1> addd 0,x
0+801a <L1\+0x2> bne 0+8018 <L1>
0+801c <L1\+0x4> addd \*0+4 <_toto>
0+801e <L1\+0x6> beq 0+8018 <L1>
0+8020 <L1\+0x8> addd \*0+5 <_toto\+0x1>
0+8022 <L1\+0xa> bne 0+8018 <L1>
0+8024 <L1\+0xc> bgt 0+8018 <L1>
0+8026 <L1\+0xe> bge 0+8018 <L1>
0+8028 <L1\+0x10> beq 0+8018 <L1>
0+802a <L1\+0x12> ble 0+8018 <L1>
0+802c <L1\+0x14> blt 0+8018 <L1>
0+802e <L1\+0x16> bhi 0+8018 <L1>
0+8030 <L1\+0x18> bcc 0+8018 <L1>
0+8032 <L1\+0x1a> beq 0+8018 <L1>
0+8034 <L1\+0x1c> bls 0+8018 <L1>
0+8036 <L1\+0x1e> bcs 0+8018 <L1>
0+8038 <L1\+0x20> bcs 0+8018 <L1>
0+803a <L1\+0x22> bmi 0+8018 <L1>
0+803c <L1\+0x24> bvs 0+8018 <L1>
0+803e <L1\+0x26> bcc 0+8018 <L1>
0+8040 <L1\+0x28> bpl 0+8018 <L1>
0+8042 <L1\+0x2a> bvc 0+8018 <L1>
0+8044 <L1\+0x2c> bne 0+8018 <L1>
0+8046 <L1\+0x2e> brn 0+8018 <L1>
0+8048 <L1\+0x30> bra 0+8018 <L1>
0+804a <L1\+0x32> addd \*0+4 <_toto>
0+804c <L1\+0x34> addd \*0+4 <_toto>
0+804e <L1\+0x36> addd \*0+4 <_toto>
0+8050 <L1\+0x38> addd \*0+4 <_toto>
0+8052 <L1\+0x3a> addd \*0+4 <_toto>
0+8054 <L1\+0x3c> addd \*0+4 <_toto>
0+8056 <L1\+0x3e> addd \*0+4 <_toto>
0+8058 <L1\+0x40> addd \*0+4 <_toto>
0+805a <L1\+0x42> addd \*0+4 <_toto>
0+805c <L1\+0x44> addd \*0+4 <_toto>
0+805e <L1\+0x46> addd \*0+4 <_toto>
0+8060 <L1\+0x48> addd \*0+4 <_toto>
0+8062 <L1\+0x4a> addd \*0+4 <_toto>
0+8064 <L1\+0x4c> addd \*0+4 <_toto>
0+8066 <L1\+0x4e> addd \*0+4 <_toto>
0+8068 <L2> bra 0+8000 <_start>
0+806a <L2\+0x2> bne 0+8068 <L2>
0+806c <L2\+0x4> beq 0+8074 <L3>
0+806e <L2\+0x6> addd \*0+4 <_toto>
0+8070 <L2\+0x8> beq 0+8074 <L3>
0+8072 <L2\+0xa> addd \*0+4 <_toto>
0+8074 <L3> addd \*0+4 <_toto>
0+8076 <L3\+0x2> rts

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;;; Test 68HC11 linker relaxation and fixup of bcc/bra branches
;;;
.sect .text
.globl _start
_start:
;; Next 'bra' is assembled as a 'jmp'. It is relaxed to 'bra L3'
;; during a second pass of relax.
bra L3
.skip 20
;; Next 'jmp' must be relaxed to a 'bra' during the first pass.
;; The branch offset must then be adjusted by consecutive relax.
jmp L3
L1:
addd 0,x
bne L1 ; Branch not adjusted
addd _toto
beq L1 ; Backward branch, adjust -1
addd _toto+1
jbne L1 ; Backward branch, adjust -2
bgt L1 ; All possible backward branchs, adjust -2
bge L1
beq L1
ble L1
blt L1
bhi L1
bhs L1
beq L1
bls L1
blo L1
bcs L1
bmi L1
bvs L1
bcc L1
bpl L1
bvc L1
bne L1
brn L1
bra L1
;; Relax several insn to reduce block by 15
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
addd _toto
L2:
jmp _start ; -> relax to bra _start
bne L2 ; Backward branch, adjust -1
beq L3 ; Forward branch, adjust -2
addd _toto
beq L3 ; Forward branch, adjust -1
addd _toto
L3:
addd _toto
rts
.sect .page0
_bar:
.long 0
_toto:
.long 0
.skip 32
stack:
.skip 10
_table:

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#source: bug-1403.s
#as: -m68hc11
#ld: --relax
#objdump: -d --prefix-addresses -r
#target: m6811-*-* m6812-*-*
.*: +file format elf32-m68hc11
Disassembly of section .text:
0+8000 <_start> bset \*0+ <__bss_size> \#\$04
0+8003 <L1> bra 0+8005 <toto>
0+8005 <toto> rts

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;;; Bug #1403: Branch adjustment to another section not correct when doing linker relaxation
;;; http://savannah.gnu.org/bugs/?func=detailbug&bug_id=1403&group_id=2424
;;;
.sect .text
.globl _start
_start:
.relax L1
ldx #table
bset 0,x #4
L1:
bra toto ; bra is assembled as a jmp and relaxed
.sect .page0
.globl table
table: .long 0
.sect .text.toto
.globl toto
toto:
rts

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# Expect script for run_dump_test based ld-m68hc11 tests.
# Copyright 2002 Free Software Foundation, Inc.
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
#
# Adapted from ld-sh/rd-sh.exp
# Test 68HC11 relaxing. This tests the assembler as well as the linker.
if { ![istarget m6811-*-*] && ![istarget m6812-*-*] } {
return
}
set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
foreach shtest $rd_test_list {
# We need to strip the ".d", but can leave the dirname.
verbose [file rootname $shtest]
run_dump_test [file rootname $shtest]
}

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#source: relax-direct.s
#as: -m68hc11
#ld: --relax
#objdump: -d --prefix-addresses -r
#target: m6811-*-* m6812-*-*
.*: +file format elf32-m68hc11
Disassembly of section .text:
0+8000 <_start> lds \*0+28 <stack>
0+8002 <_start\+0x2> ldd \*0+ <__bss_size>
0+8004 <_start\+0x4> beq 0+800f <F1>
0+8006 <_start\+0x6> bne 0+800b <_start\+0xb>
0+8008 <_start\+0x8> jmp 0+8138 <F2>
0+800b <_start\+0xb> std \*0+ <__bss_size>
0+800d <_start\+0xd> jsr \*0+ <__bss_size>
0+800f <F1> addd \*0+4 <_toto>
0+8011 <F1\+0x2> bne 0+8000 <_start>
0+8013 <F1\+0x4> addd \*0+cc <_table\+0x9a>
0+8015 <F1\+0x6> addd 0+114 <_stack_top\+0x1a>
0+8018 <F1\+0x9> adca \*0+34 <_table\+0x2>
0+801a <F1\+0xb> adcb \*0+35 <_table\+0x3>
0+801c <F1\+0xd> adda \*0+36 <_table\+0x4>
0+801e <F1\+0xf> addb \*0+37 <_table\+0x5>
0+8020 <F1\+0x11> addd \*0+38 <_table\+0x6>
0+8022 <F1\+0x13> anda \*0+39 <_table\+0x7>
0+8024 <F1\+0x15> andb \*0+3a <_table\+0x8>
0+8026 <F1\+0x17> cmpa \*0+3b <_table\+0x9>
0+8028 <F1\+0x19> cmpb \*0+3c <_table\+0xa>
0+802a <F1\+0x1b> cpd \*0+3d <_table\+0xb>
0+802d <F1\+0x1e> cpx \*0+3e <_table\+0xc>
0+802f <F1\+0x20> cpy \*0+3f <_table\+0xd>
0+8032 <F1\+0x23> eora \*0+40 <_table\+0xe>
0+8034 <F1\+0x25> eorb \*0+41 <_table\+0xf>
0+8036 <F1\+0x27> jsr \*0+42 <_table\+0x10>
0+8038 <F1\+0x29> ldaa \*0+43 <_table\+0x11>
0+803a <F1\+0x2b> ldab \*0+44 <_table\+0x12>
0+803c <F1\+0x2d> ldd \*0+45 <_table\+0x13>
0+803e <F1\+0x2f> lds \*0+46 <_table\+0x14>
0+8040 <F1\+0x31> ldx \*0+47 <_table\+0x15>
0+8042 <F1\+0x33> ldy \*0+48 <_table\+0x16>
0+8045 <F1\+0x36> oraa \*0+49 <_table\+0x17>
0+8047 <F1\+0x38> orab \*0+4a <_table\+0x18>
0+8049 <F1\+0x3a> sbcb \*0+4b <_table\+0x19>
0+804b <F1\+0x3c> sbca \*0+4c <_table\+0x1a>
0+804d <F1\+0x3e> staa \*0+4d <_table\+0x1b>
0+804f <F1\+0x40> stab \*0+4e <_table\+0x1c>
0+8051 <F1\+0x42> std \*0+4f <_table\+0x1d>
0+8053 <F1\+0x44> sts \*0+50 <_table\+0x1e>
0+8055 <F1\+0x46> stx \*0+51 <_table\+0x1f>
0+8057 <F1\+0x48> sty \*0+52 <_table\+0x20>
0+805a <F1\+0x4b> suba \*0+53 <_table\+0x21>
0+805c <F1\+0x4d> subb \*0+54 <_table\+0x22>
0+805e <F1\+0x4f> subd \*0+55 <_table\+0x23>
0+8060 <F1\+0x51> bne 0+8000 <_start>
0+8062 <F1\+0x53> bra 0+800f <F1>
0+8064 <F1\+0x55> rts
0+8065 <no_relax> addd 0+136 <_stack_top\+0x3c>
0+8068 <no_relax\+0x3> std 0+122 <_stack_top\+0x28>
0+806b <no_relax\+0x6> tst 0+5 <_toto\+0x1>
0+806e <no_relax\+0x9> bne 0+8065 <no_relax>
...
0+8138 <F2> jmp 0+8000 <_start>

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;;; Test 68HC11 linker relaxation from extended addressing to direct
;;; addressing modes
;;;
.sect .text
.globl _start
_start:
start:
lds stack
ldd _bar
beq F1
beq F2
std _bar
jsr _bar
F1:
addd _toto
bne start
;; All the following instructions will be relaxed and win 1 byte
;; for each.
addd _toto+200
addd stack+256-20
adca _table+2
adcb _table+3
adda _table+4
addb _table+5
addd _table+6
anda _table+7
andb _table+8
cmpa _table+9
cmpb _table+10
cpd _table+11
cpx _table+12
cpy _table+13
eora _table+14
eorb _table+15
jsr _table+16
ldaa _table+17
ldab _table+18
ldd _table+19
lds _table+20
ldx _table+21
ldy _table+22
oraa _table+23
orab _table+24
sbcb _table+25
sbca _table+26
staa _table+27
stab _table+28
std _table+29
sts _table+30
stx _table+31
sty _table+32
suba _table+33
subb _table+34
subd _table+35
;; 'bne' is assembled as far branch and must relax to
;; a relative 8-bit branch.
bne _start
;; Likewise for next branch
bra F1
rts
;;; The following instructions will not be relaxed
no_relax:
addd _stack_top+60
std _stack_top+40
;; 'tst' does not support direct addressing mode.
tst _toto+1
bne no_relax
.skip 200
F2:
bra _start
.sect .page0
_bar:
.long 0
_toto:
.long 0
.skip 32
stack:
.skip 10
_table:
.skip 200
_stack_top:

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#source: relax-group.s
#as: -m68hc11
#ld: --relax
#objdump: -d --prefix-addresses -r
#target: m6811-*-* m6812-*-*
.*: +file format elf32-m68hc11
Disassembly of section .text:
0+8000 <_start> bset \*0+ <__bss_size> #\$04
0+8003 <L1x> bset \*0+ <__bss_size> #\$04
0+8006 <L1y> bset \*0+3 <__bss_size\+0x3> #\$04
0+8009 <L1y\+0x3> bset \*0+4 <table4> #\$08
0+800c <L2x> bset \*0+3 <__bss_size\+0x3> #\$04
0+800f <L2x\+0x3> bset \*0+4 <table4> #\$08
0+8012 <L2y> bset \*0+6 <table4\+0x2> #\$04
0+8015 <L2y\+0x3> bset \*0+7 <table4\+0x3> #\$08
0+8018 <L2y\+0x6> bset \*0+8 <table8> #\$0c
0+801b <L2y\+0x9> bset \*0+9 <table8\+0x1> #\$0c
0+801e <L2y\+0xc> bset \*0+a <table8\+0x2> #\$0c
0+8021 <L2y\+0xf> bset \*0+b <table8\+0x3> #\$0c
0+8024 <L3x> bset \*0+6 <table4\+0x2> #\$04
0+8027 <L3x\+0x3> bset \*0+7 <table4\+0x3> #\$08
0+802a <L3x\+0x6> bset \*0+8 <table8> #\$0c
0+802d <L3x\+0x9> bset \*0+9 <table8\+0x1> #\$0c
0+8030 <L3x\+0xc> bset \*0+a <table8\+0x2> #\$0c
0+8033 <L3x\+0xf> bset \*0+b <table8\+0x3> #\$0c
0+8036 <L3y> bra 0+8000 <_start>
0+8038 <L3y\+0x2> ldx #0+fe <end_table\+0xe8>
0+803b <L3y\+0x5> bset \*0+fe <end_table\+0xe8> #\$04
0+803e <L3y\+0x8> bset \*0+ff <end_table\+0xe9> #\$08
0+8041 <L3y\+0xb> bset 2,x #\$0c
0+8044 <L3y\+0xe> bset 3,x #\$0c
0+8047 <L3y\+0x11> bset 4,x #\$0c
0+804a <L3y\+0x14> bset 5,x #\$0c
0+804d <L4x> ldy #0+fe <end_table\+0xe8>
0+8051 <L4x\+0x4> bset \*0+fe <end_table\+0xe8> #\$04
0+8054 <L4x\+0x7> bset \*0+ff <end_table\+0xe9> #\$08
0+8057 <L4x\+0xa> bset 2,y #\$0c
0+805b <L4x\+0xe> bset 3,y #\$0c
0+805f <L4x\+0x12> bset 4,y #\$0c
0+8063 <L4x\+0x16> bset 5,y #\$0c
0+8067 <L4y> bclr \*0+a <table8\+0x2> #\$04
0+806a <L4y\+0x3> bclr \*0+b <table8\+0x3> #\$08
0+806d <L5x> bclr \*0+1a <end_table\+0x4> #\$04
0+8070 <L5x\+0x3> bclr \*0+1b <end_table\+0x5> #\$08
0+8073 <L5y> brset \*0+8 <table8> #\$04 0+8073 <L5y>
0+8077 <L6x> brset \*0+8 <table8> #\$04 0+8077 <L6x>
0+807b <L7x> brset \*0+8 <table8> #\$04 0+8094 <brend>
0+807f <L8x> brset \*0+8 <table8> #\$04 0+8094 <brend>
0+8083 <L8y> brclr \*0+8 <table8> #\$04 0+8083 <L8y>
0+8087 <L9x> brclr \*0+8 <table8> #\$04 0+8087 <L9x>
0+808b <L9y> brclr \*0+8 <table8> #\$04 0+8094 <brend>
0+808f <L10x> brclr \*0+8 <table8> #\$04 0+8094 <brend>
0+8093 <L10y> nop
0+8094 <brend> bset 0,x #\$04
0+8097 <w2> ldx #0+ <__bss_size>
0+809a <w3> ldy #0+8 <table8>
0+809e <w4> rts
0+809f <w5> ldx #0+ <__bss_size>
0+80a2 <w5\+0x3> bset 0,x #\$05
0+80a5 <w5\+0x6> jmp 0+8000 <_start>
0+80a8 <w5\+0x9> rts

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;;; Test 68HC11 linker relaxation (group relax)
;;;
.sect .text
.globl _start
_start:
;;;
;;; The following group of instructions are adjusted.
;;;
.relax L1x
ldx #table
bset 0,x #4
L1x:
.relax L1y
ldy #table
bset 0,y #4
L1y:
.relax L2x
ldx #table+3
bset 0,x #4
bset 1,x #8
L2x:
.relax L2y
ldy #table+3
bset 0,y #4
bset 1,y #8
L2y:
.relax L3x
ldx #table+6
bset 0,x #4
bset 1,x #8
bset 2,x #12
bset 3,x #12
bset 4,x #12
bset 5,x #12
L3x:
.relax L3y
ldy #table+6
bset 0,y #4
bset 1,y #8
bset 2,y #12
bset 3,y #12
bset 4,y #12
bset 5,y #12
L3y:
;; Next branch is always relative. It must be adjusted while
;; above instructions are relaxed.
bra _start
;;;
;;; This group has the first two bset insn relaxable while the
;;; others are not. The ldx/ldy must not be removed.
;;;
.relax L4x
ldx #table+0xfe
bset 0,x #4
bset 1,x #8
bset 2,x #12
bset 3,x #12
bset 4,x #12
bset 5,x #12
L4x:
.relax L4y
ldy #table+0xfe
bset 0,y #4
bset 1,y #8
bset 2,y #12
bset 3,y #12
bset 4,y #12
bset 5,y #12
L4y:
;;;
;;; Relax group for bclr
;;;
.relax L5x
ldx #table+10
bclr 0,x #4
bclr 1,x #8
L5x:
.relax L5y
ldy #table+16
bclr 10,y #4
bclr 11,y #8
L5y:
;;;
;;; Relax group for brset (with backward branch)
;;;
.relax L6x
ldx #table+8
brset 0,x #4 L5y
L6x:
.relax L7x
ldy #table+8
brset 0,y #4 L6x
L7x:
;;;
;;; Relax group for brset (with forward branch)
;;;
.relax L8x
ldx #table+8
brset 0,x #4 brend
L8x:
.relax L8y
ldy #table+8
brset 0,y #4 brend
L8y:
;;;
;;; Relax group for brclr (with backward branch)
;;;
.relax L9x
ldx #table+8
brclr 0,x #4 L8y
L9x:
.relax L9y
ldy #table+8
brclr 0,y #4 L9x
L9y:
;;;
;;; Relax group for brclr (with forward branch)
;;;
.relax L10x
ldx #table+8
brclr 0,x #4 brend
L10x:
.relax L10y
ldy #table+8
brclr 0,y #4 brend
L10y:
nop
brend:
;;;
;;; The following are wrong use of .relax groups.
;;;
.relax w1
w1:
.relax w2
bset 0,x #4
w2:
.relax w3
ldx #table
w3:
.relax w4
ldy #table+8
w4:
.relax w5
rts
w5:
;;;
;;; Next insn is not in a .relax group
ldx #table
bset 0,x #5
bra _start
rts
.sect .page0
.globl table
table: .long 0
table4: .long 0
table8: .long 0
.skip 10
end_table:
.long 0