S/390: idte/ipte fixes

Later CPU generations added optional operands to the ipte/idte
instructions.  I've added these with:
https://sourceware.org/ml/binutils/2017-05/msg00316.html ... but
supported the optional operands only with the specific hardware
levels.  However, it is more useful to have the optional operands
already in the first versions.  Of course they need to be zero there.

Regression-tested with on s390 and s390x.  Committed to mainline.

Bye,

-Andreas-

opcodes/ChangeLog:

2017-06-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-opc.txt: Support the optional parameters with the first
	versions of ipte/idte.

gas/ChangeLog:

2017-06-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* testsuite/gas/s390/esa-g5.d: Add ipte tests.
	* testsuite/gas/s390/esa-g5.s: Likewise.
	* testsuite/gas/s390/zarch-z196.d: Remove ipte tests.
	* testsuite/gas/s390/zarch-z196.s: Likewise.
	* testsuite/gas/s390/zarch-z990.d: Add idte tests.
	* testsuite/gas/s390/zarch-z990.s: Likewise.
	* testsuite/gas/s390/zarch-zEC12.d: Remove ipte/idte tests.
	* testsuite/gas/s390/zarch-zEC12.s: Likewise.
This commit is contained in:
Andreas Krebbel 2017-06-01 13:46:15 +02:00
parent 580dfe9d4c
commit 19fb31c006
9 changed files with 19 additions and 32 deletions

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@ -481,4 +481,6 @@ Disassembly of section .text:
.*: 17 69 [ ]*xr %r6,%r9
.*: b2 76 00 00 [ ]*xsch
.*: f8 58 5f ff af ff [ ]*zap 4095\(6,%r5\),4095\(9,%r10\)
.*: b2 21 b0 69 [ ]*ipte %r6,%r9,%r11
.*: b2 21 bd 69 [ ]*ipte %r6,%r9,%r11,13
.*: 07 07 [ ]*nopr %r7

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@ -475,3 +475,5 @@ foo:
xr %r6,%r9
xsch
zap 4095(6,%r5),4095(9,%r10)
ipte %r6,%r9,%r11
ipte %r6,%r9,%r11,13

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@ -259,6 +259,4 @@ Disassembly of section .text:
.*: b9 2c 00 00 [ ]*pcc
.*: b9 2d 60 59 [ ]*kmctr %r5,%r6,%r9
.*: b9 28 00 00 [ ]*pckmo
.*: b2 21 00 69 [ ]*ipte %r6,%r9
.*: b2 21 b0 69 [ ]*ipte %r6,%r9,%r11
.*: 07 07 [ ]*nopr %r7

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@ -261,5 +261,3 @@ foo:
pcc
kmctr %r5,%r6,%r9
pckmo
ipte %r6,%r9
ipte %r6,%r9,%r11

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@ -44,7 +44,8 @@ Disassembly of section .text:
.*: eb 6f 50 00 80 80 [ ]*icmh %r6,15,-524288\(%r5\)
.*: eb 6f 50 00 80 81 [ ]*icmy %r6,15,-524288\(%r5\)
.*: e3 65 a0 00 80 73 [ ]*icy %r6,-524288\(%r5,%r10\)
.*: b9 8e 50 69 [ ]*idte %r6,%r5,%r9
.*: b9 8e 90 6b [ ]*idte %r6,%r9,%r11
.*: b9 8e 9d 6b [ ]*idte %r6,%r9,%r11,13
.*: eb 69 50 00 80 9a [ ]*lamy %a6,%a9,-524288\(%r5\)
.*: e3 65 a0 00 80 71 [ ]*lay %r6,-524288\(%r5,%r10\)
.*: e3 65 a0 00 80 76 [ ]*lb %r6,-524288\(%r5,%r10\)

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@ -38,7 +38,8 @@ foo:
icmh %r6,15,-524288(%r5)
icmy %r6,15,-524288(%r5)
icy %r6,-524288(%r5,%r10)
idte %r6,%r5,%r9
idte %r6,%r9,%r11
idte %r6,%r9,%r11,13
lamy %a6,%a9,-524288(%r5)
lay %r6,-524288(%r5,%r10)
lb %r6,-524288(%r5,%r10)

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@ -54,21 +54,16 @@ Disassembly of section .text:
.*: b2 e8 c0 56 [ ]*ppa %r5,%r6,12
.*: b9 8f 60 59 [ ]*crdte %r5,%r6,%r9
.*: b9 8f 61 59 [ ]*crdte %r5,%r6,%r9,1
.*: b9 8e 90 6b [ ]*idte %r6,%r9,%r11
.*: b9 8e 9d 6b [ ]*idte %r6,%r9,%r11,13
.*: b2 21 00 69 [ ]*ipte %r6,%r9
.*: b2 21 b0 69 [ ]*ipte %r6,%r9,%r11
.*: b2 21 bd 69 [ ]*ipte %r6,%r9,%r11,13
.*: c5 a0 0c 00 00 0c [ ]*bprp 10,13e <bar>,13e <bar>
.*: c5 a0 00 00 00 00 [ ]*bprp 10,12c <foo\+0x12c>,12c <foo\+0x12c>
[ ]*12d: R_390_PLT12DBL bar\+0x1
[ ]*12f: R_390_PLT24DBL bar\+0x3
.*: c7 a0 00 00 00 00 [ ]*bpp 10,132 <foo\+0x132>,0
[ ]*136: R_390_PLT16DBL bar\+0x4
.*: c7 a0 00 00 00 00 [ ]*bpp 10,138 <foo\+0x138>,0
[ ]*13c: R_390_PC16DBL baz\+0x4
.*: c5 a0 0c 00 00 0c [ ]*bprp 10,12a <bar>,12a <bar>
.*: c5 a0 00 00 00 00 [ ]*bprp 10,118 <foo\+0x118>,118 <foo\+0x118>
[ ]*119: R_390_PLT12DBL bar\+0x1
[ ]*11b: R_390_PLT24DBL bar\+0x3
.*: c7 a0 00 00 00 00 [ ]*bpp 10,11e <foo\+0x11e>,0
[ ]*122: R_390_PLT16DBL bar\+0x4
.*: c7 a0 00 00 00 00 [ ]*bpp 10,124 <foo\+0x124>,0
[ ]*128: R_390_PC16DBL baz\+0x4
000000000000013e <bar>:
000000000000012a <bar>:
.*: 07 07 [ ]*nopr %r7

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@ -53,13 +53,6 @@ foo:
crdte %r5,%r6,%r9
crdte %r5,%r6,%r9,1
idte %r6,%r9,%r11
idte %r6,%r9,%r11,13
ipte %r6,%r9
ipte %r6,%r9,%r11
ipte %r6,%r9,%r11,13
bprp 10,bar,bar
bprp 10,bar@PLT,bar@PLT

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@ -79,7 +79,7 @@ b224 iac RRE_R0 "insert address space control" g5 esa,zarch
bf icm RS_RURD "insert characters under mask" g5 esa,zarch
b20b ipk S_00 "insert PSW key" g5 esa,zarch
b222 ipm RRE_R0 "insert program mask" g5 esa,zarch
b221 ipte RRE_RR "invalidate page table entry" g5 esa,zarch
b221 ipte RRF_RURR "invalidate page table entry" g5 esa,zarch optparm2
b229 iske RRE_RR "insert storage key extended" g5 esa,zarch
b223 ivsk RRE_RR "insert virtual storage key" g5 esa,zarch
58 l RX_RRRD "load" g5 esa,zarch
@ -700,7 +700,7 @@ eb000000008f clclu RSY_RRRD "compare logical long unicode with long offset" z990
eb0000000096 lmh RSY_RRRD "load multiple high" z990 zarch
# new z990 instructions
b98a cspg RRE_RR "compare and swap and purge" z990 zarch
b98e idte RRF_R0RR "invalidate dat table entry" z990 zarch
b98e idte RRF_RURR2 "invalidate dat table entry" z990 zarch optparm
b33e madr RRF_F0FF "multiply and add long hfp" z990 esa,zarch
ed000000003e mad RXF_FRRDF "multiply and add long hfp" z990 esa,zarch
b32e maer RRF_F0FF "multiply and add short hfp" z990 esa,zarch
@ -1116,7 +1116,6 @@ b92b kmo RRE_RR "cipher message with OFB" z196 zarch
b92c pcc RRE_00 "perform cryptographic computation" z196 zarch
b92d kmctr RRF_R0RR "cipher message with counter" z196 zarch
b928 pckmo RRE_00 "perform cryptographic key management operation" z196 zarch
b221 ipte RRF_R0RR2 "invalidate page table entry" z196 zarch optparm
# The new instructions of the IBM zEnterprise EC12
b2ec etnd RRE_R0 "extract transaction nesting depth" zEC12 zarch htm
@ -1144,8 +1143,6 @@ ed00000000aa cdzt RSL_LRDFU "convert from zoned long" zEC12 zarch
ed00000000ab cxzt RSL_LRDFEU "convert from zoned extended" zEC12 zarch
ed00000000a8 czdt RSL_LRDFU "convert to zoned long" zEC12 zarch
ed00000000a9 czxt RSL_LRDFEU "convert to zoned extended" zEC12 zarch
b98e idte RRF_RURR2 "invalidate dat table entry" zEC12 zarch optparm
b221 ipte RRF_RURR "invalidate page table entry" zEC12 zarch optparm2
# The new instructions of IBM z13