gas/
* config/tc-mips.c (mips_arg_info): Remove soft_match. (match_out_of_range, match_not_constant): New functions. (match_const_int): Remove fallback parameter and check for soft_match. Use match_not_constant. (match_mapped_int_operand, match_addiusp_operand) (match_perf_reg_operand, match_save_restore_list_operand) (match_mdmx_imm_reg_operand): Update accordingly. Use match_out_of_range and set_insn_error* instead of as_bad. (match_int_operand): Likewise. Use match_not_constant in the !allows_nonconst case. (match_float_constant): Report invalid float constants. (match_insn, match_mips16_insn): Remove soft_match code. Rely on match_float_constant to check for invalid constants. Fail the match if match_const_int or match_float_constant return false. (mips_ip): Update accordingly. (mips16_ip): Likewise. Undo null termination of instruction name once lookup is complete. gas/testsuite/ * gas/mips/ext-ill.l, gas/mips/lui-1.l, gas/mips/mips16e-64.l, gas/mips/mips32r2-ill-fp64.l, gas/mips/mips32r2-ill-nofp.l, gas/mips/mips32r2-ill.l, gas/mips/mips64r2-ill.l, gas/mips/octeon-ill.l, gas/mips/r5900-error-vu0.l, gas/mips/vr5400-ill.l: Adjust expected errors. * gas/mips/micromips-size-0.l, gas/mips/micromips-size-0.s: Likewise. Add new tests. * gas/mips/mips16e-save-err.s, gas/mips/mips16e-save-err.l: New test. * gas/mips/mips.exp: Run it.
This commit is contained in:
Richard Sandiford
parent
e3de51ce11
commit
1a00e61226
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@ -1,3 +1,23 @@
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2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (mips_arg_info): Remove soft_match.
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(match_out_of_range, match_not_constant): New functions.
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(match_const_int): Remove fallback parameter and check for soft_match.
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Use match_not_constant.
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(match_mapped_int_operand, match_addiusp_operand)
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(match_perf_reg_operand, match_save_restore_list_operand)
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(match_mdmx_imm_reg_operand): Update accordingly. Use
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match_out_of_range and set_insn_error* instead of as_bad.
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(match_int_operand): Likewise. Use match_not_constant in the
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!allows_nonconst case.
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(match_float_constant): Report invalid float constants.
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(match_insn, match_mips16_insn): Remove soft_match code. Rely on
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match_float_constant to check for invalid constants. Fail the
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match if match_const_int or match_float_constant return false.
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(mips_ip): Update accordingly.
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(mips16_ip): Likewise. Undo null termination of instruction name
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once lookup is complete.
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2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (mips_insn_error_format): New enum.
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@ -4271,13 +4271,6 @@ struct mips_arg_info
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where it gives the lsb position. */
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unsigned int last_op_int;
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/* If true, match routines should silently reject invalid arguments.
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If false, match routines can accept invalid arguments as long as
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they report an appropriate error. They still have the option of
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silently rejecting arguments, in which case a generic "Invalid operands"
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style of error will be used instead. */
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bfd_boolean soft_match;
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/* If true, the OP_INT match routine should treat plain symbolic operands
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as if a relocation operator like %lo(...) had been used. This is only
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ever true if the operand can be relocated. */
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@ -4291,6 +4284,23 @@ struct mips_arg_info
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bfd_boolean seen_at;
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};
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/* Record that the argument is out of range. */
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static void
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match_out_of_range (struct mips_arg_info *arg)
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{
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set_insn_error_i (arg->argnum, _("operand %d out of range"), arg->argnum);
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}
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/* Record that the argument isn't constant but needs to be. */
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static void
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match_not_constant (struct mips_arg_info *arg)
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{
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set_insn_error_i (arg->argnum, _("operand %d must be constant"),
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arg->argnum);
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}
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/* Try to match an OT_CHAR token for character CH. Consume the token
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and return true on success, otherwise return false. */
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@ -4354,7 +4364,7 @@ match_expression (struct mips_arg_info *arg, expressionS *value,
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error. */
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static bfd_boolean
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match_const_int (struct mips_arg_info *arg, offsetT *value, offsetT fallback)
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match_const_int (struct mips_arg_info *arg, offsetT *value)
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{
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expressionS ex;
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bfd_reloc_code_real_type r[3];
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@ -4366,11 +4376,8 @@ match_const_int (struct mips_arg_info *arg, offsetT *value, offsetT fallback)
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*value = ex.X_add_number;
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else
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{
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if (arg->soft_match)
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return FALSE;
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as_bad (_("Operand %d of `%s' must be constant"),
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arg->argnum, arg->insn->insn_mo->name);
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*value = fallback;
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match_not_constant (arg);
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return FALSE;
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}
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return TRUE;
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}
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@ -4546,7 +4553,6 @@ match_int_operand (struct mips_arg_info *arg,
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unsigned int uval;
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int min_val, max_val, factor;
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offsetT sval;
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bfd_boolean print_hex;
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operand = (const struct mips_int_operand *) operand_base;
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factor = 1 << operand->shift;
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@ -4580,7 +4586,10 @@ match_int_operand (struct mips_arg_info *arg,
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/* If non-constant operands are allowed then leave them for
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the caller to process, otherwise fail the match. */
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if (!arg->allow_nonconst)
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return FALSE;
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{
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match_not_constant (arg);
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return FALSE;
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}
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offset_reloc[0] = BFD_RELOC_LO16;
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return TRUE;
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}
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@ -4592,38 +4601,16 @@ match_int_operand (struct mips_arg_info *arg,
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}
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else
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{
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if (!match_const_int (arg, &sval, min_val))
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if (!match_const_int (arg, &sval))
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return FALSE;
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}
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arg->last_op_int = sval;
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/* Check the range. If there's a problem, record the lowest acceptable
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value in arg->last_op_int in order to prevent an unhelpful error
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from OP_MSB too.
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Bit counts have traditionally been printed in hex by the disassembler
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but printed as decimal in error messages. Only resort to hex if
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the operand is bigger than 6 bits. */
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print_hex = operand->print_hex && operand_base->size > 6;
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if (sval < min_val || sval > max_val)
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if (sval < min_val || sval > max_val || sval % factor)
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{
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if (arg->soft_match)
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return FALSE;
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report_bad_range (arg->insn, arg->argnum, sval, min_val, max_val,
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print_hex);
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arg->last_op_int = min_val;
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}
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else if (sval % factor)
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{
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if (arg->soft_match)
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return FALSE;
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as_bad (print_hex && sval >= 0
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? _("Operand %d of `%s' must be a factor of %d, was 0x%lx.")
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: _("Operand %d of `%s' must be a factor of %d, was %ld."),
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arg->argnum, arg->insn->insn_mo->name, factor,
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(unsigned long) sval);
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arg->last_op_int = min_val;
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match_out_of_range (arg);
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return FALSE;
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}
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uval = (unsigned int) sval >> operand->shift;
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@ -4668,7 +4655,7 @@ match_mapped_int_operand (struct mips_arg_info *arg,
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offsetT sval;
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operand = (const struct mips_mapped_int_operand *) operand_base;
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if (!match_const_int (arg, &sval, operand->int_map[0]))
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if (!match_const_int (arg, &sval))
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return FALSE;
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num_vals = 1 << operand_base->size;
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@ -4676,7 +4663,10 @@ match_mapped_int_operand (struct mips_arg_info *arg,
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if (operand->int_map[uval] == sval)
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break;
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if (uval == num_vals)
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return FALSE;
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{
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match_out_of_range (arg);
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return FALSE;
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}
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insn_insert_operand (arg->insn, operand_base, uval);
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return TRUE;
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@ -4697,7 +4687,7 @@ match_msb_operand (struct mips_arg_info *arg,
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max_val = min_val + (1 << operand_base->size) - 1;
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max_high = operand->opsize;
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if (!match_const_int (arg, &size, 1))
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if (!match_const_int (arg, &size))
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return FALSE;
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high = size + arg->last_op_int;
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@ -4705,10 +4695,8 @@ match_msb_operand (struct mips_arg_info *arg,
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if (size < 0 || high > max_high || sval < min_val || sval > max_val)
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{
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if (arg->soft_match)
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return FALSE;
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report_bad_field (arg->last_op_int, size);
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sval = min_val;
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match_out_of_range (arg);
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return FALSE;
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}
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insn_insert_operand (arg->insn, operand_base, sval - min_val);
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return TRUE;
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@ -4790,7 +4778,7 @@ match_perf_reg_operand (struct mips_arg_info *arg,
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{
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offsetT sval;
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if (!match_const_int (arg, &sval, 0))
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if (!match_const_int (arg, &sval))
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return FALSE;
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if (sval != 0
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@ -4799,9 +4787,8 @@ match_perf_reg_operand (struct mips_arg_info *arg,
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&& (strcmp (arg->insn->insn_mo->name, "mfps") == 0
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|| strcmp (arg->insn->insn_mo->name, "mtps") == 0))))
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{
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if (arg->soft_match)
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return FALSE;
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as_bad (_("Invalid performance register (%ld)"), (unsigned long) sval);
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set_insn_error (arg->argnum, _("invalid performance register"));
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return FALSE;
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}
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insn_insert_operand (arg->insn, operand, sval);
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@ -4817,15 +4804,21 @@ match_addiusp_operand (struct mips_arg_info *arg,
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offsetT sval;
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unsigned int uval;
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if (!match_const_int (arg, &sval, -256))
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if (!match_const_int (arg, &sval))
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return FALSE;
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if (sval % 4)
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return FALSE;
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{
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match_out_of_range (arg);
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return FALSE;
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}
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sval /= 4;
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if (!(sval >= -258 && sval <= 257) || (sval >= -2 && sval <= 1))
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return FALSE;
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{
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match_out_of_range (arg);
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return FALSE;
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}
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uval = (unsigned int) sval;
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uval = ((uval >> 1) & ~0xff) | (uval & 0xff);
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@ -4969,9 +4962,7 @@ match_save_restore_list_operand (struct mips_arg_info *arg)
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unsigned int opcode, args, statics, sregs;
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unsigned int num_frame_sizes, num_args, num_statics, num_sregs;
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offsetT frame_size;
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const char *error;
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error = 0;
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opcode = arg->insn->insn_opcode;
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frame_size = 0;
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num_frame_sizes = 0;
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@ -4985,7 +4976,7 @@ match_save_restore_list_operand (struct mips_arg_info *arg)
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if (arg->token->type == OT_INTEGER)
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{
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/* Handle the frame size. */
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if (!match_const_int (arg, &frame_size, 0))
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if (!match_const_int (arg, &frame_size))
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return FALSE;
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num_frame_sizes += 1;
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}
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@ -5079,25 +5070,27 @@ match_save_restore_list_operand (struct mips_arg_info *arg)
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/* Encode frame size. */
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if (num_frame_sizes == 0)
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error = _("Missing frame size");
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else if (num_frame_sizes > 1)
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error = _("Frame size specified twice");
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else if ((frame_size & 7) != 0 || frame_size < 0 || frame_size > 0xff * 8)
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error = _("Invalid frame size");
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else if (frame_size != 128 || (opcode >> 16) != 0)
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{
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set_insn_error (arg->argnum, _("missing frame size"));
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return FALSE;
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}
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if (num_frame_sizes > 1)
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{
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set_insn_error (arg->argnum, _("frame size specified twice"));
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return FALSE;
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}
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if ((frame_size & 7) != 0 || frame_size < 0 || frame_size > 0xff * 8)
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{
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set_insn_error (arg->argnum, _("invalid frame size"));
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return FALSE;
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}
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if (frame_size != 128 || (opcode >> 16) != 0)
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{
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frame_size /= 8;
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opcode |= (((frame_size & 0xf0) << 16)
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| (frame_size & 0x0f));
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}
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if (error)
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{
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if (arg->soft_match)
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return FALSE;
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as_bad ("%s", error);
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}
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/* Finally build the instruction. */
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if ((opcode >> 16) != 0 || frame_size == 0)
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opcode |= MIPS16_EXTEND;
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@ -5126,10 +5119,9 @@ match_mdmx_imm_reg_operand (struct mips_arg_info *arg,
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if ((opcode->membership & INSN_5400)
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&& strcmp (opcode->name, "rzu.ob") == 0)
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{
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if (arg->soft_match)
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return FALSE;
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as_bad (_("Operand %d of `%s' must be an immediate"),
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arg->argnum, opcode->name);
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set_insn_error_i (arg->argnum, _("operand %d must be an immediate"),
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arg->argnum);
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return FALSE;
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}
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/* Check whether this is a vector register or a broadcast of
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@ -5141,9 +5133,8 @@ match_mdmx_imm_reg_operand (struct mips_arg_info *arg,
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return FALSE;
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if (arg->token->u.reg_element.index > (is_qh ? 3 : 7))
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{
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if (arg->soft_match)
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return FALSE;
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as_bad (_("Invalid element selector"));
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set_insn_error (arg->argnum, _("invalid element selector"));
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return FALSE;
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}
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else
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uval |= arg->token->u.reg_element.index << (is_qh ? 2 : 1) << 5;
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@ -5155,10 +5146,9 @@ match_mdmx_imm_reg_operand (struct mips_arg_info *arg,
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&& (strcmp (opcode->name, "sll.ob") == 0
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|| strcmp (opcode->name, "srl.ob") == 0))
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{
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if (arg->soft_match)
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return FALSE;
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as_bad (_("Operand %d of `%s' must be scalar"),
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arg->argnum, opcode->name);
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set_insn_error_i (arg->argnum, _("operand %d must be scalar"),
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arg->argnum);
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return FALSE;
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}
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if (!match_regno (arg, OP_REG_VEC, arg->token->u.regno, ®no))
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@ -5175,13 +5165,12 @@ match_mdmx_imm_reg_operand (struct mips_arg_info *arg,
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{
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offsetT sval;
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if (!match_const_int (arg, &sval, 0))
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if (!match_const_int (arg, &sval))
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return FALSE;
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if (sval < 0 || sval > 31)
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{
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if (arg->soft_match)
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return FALSE;
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report_bad_range (arg->insn, arg->argnum, sval, 0, 31, FALSE);
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match_out_of_range (arg);
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return FALSE;
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}
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uval |= (sval & 31);
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if (is_qh)
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@ -5259,7 +5248,10 @@ match_float_constant (struct mips_arg_info *arg, expressionS *imm,
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The .lit4 and .lit8 sections are only used if permitted by the
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-G argument. */
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if (arg->token->type != OT_FLOAT)
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return FALSE;
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{
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set_insn_error (arg->argnum, _("floating-point expression required"));
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return FALSE;
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}
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gas_assert (arg->token->u.flt.length == length);
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data = arg->token->u.flt.data;
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@ -7058,7 +7050,7 @@ normalize_address_expr (expressionS *ex)
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static bfd_boolean
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match_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
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struct mips_operand_token *tokens, unsigned int opcode_extra,
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bfd_boolean more_alts, bfd_boolean soft_match)
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bfd_boolean more_alts)
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{
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const char *args;
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struct mips_arg_info arg;
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@ -7080,7 +7072,6 @@ match_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
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arg.argnum = 1;
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arg.last_regno = ILLEGAL_REG;
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arg.dest_regno = ILLEGAL_REG;
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arg.soft_match = soft_match;
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for (args = opcode->args;; ++args)
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{
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if (arg.token->type == OT_END)
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@ -7166,32 +7157,11 @@ match_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
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case '+':
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switch (args[1])
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{
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case '1':
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case '2':
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case '3':
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case '4':
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case 'B':
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case 'C':
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case 'F':
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case 'G':
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case 'H':
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case 'J':
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case 'Q':
|
||||
case 'S':
|
||||
case 's':
|
||||
/* If these integer forms come last, there is no other
|
||||
form of the instruction that could match. Prefer to
|
||||
give detailed error messages where possible. */
|
||||
if (args[2] == 0)
|
||||
arg.soft_match = FALSE;
|
||||
break;
|
||||
|
||||
case 'I':
|
||||
/* "+I" is like "I", except that imm2_expr is used. */
|
||||
if (match_const_int (&arg, &imm2_expr.X_add_number, 0))
|
||||
imm2_expr.X_op = O_constant;
|
||||
else
|
||||
set_insn_error (arg.argnum, _("absolute expression required"));
|
||||
if (!match_const_int (&arg, &imm2_expr.X_add_number))
|
||||
return FALSE;
|
||||
imm2_expr.X_op = O_constant;
|
||||
if (HAVE_32BIT_GPRS)
|
||||
normalize_constant_expr (&imm2_expr);
|
||||
++args;
|
||||
|
|
@ -7203,43 +7173,10 @@ match_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
|
|||
}
|
||||
break;
|
||||
|
||||
case '\'':
|
||||
case ':':
|
||||
case '@':
|
||||
case '^':
|
||||
case '$':
|
||||
case '\\':
|
||||
case '%':
|
||||
case '|':
|
||||
case '0':
|
||||
case '1':
|
||||
case '2':
|
||||
case '3':
|
||||
case '4':
|
||||
case '5':
|
||||
case '6':
|
||||
case '8':
|
||||
case 'B':
|
||||
case 'C':
|
||||
case 'J':
|
||||
case 'O':
|
||||
case 'P':
|
||||
case 'Q':
|
||||
case 'c':
|
||||
case 'h':
|
||||
case 'q':
|
||||
/* If these integer forms come last, there is no other
|
||||
form of the instruction that could match. Prefer to
|
||||
give detailed error messages where possible. */
|
||||
if (args[1] == 0)
|
||||
arg.soft_match = FALSE;
|
||||
break;
|
||||
|
||||
case 'I':
|
||||
if (match_const_int (&arg, &imm_expr.X_add_number, 0))
|
||||
imm_expr.X_op = O_constant;
|
||||
else
|
||||
set_insn_error (arg.argnum, _("absolute expression required"));
|
||||
if (!match_const_int (&arg, &imm_expr.X_add_number))
|
||||
return FALSE;
|
||||
imm_expr.X_op = O_constant;
|
||||
if (HAVE_32BIT_GPRS)
|
||||
normalize_constant_expr (&imm_expr);
|
||||
continue;
|
||||
|
|
@ -7253,38 +7190,36 @@ match_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
|
|||
offset_expr.X_op = O_constant;
|
||||
offset_expr.X_add_number = 0;
|
||||
}
|
||||
else if (match_expression (&arg, &offset_expr, offset_reloc))
|
||||
normalize_address_expr (&offset_expr);
|
||||
else
|
||||
set_insn_error (arg.argnum, _("absolute expression required"));
|
||||
{
|
||||
if (!match_expression (&arg, &offset_expr, offset_reloc))
|
||||
return FALSE;
|
||||
normalize_address_expr (&offset_expr);
|
||||
}
|
||||
continue;
|
||||
|
||||
case 'F':
|
||||
if (!match_float_constant (&arg, &imm_expr, &offset_expr,
|
||||
8, TRUE))
|
||||
set_insn_error (arg.argnum,
|
||||
_("floating-point expression required"));
|
||||
return FALSE;
|
||||
continue;
|
||||
|
||||
case 'L':
|
||||
if (!match_float_constant (&arg, &imm_expr, &offset_expr,
|
||||
8, FALSE))
|
||||
set_insn_error (arg.argnum,
|
||||
_("floating-point expression required"));
|
||||
return FALSE;
|
||||
continue;
|
||||
|
||||
case 'f':
|
||||
if (!match_float_constant (&arg, &imm_expr, &offset_expr,
|
||||
4, TRUE))
|
||||
set_insn_error (arg.argnum,
|
||||
_("floating-point expression required"));
|
||||
return FALSE;
|
||||
continue;
|
||||
|
||||
case 'l':
|
||||
if (!match_float_constant (&arg, &imm_expr, &offset_expr,
|
||||
4, FALSE))
|
||||
set_insn_error (arg.argnum,
|
||||
_("floating-point expression required"));
|
||||
return FALSE;
|
||||
continue;
|
||||
|
||||
/* ??? This is the traditional behavior, but is flaky if
|
||||
|
|
@ -7369,7 +7304,7 @@ match_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
|
|||
|
||||
static bfd_boolean
|
||||
match_mips16_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
|
||||
struct mips_operand_token *tokens, bfd_boolean soft_match)
|
||||
struct mips_operand_token *tokens)
|
||||
{
|
||||
const char *args;
|
||||
const struct mips_operand *operand;
|
||||
|
|
@ -7392,7 +7327,6 @@ match_mips16_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
|
|||
arg.argnum = 1;
|
||||
arg.last_regno = ILLEGAL_REG;
|
||||
arg.dest_regno = ILLEGAL_REG;
|
||||
arg.soft_match = soft_match;
|
||||
relax_char = 0;
|
||||
for (args = opcode->args;; ++args)
|
||||
{
|
||||
|
|
@ -7477,10 +7411,9 @@ match_mips16_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
|
|||
break;
|
||||
|
||||
case 'I':
|
||||
if (match_const_int (&arg, &imm_expr.X_add_number, 0))
|
||||
imm_expr.X_op = O_constant;
|
||||
else
|
||||
set_insn_error (arg.argnum, _("absolute expression required"));
|
||||
if (!match_const_int (&arg, &imm_expr.X_add_number))
|
||||
return FALSE;
|
||||
imm_expr.X_op = O_constant;
|
||||
if (HAVE_32BIT_GPRS)
|
||||
normalize_constant_expr (&imm_expr);
|
||||
continue;
|
||||
|
|
@ -13129,7 +13062,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
break;
|
||||
}
|
||||
|
||||
if (match_insn (ip, insn, tokens, opcode_extra, more_alts,
|
||||
if (match_insn (ip, insn, tokens, opcode_extra,
|
||||
more_alts || (wrong_delay_slot_insns
|
||||
&& need_delay_slot_ok)))
|
||||
break;
|
||||
|
|
@ -13161,34 +13094,34 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
static void
|
||||
mips16_ip (char *str, struct mips_cl_insn *ip)
|
||||
{
|
||||
char *s;
|
||||
struct mips_opcode *insn;
|
||||
char *end, *s, c;
|
||||
struct mips_opcode *insn, *first;
|
||||
struct mips_operand_token *tokens;
|
||||
|
||||
forced_insn_length = 0;
|
||||
|
||||
for (s = str; ISLOWER (*s); ++s)
|
||||
;
|
||||
switch (*s)
|
||||
end = s;
|
||||
c = *end;
|
||||
switch (c)
|
||||
{
|
||||
case '\0':
|
||||
break;
|
||||
|
||||
case ' ':
|
||||
*s++ = '\0';
|
||||
s++;
|
||||
break;
|
||||
|
||||
case '.':
|
||||
if (s[1] == 't' && s[2] == ' ')
|
||||
{
|
||||
*s = '\0';
|
||||
forced_insn_length = 2;
|
||||
s += 3;
|
||||
break;
|
||||
}
|
||||
else if (s[1] == 'e' && s[2] == ' ')
|
||||
{
|
||||
*s = '\0';
|
||||
forced_insn_length = 4;
|
||||
s += 3;
|
||||
break;
|
||||
|
|
@ -13202,7 +13135,11 @@ mips16_ip (char *str, struct mips_cl_insn *ip)
|
|||
if (mips_opts.noautoextend && !forced_insn_length)
|
||||
forced_insn_length = 2;
|
||||
|
||||
if ((insn = (struct mips_opcode *) hash_find (mips16_op_hash, str)) == NULL)
|
||||
*end = 0;
|
||||
first = insn = (struct mips_opcode *) hash_find (mips16_op_hash, str);
|
||||
*end = c;
|
||||
|
||||
if (!insn)
|
||||
{
|
||||
set_insn_error (0, _("Unrecognized opcode"));
|
||||
return;
|
||||
|
|
@ -13217,7 +13154,7 @@ mips16_ip (char *str, struct mips_cl_insn *ip)
|
|||
bfd_boolean ok;
|
||||
bfd_boolean more_alts;
|
||||
|
||||
gas_assert (strcmp (insn->name, str) == 0);
|
||||
gas_assert (strcmp (insn->name, first->name) == 0);
|
||||
|
||||
ok = is_opcode_valid_16 (insn);
|
||||
more_alts = (insn + 1 < &mips16_opcodes[bfd_mips16_num_opcodes]
|
||||
|
|
@ -13239,7 +13176,7 @@ mips16_ip (char *str, struct mips_cl_insn *ip)
|
|||
}
|
||||
}
|
||||
|
||||
if (match_mips16_insn (ip, insn, tokens, more_alts))
|
||||
if (match_mips16_insn (ip, insn, tokens))
|
||||
break;
|
||||
|
||||
/* Args don't match. */
|
||||
|
|
|
|||
|
|
@ -1,3 +1,15 @@
|
|||
2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* gas/mips/ext-ill.l, gas/mips/lui-1.l, gas/mips/mips16e-64.l,
|
||||
gas/mips/mips32r2-ill-fp64.l, gas/mips/mips32r2-ill-nofp.l,
|
||||
gas/mips/mips32r2-ill.l, gas/mips/mips64r2-ill.l,
|
||||
gas/mips/octeon-ill.l, gas/mips/r5900-error-vu0.l,
|
||||
gas/mips/vr5400-ill.l: Adjust expected errors.
|
||||
* gas/mips/micromips-size-0.l,
|
||||
gas/mips/micromips-size-0.s: Likewise. Add new tests.
|
||||
* gas/mips/mips16e-save-err.s, gas/mips/mips16e-save-err.l: New test.
|
||||
* gas/mips/mips.exp: Run it.
|
||||
|
||||
2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* gas/mips/micromips-ill.l: Expect "floating-point expression required"
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
.*: Assembler messages:
|
||||
.*:5: Error: Invalid field specification \(position 1, size 0\)
|
||||
.*:5: Error: operand 4 out of range `ext \$2,\$3,1,0'
|
||||
.*:6: Error: Invalid field specification \(position 1, size 0\)
|
||||
.*:7: Error: Invalid field specification \(position 31, size 2\)
|
||||
.*:8: Error: Invalid field specification \(position 1, size 32\)
|
||||
.*:9: Error: Invalid field specification \(position 33, size 0\)
|
||||
.*:7: Error: operand 4 out of range `dextm \$2,\$3,31,2'
|
||||
.*:8: Error: operand 4 out of range `dextm \$2,\$3,1,32'
|
||||
.*:9: Error: operand 4 out of range `dextu \$2,\$3,33,0'
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
.*\.s: Assembler messages:
|
||||
.*\.s:5: Error: Operand 2 of `lui' must be in the range \[0x0, 0xffff\], was -1.
|
||||
.*\.s:6: Error: Operand 2 of `lui' must be in the range \[0x0, 0xffff\], was 0x10000.
|
||||
.*\.s:5: Error: operand 2 out of range `lui \$2,-1'
|
||||
.*\.s:6: Error: operand 2 out of range `lui \$2,65536'
|
||||
.*\.s:7: Error: bignum invalid
|
||||
.*\.s:8: Error: register value used as expression
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
.*:108: Warning: Wrong size instruction in a 32-bit branch delay slot
|
||||
.*:110: Warning: Wrong size instruction in a 32-bit branch delay slot
|
||||
.*:112: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
|
||||
.*:120: Error: Illegal operands `sll16 \$2,\$3,13'
|
||||
.*:120: Error: operand 3 out of range `sll16 \$2,\$3,13'
|
||||
.*:123: Error: Illegal operands `sll16 \$10,\$11,5'
|
||||
.*:128: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$2,\$3,5'
|
||||
.*:130: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,5'
|
||||
|
|
@ -34,3 +34,11 @@
|
|||
.*:135: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,13'
|
||||
.*:138: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$10,\$11,5'
|
||||
.*:140: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$10,\$11,5'
|
||||
.*:145: Error: operand 3 out of range `addiu16 \$2,\$4,5'
|
||||
.*:146: Error: operand 3 out of range `addiu16 \$2,\$4,7'
|
||||
.*:149: Error: operand 3 out of range `andi16 \$2,\$4,5'
|
||||
.*:154: Error: operand 1 out of range `addiusp16 4'
|
||||
.*:155: Error: operand 1 out of range `addiusp16 7'
|
||||
.*:157: Error: operand 1 out of range `addiusp16 10'
|
||||
.*:160: Error: operand 1 out of range `addiusp16 1032'
|
||||
.*:162: Error: operand 1 out of range `addiusp16 -1036'
|
||||
|
|
|
|||
|
|
@ -140,6 +140,27 @@ foo:
|
|||
dsll3216 $10, $11, 5
|
||||
dsll3232 $10, $11, 5
|
||||
|
||||
# Test out-of-range mapped constants
|
||||
addiu16 $2, $4, 4 # OK
|
||||
addiu16 $2, $4, 5 # error
|
||||
addiu16 $2, $4, 7 # error
|
||||
addiu16 $2, $4, 8 # OK
|
||||
andi16 $2, $4, 4 # OK
|
||||
andi16 $2, $4, 5 # error
|
||||
andi16 $2, $4, 7 # OK
|
||||
andi16 $2, $4, 8 # OK
|
||||
|
||||
# Test invalid ADDIUSP
|
||||
addiusp16 4 # error
|
||||
addiusp16 7 # error
|
||||
addiusp16 8 # OK
|
||||
addiusp16 10 # error
|
||||
addiusp16 12 # OK
|
||||
addiusp16 1028 # OK
|
||||
addiusp16 1032 # error
|
||||
addiusp16 -1032 # OK
|
||||
addiusp16 -1036 # error
|
||||
|
||||
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
|
||||
.align 2
|
||||
.space 8
|
||||
|
|
|
|||
|
|
@ -1039,6 +1039,7 @@ if { [istarget mips*-*-vxworks*] } {
|
|||
|
||||
run_dump_test "mips16e-jrc"
|
||||
run_dump_test "mips16e-save"
|
||||
run_list_test "mips16e-save-err" "-march=mips32 -32"
|
||||
run_dump_test "mips16e-64"
|
||||
run_list_test "mips16e-64" "-march=mips32 -32"
|
||||
run_dump_test "mips16-intermix"
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
.*: Assembler messages:
|
||||
.*: Error: Opcode not supported on this processor: .* (.*) `sew'
|
||||
.*: Error: Opcode not supported on this processor: .* (.*) `zew'
|
||||
.*: Error: Opcode not supported on this processor: .* (.*) `sew \$4'
|
||||
.*: Error: Opcode not supported on this processor: .* (.*) `zew \$4'
|
||||
|
|
|
|||
|
|
@ -0,0 +1,13 @@
|
|||
.*: Assembler messages:
|
||||
.*:2: Error: Illegal operands `save \$3,100'
|
||||
.*:3: Error: missing frame size `save \$4'
|
||||
.*:4: Error: frame size specified twice `save \$4,100,200'
|
||||
.*:5: Error: operand 2 must be constant `save \$4,foo'
|
||||
.*:7: Error: invalid frame size `save \$4,1'
|
||||
.*:8: Error: invalid frame size `save \$4,7'
|
||||
.*:10: Error: invalid frame size `save \$4,12'
|
||||
.*:11: Error: invalid frame size `save \$4,2048'
|
||||
.*:12: Error: invalid frame size `save \$4,2052'
|
||||
.*:14: Error: Illegal operands `save \$4,\$6,0'
|
||||
.*:15: Error: Illegal operands `save 0,\$5,\$7'
|
||||
.*:18: Error: Illegal operands `save \$16,\$18,\$20,0'
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
.set mips16
|
||||
save $3,100 # error
|
||||
save $4 # error
|
||||
save $4,100,200 # error
|
||||
save $4,foo # error
|
||||
save $4,0 # OK
|
||||
save $4,1 # error
|
||||
save $4,7 # error
|
||||
save $4,8 # OK
|
||||
save $4,12 # error
|
||||
save $4,2048 # OK
|
||||
save $4,2052 # error
|
||||
save $4,0,$7 # error
|
||||
save $4,$6,0 # error
|
||||
save 0,$5,$7 # error
|
||||
save $16,$18,0 # OK
|
||||
save $16,$18,$19,0 # OK
|
||||
save $16,$18,$20,0 # error
|
||||
|
|
@ -1,13 +1,13 @@
|
|||
.*: Assembler messages:
|
||||
.*:12: Error: Operand 3 of `ext' must be in the range \[0, 31\], was -1.
|
||||
.*:15: Error: Operand 3 of `ext' must be in the range \[0, 31\], was 32.
|
||||
.*:18: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:21: Error: Invalid field specification \(position 0, size 33\)
|
||||
.*:24: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:27: Error: Invalid field specification \(position 31, size 2\)
|
||||
.*:30: Error: Operand 3 of `ins' must be in the range \[0, 31\], was -1.
|
||||
.*:33: Error: Operand 3 of `ins' must be in the range \[0, 31\], was 32.
|
||||
.*:36: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:39: Error: Invalid field specification \(position 0, size 33\)
|
||||
.*:42: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:45: Error: Invalid field specification \(position 31, size 2\)
|
||||
.*:12: Error: operand 3 out of range `ext \$4,\$5,-1,1'
|
||||
.*:15: Error: operand 3 out of range `ext \$4,\$5,32,1'
|
||||
.*:18: Error: operand 4 out of range `ext \$4,\$5,0,0'
|
||||
.*:21: Error: operand 4 out of range `ext \$4,\$5,0,33'
|
||||
.*:24: Error: operand 4 out of range `ext \$4,\$5,0,0'
|
||||
.*:27: Error: operand 4 out of range `ext \$4,\$5,31,2'
|
||||
.*:30: Error: operand 3 out of range `ins \$4,\$5,-1,1'
|
||||
.*:33: Error: operand 3 out of range `ins \$4,\$5,32,1'
|
||||
.*:36: Error: operand 4 out of range `ins \$4,\$5,0,0'
|
||||
.*:39: Error: operand 4 out of range `ins \$4,\$5,0,33'
|
||||
.*:42: Error: operand 4 out of range `ins \$4,\$5,0,0'
|
||||
.*:45: Error: operand 4 out of range `ins \$4,\$5,31,2'
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
.*: Assembler messages:
|
||||
.*:12: Error: Operand 3 of `ext' must be in the range \[0, 31\], was -1.
|
||||
.*:15: Error: Operand 3 of `ext' must be in the range \[0, 31\], was 32.
|
||||
.*:18: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:21: Error: Invalid field specification \(position 0, size 33\)
|
||||
.*:24: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:27: Error: Invalid field specification \(position 31, size 2\)
|
||||
.*:30: Error: Operand 3 of `ins' must be in the range \[0, 31\], was -1.
|
||||
.*:33: Error: Operand 3 of `ins' must be in the range \[0, 31\], was 32.
|
||||
.*:36: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:39: Error: Invalid field specification \(position 0, size 33\)
|
||||
.*:42: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:45: Error: Invalid field specification \(position 31, size 2\)
|
||||
.*:12: Error: operand 3 out of range `ext \$4,\$5,-1,1'
|
||||
.*:15: Error: operand 3 out of range `ext \$4,\$5,32,1'
|
||||
.*:18: Error: operand 4 out of range `ext \$4,\$5,0,0'
|
||||
.*:21: Error: operand 4 out of range `ext \$4,\$5,0,33'
|
||||
.*:24: Error: operand 4 out of range `ext \$4,\$5,0,0'
|
||||
.*:27: Error: operand 4 out of range `ext \$4,\$5,31,2'
|
||||
.*:30: Error: operand 3 out of range `ins \$4,\$5,-1,1'
|
||||
.*:33: Error: operand 3 out of range `ins \$4,\$5,32,1'
|
||||
.*:36: Error: operand 4 out of range `ins \$4,\$5,0,0'
|
||||
.*:39: Error: operand 4 out of range `ins \$4,\$5,0,33'
|
||||
.*:42: Error: operand 4 out of range `ins \$4,\$5,0,0'
|
||||
.*:45: Error: operand 4 out of range `ins \$4,\$5,31,2'
|
||||
|
|
|
|||
|
|
@ -1,15 +1,15 @@
|
|||
.*: Assembler messages:
|
||||
.*:12: Error: Operand 3 of `ext' must be in the range \[0, 31\], was -1.
|
||||
.*:15: Error: Operand 3 of `ext' must be in the range \[0, 31\], was 32.
|
||||
.*:18: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:21: Error: Invalid field specification \(position 0, size 33\)
|
||||
.*:24: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:27: Error: Invalid field specification \(position 31, size 2\)
|
||||
.*:30: Error: Operand 3 of `ins' must be in the range \[0, 31\], was -1.
|
||||
.*:33: Error: Operand 3 of `ins' must be in the range \[0, 31\], was 32.
|
||||
.*:36: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:39: Error: Invalid field specification \(position 0, size 33\)
|
||||
.*:42: Error: Invalid field specification \(position 0, size 0\)
|
||||
.*:45: Error: Invalid field specification \(position 31, size 2\)
|
||||
.*:12: Error: operand 3 out of range `ext \$4,\$5,-1,1'
|
||||
.*:15: Error: operand 3 out of range `ext \$4,\$5,32,1'
|
||||
.*:18: Error: operand 4 out of range `ext \$4,\$5,0,0'
|
||||
.*:21: Error: operand 4 out of range `ext \$4,\$5,0,33'
|
||||
.*:24: Error: operand 4 out of range `ext \$4,\$5,0,0'
|
||||
.*:27: Error: operand 4 out of range `ext \$4,\$5,31,2'
|
||||
.*:30: Error: operand 3 out of range `ins \$4,\$5,-1,1'
|
||||
.*:33: Error: operand 3 out of range `ins \$4,\$5,32,1'
|
||||
.*:36: Error: operand 4 out of range `ins \$4,\$5,0,0'
|
||||
.*:39: Error: operand 4 out of range `ins \$4,\$5,0,33'
|
||||
.*:42: Error: operand 4 out of range `ins \$4,\$5,0,0'
|
||||
.*:45: Error: operand 4 out of range `ins \$4,\$5,31,2'
|
||||
.*:54: Warning: Float register should be even, was 1
|
||||
.*:57: Warning: Float register should be even, was 1
|
||||
|
|
|
|||
|
|
@ -7,22 +7,22 @@
|
|||
.*:33: Error: Invalid field specification \(position 63, size 2\)
|
||||
.*:34: Error: Invalid field specification \(position 63, size 63\)
|
||||
.*:35: Error: Invalid field specification \(position 63, size 64\)
|
||||
.*:40: Error: Operand 3 of `dextm' must be in the range \[0, 31\], was -1.
|
||||
.*:43: Error: Operand 3 of `dextm' must be in the range \[0, 31\], was 32.
|
||||
.*:46: Error: Invalid field specification \(position 0, size 32\)
|
||||
.*:49: Error: Invalid field specification \(position 0, size 65\)
|
||||
.*:59: Error: Invalid field specification \(position 1, size 64\)
|
||||
.*:61: Error: Invalid field specification \(position 31, size 34\)
|
||||
.*:62: Error: Invalid field specification \(position 31, size 63\)
|
||||
.*:63: Error: Invalid field specification \(position 31, size 64\)
|
||||
.*:68: Error: Operand 3 of `dextu' must be in the range \[32, 63\], was 31.
|
||||
.*:71: Error: Operand 3 of `dextu' must be in the range \[32, 63\], was 64.
|
||||
.*:74: Error: Invalid field specification \(position 32, size 0\)
|
||||
.*:77: Error: Invalid field specification \(position 32, size 33\)
|
||||
.*:87: Error: Invalid field specification \(position 33, size 32\)
|
||||
.*:89: Error: Invalid field specification \(position 63, size 2\)
|
||||
.*:90: Error: Invalid field specification \(position 63, size 31\)
|
||||
.*:91: Error: Invalid field specification \(position 63, size 32\)
|
||||
.*:40: Error: operand 3 out of range `dextm \$4,\$5,-1,33'
|
||||
.*:43: Error: operand 3 out of range `dextm \$4,\$5,32,33'
|
||||
.*:46: Error: operand 4 out of range `dextm \$4,\$5,0,32'
|
||||
.*:49: Error: operand 4 out of range `dextm \$4,\$5,0,65'
|
||||
.*:59: Error: operand 4 out of range `dextm \$4,\$5,1,64'
|
||||
.*:61: Error: operand 4 out of range `dextm \$4,\$5,31,34'
|
||||
.*:62: Error: operand 4 out of range `dextm \$4,\$5,31,63'
|
||||
.*:63: Error: operand 4 out of range `dextm \$4,\$5,31,64'
|
||||
.*:68: Error: operand 3 out of range `dextu \$4,\$5,31,1'
|
||||
.*:71: Error: operand 3 out of range `dextu \$4,\$5,64,1'
|
||||
.*:74: Error: operand 4 out of range `dextu \$4,\$5,32,0'
|
||||
.*:77: Error: operand 4 out of range `dextu \$4,\$5,32,33'
|
||||
.*:87: Error: operand 4 out of range `dextu \$4,\$5,33,32'
|
||||
.*:89: Error: operand 4 out of range `dextu \$4,\$5,63,2'
|
||||
.*:90: Error: operand 4 out of range `dextu \$4,\$5,63,31'
|
||||
.*:91: Error: operand 4 out of range `dextu \$4,\$5,63,32'
|
||||
.*:96: Error: Operand 3 of `dins' must be in the range \[0, 63\], was -1.
|
||||
.*:99: Error: Operand 3 of `dins' must be in the range \[0, 63\], was 64.
|
||||
.*:102: Error: Invalid field specification \(position 0, size 0\)
|
||||
|
|
@ -31,27 +31,27 @@
|
|||
.*:117: Error: Invalid field specification \(position 63, size 2\)
|
||||
.*:118: Error: Invalid field specification \(position 63, size 63\)
|
||||
.*:119: Error: Invalid field specification \(position 63, size 64\)
|
||||
.*:124: Error: Operand 3 of `dinsm' must be in the range \[0, 31\], was -1.
|
||||
.*:127: Error: Operand 3 of `dinsm' must be in the range \[0, 31\], was 32.
|
||||
.*:130: Error: Invalid field specification \(position 31, size 1\)
|
||||
.*:133: Error: Invalid field specification \(position 0, size 65\)
|
||||
.*:136: Error: Invalid field specification \(position 0, size 2\)
|
||||
.*:137: Error: Invalid field specification \(position 0, size 3\)
|
||||
.*:140: Error: Invalid field specification \(position 1, size 2\)
|
||||
.*:141: Error: Invalid field specification \(position 1, size 3\)
|
||||
.*:143: Error: Invalid field specification \(position 1, size 64\)
|
||||
.*:144: Error: Invalid field specification \(position 30, size 2\)
|
||||
.*:146: Error: Invalid field specification \(position 30, size 63\)
|
||||
.*:147: Error: Invalid field specification \(position 30, size 64\)
|
||||
.*:150: Error: Invalid field specification \(position 31, size 63\)
|
||||
.*:151: Error: Invalid field specification \(position 31, size 64\)
|
||||
.*:156: Error: Operand 3 of `dinsu' must be in the range \[32, 63\], was 31.
|
||||
.*:159: Error: Operand 3 of `dinsu' must be in the range \[32, 63\], was 64.
|
||||
.*:162: Error: Invalid field specification \(position 32, size 0\)
|
||||
.*:165: Error: Invalid field specification \(position 32, size 33\)
|
||||
.*:175: Error: Invalid field specification \(position 33, size 32\)
|
||||
.*:178: Error: Invalid field specification \(position 62, size 31\)
|
||||
.*:179: Error: Invalid field specification \(position 62, size 32\)
|
||||
.*:181: Error: Invalid field specification \(position 63, size 2\)
|
||||
.*:182: Error: Invalid field specification \(position 63, size 31\)
|
||||
.*:183: Error: Invalid field specification \(position 63, size 32\)
|
||||
.*:124: Error: operand 3 out of range `dinsm \$4,\$5,-1,33'
|
||||
.*:127: Error: operand 3 out of range `dinsm \$4,\$5,32,33'
|
||||
.*:130: Error: operand 4 out of range `dinsm \$4,\$5,31,1'
|
||||
.*:133: Error: operand 4 out of range `dinsm \$4,\$5,0,65'
|
||||
.*:136: Error: operand 4 out of range `dinsm \$4,\$5,0,2'
|
||||
.*:137: Error: operand 4 out of range `dinsm \$4,\$5,0,3'
|
||||
.*:140: Error: operand 4 out of range `dinsm \$4,\$5,1,2'
|
||||
.*:141: Error: operand 4 out of range `dinsm \$4,\$5,1,3'
|
||||
.*:143: Error: operand 4 out of range `dinsm \$4,\$5,1,64'
|
||||
.*:144: Error: operand 4 out of range `dinsm \$4,\$5,30,2'
|
||||
.*:146: Error: operand 4 out of range `dinsm \$4,\$5,30,63'
|
||||
.*:147: Error: operand 4 out of range `dinsm \$4,\$5,30,64'
|
||||
.*:150: Error: operand 4 out of range `dinsm \$4,\$5,31,63'
|
||||
.*:151: Error: operand 4 out of range `dinsm \$4,\$5,31,64'
|
||||
.*:156: Error: operand 3 out of range `dinsu \$4,\$5,31,1'
|
||||
.*:159: Error: operand 3 out of range `dinsu \$4,\$5,64,1'
|
||||
.*:162: Error: operand 4 out of range `dinsu \$4,\$5,32,0'
|
||||
.*:165: Error: operand 4 out of range `dinsu \$4,\$5,32,33'
|
||||
.*:175: Error: operand 4 out of range `dinsu \$4,\$5,33,32'
|
||||
.*:178: Error: operand 4 out of range `dinsu \$4,\$5,62,31'
|
||||
.*:179: Error: operand 4 out of range `dinsu \$4,\$5,62,32'
|
||||
.*:181: Error: operand 4 out of range `dinsu \$4,\$5,63,2'
|
||||
.*:182: Error: operand 4 out of range `dinsu \$4,\$5,63,31'
|
||||
.*:183: Error: operand 4 out of range `dinsu \$4,\$5,63,32'
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
.*: Assembler messages:
|
||||
.*:5: Error: Operand 2 of `bbit032' must be in the range \[0, 31\], was 51.
|
||||
.*:7: Error: Operand 2 of `bbit0' must be in the range \[0, 31\], was 71.
|
||||
.*:10: Error: Operand 2 of `bbit132' must be in the range \[0, 31\], was 49.
|
||||
.*:12: Error: Operand 2 of `bbit1' must be in the range \[0, 31\], was 74.
|
||||
.*:15: Error: Invalid field specification \(position 0, size 37\)
|
||||
.*:17: Error: Operand 3 of `cins32' must be in the range \[0, 31\], was 39.
|
||||
.*:18: Error: Invalid field specification \(position 7, size 25\)
|
||||
.*:20: Error: Operand 3 of `cins' must be in the range \[0, 31\], was 64.
|
||||
.*:21: Error: Invalid field specification \(position 50, size 14\)
|
||||
.*:5: Error: operand 2 out of range `bbit032 \$23,51,foo'
|
||||
.*:7: Error: operand 2 out of range `bbit0 \$23,71,foo'
|
||||
.*:10: Error: operand 2 out of range `bbit132 \$23,49,foo'
|
||||
.*:12: Error: operand 2 out of range `bbit1 \$23,74,foo'
|
||||
.*:15: Error: operand 3 out of range `cins \$2,0,37'
|
||||
.*:17: Error: operand 3 out of range `cins32 \$19,\$31,39,12'
|
||||
.*:18: Error: operand 4 out of range `cins32 \$17,\$20,7,25'
|
||||
.*:20: Error: operand 3 out of range `cins \$24,\$10,64,8'
|
||||
.*:21: Error: operand 4 out of range `cins \$21,\$30,50,14'
|
||||
.*:23: Error: Opcode not supported on this processor.*
|
||||
.*:24: Error: Opcode not supported on this processor.*
|
||||
.*:25: Error: Opcode not supported on this processor.*
|
||||
|
|
@ -28,18 +28,18 @@
|
|||
.*:41: Error: Opcode not supported on this processor.*
|
||||
.*:42: Error: Opcode not supported on this processor.*
|
||||
.*:43: Error: Opcode not supported on this processor.*
|
||||
.*:45: Error: Illegal operands `dmfc2 \$2,0x10000'
|
||||
.*:46: Error: Illegal operands `dmtc2 \$2,0x12345'
|
||||
.*:47: Error: Illegal operands `dmfc2 \$9,\$12'
|
||||
.*:48: Error: Illegal operands `dmfc2 \$4,\$15,4'
|
||||
.*:49: Error: Illegal operands `dmtc2 \$16,\$8'
|
||||
.*:50: Error: Illegal operands `dmtc2 \$22,\$7,\$4'
|
||||
.*:52: Error: Invalid field specification \(position 26, size 32\)
|
||||
.*:54: Error: Operand 3 of `exts32' must be in the range \[0, 31\], was 32.
|
||||
.*:55: Error: Invalid field specification \(position 3, size 29\)
|
||||
.*:57: Error: Operand 3 of `exts' must be in the range \[0, 31\], was 70.
|
||||
.*:58: Error: Invalid field specification \(position 39, size 25\)
|
||||
.*:60: Error: Operand 3 of `seqi' must be in the range \[-512, 511\], was 512.
|
||||
.*:61: Error: Operand 2 of `seqi' must be in the range \[-512, 511\], was -771.
|
||||
.*:62: Error: Operand 3 of `snei' must be in the range \[-512, 511\], was 615.
|
||||
.*:63: Error: Operand 2 of `snei' must be in the range \[-512, 511\], was -513.
|
||||
.*:45: Error: operand 2 out of range `dmfc2 \$2,0x10000'
|
||||
.*:46: Error: operand 2 out of range `dmtc2 \$2,0x12345'
|
||||
.*:47: Error: operand 2 must be constant `dmfc2 \$9,\$12'
|
||||
.*:48: Error: operand 2 must be constant `dmfc2 \$4,\$15,4'
|
||||
.*:49: Error: operand 2 must be constant `dmtc2 \$16,\$8'
|
||||
.*:50: Error: operand 2 must be constant `dmtc2 \$22,\$7,\$4'
|
||||
.*:52: Error: operand 3 out of range `exts \$26,26,32'
|
||||
.*:54: Error: operand 3 out of range `exts32 \$7,\$21,32,10'
|
||||
.*:55: Error: operand 4 out of range `exts32 \$31,\$13,3,29'
|
||||
.*:57: Error: operand 3 out of range `exts \$14,\$29,70,14'
|
||||
.*:58: Error: operand 4 out of range `exts \$20,\$16,39,25'
|
||||
.*:60: Error: operand 3 out of range `seqi \$14,\$13,512'
|
||||
.*:61: Error: operand 2 out of range `seqi \$19,-771'
|
||||
.*:62: Error: operand 3 out of range `snei \$18,\$30,615'
|
||||
.*:63: Error: operand 2 out of range `snei \$17,-513'
|
||||
|
|
|
|||
|
|
@ -94,14 +94,14 @@
|
|||
.*: Error: Illegal operands `vaddz\.xyzw \$vf31xyzw,\$vf0xyzw,\$vf0x'
|
||||
.*: Error: Illegal operands `vaddz\.xyzw \$vf31xyzw,\$vf15xyzw,\$vf7y'
|
||||
.*: Error: Illegal operands `vaddz\.xyzw \$vf31xyzw,\$vf31xyzw,\$vf31w'
|
||||
.*: Error: Operand 1 of `vcallms' must be in the range \[0x0, 0x3fff8\], was \-1\.
|
||||
.*: Error: Operand 1 of `vcallms' must be in the range \[0x0, 0x3fff8\], was \-128\.
|
||||
.*: Error: Operand 1 of `vcallms' must be a factor of 8, was 0x1\.
|
||||
.*: Error: Operand 1 of `vcallms' must be a factor of 8, was 0x7\.
|
||||
.*: Error: Operand 1 of `vcallms' must be a factor of 8, was 0x4\.
|
||||
.*: Error: Operand 1 of `vcallms' must be a factor of 8, was 0x2\.
|
||||
.*: Error: Operand 1 of `vcallms' must be in the range \[0x0, 0x3fff8\], was 0x40000\.
|
||||
.*: Error: Operand 1 of `vcallms' must be in the range \[0x0, 0x3fff8\], was 0x40008\.
|
||||
.*: Error: operand 1 out of range `vcallms -1'
|
||||
.*: Error: operand 1 out of range `vcallms -0x0080'
|
||||
.*: Error: operand 1 out of range `vcallms 0x1'
|
||||
.*: Error: operand 1 out of range `vcallms 0x7'
|
||||
.*: Error: operand 1 out of range `vcallms 0x4'
|
||||
.*: Error: operand 1 out of range `vcallms 0x2'
|
||||
.*: Error: operand 1 out of range `vcallms 0x40000'
|
||||
.*: Error: operand 1 out of range `vcallms 0x40008'
|
||||
.*: Error: Illegal operands `vclipw\.xyz \$vf0xyz,\$vf0x'
|
||||
.*: Error: Illegal operands `vclipw\.xyz \$vf0xyz,\$vf31y'
|
||||
.*: Error: Illegal operands `vclipw\.xyz \$vf1xyz,\$vf2z'
|
||||
|
|
@ -123,11 +123,11 @@
|
|||
.*: Error: Illegal operands `vftoi15\.xyzw \$vf0xyzw,\$vf0xyz'
|
||||
.*: Error: Illegal operands `vftoi15\.y \$vf1y,\$vf2x'
|
||||
.*: Error: Illegal operands `vftoi15\.y \$vf31y,\$vf0w'
|
||||
.*: Error: Operand 3 of `viaddi' must be in the range \[\-16, 15\], was \-17\.
|
||||
.*: Error: Operand 3 of `viaddi' must be in the range \[\-16, 15\], was 16\.
|
||||
.*: Error: Operand 3 of `viaddi' must be in the range \[\-16, 15\], was 17\.
|
||||
.*: Error: Operand 3 of `viaddi' must be in the range \[\-16, 15\], was 32\.
|
||||
.*: Error: Operand 3 of `viaddi' must be in the range \[\-16, 15\], was 31\.
|
||||
.*: Error: operand 3 out of range `viaddi \$vi0,\$vi0,-17'
|
||||
.*: Error: operand 3 out of range `viaddi \$vi1,\$vi2,16'
|
||||
.*: Error: operand 3 out of range `viaddi \$vi31,\$vi0,17'
|
||||
.*: Error: operand 3 out of range `viaddi \$vi31,\$vi15,32'
|
||||
.*: Error: operand 3 out of range `viaddi \$vi31,\$vi31,31'
|
||||
.*: Error: Illegal operands `viand \$vi0xyzw,\$vi0,\$vi0'
|
||||
.*: Error: Illegal operands `viand \$vi0,\$vi0xyzw,\$vi31'
|
||||
.*: Error: Illegal operands `viand \$vi0,\$vi31,\$vi0xyzw'
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
.*: Assembler messages:
|
||||
.*:3: Error: Operand 3 of `sll.ob' must be scalar
|
||||
.*:7: Error: Operand 3 of `srl.ob' must be scalar
|
||||
.*:10: Error: Operand 2 of `rzu.ob' must be an immediate
|
||||
.*:11: Error: Operand 2 of `rzu.ob' must be an immediate
|
||||
.*:3: Error: operand 3 must be scalar `sll.ob \$f2,\$f4,\$f6'
|
||||
.*:7: Error: operand 3 must be scalar `srl.ob \$f2,\$f4,\$f6'
|
||||
.*:10: Error: operand 2 must be an immediate `rzu.ob \$f2,\$f6\[1\]'
|
||||
.*:11: Error: operand 2 must be an immediate `rzu.ob \$f2,\$f6'
|
||||
.*:14: Error: Illegal operands `add.ob \$v2,\$f4,\$f6'
|
||||
.*:15: Error: Illegal operands `add.ob \$f2,\$v4,\$f6'
|
||||
.*:16: Error: Illegal operands `add.ob \$f2,\$f4,\$v6'
|
||||
|
|
|
|||
Loading…
Reference in New Issue