2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* mips/interp.c (decode_coproc): Sign-extend the address retrieved from COP0_BADVADDR. * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
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@ -1,3 +1,9 @@
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2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
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* mips/interp.c (decode_coproc): Sign-extend the address retrieved
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from COP0_BADVADDR.
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* mips/sim-main.h (COP0_BADVADDR): Remove a cast.
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2004-04-10 Chris Demetriou <cgd@broadcom.com>
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2004-04-10 Chris Demetriou <cgd@broadcom.com>
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* sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
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* sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
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@ -2102,7 +2102,7 @@ decode_coproc (SIM_DESC sd,
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case 8:
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case 8:
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/* 8 = BadVAddr R4000 VR4100 VR4300 */
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/* 8 = BadVAddr R4000 VR4100 VR4300 */
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if (code == 0x00)
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if (code == 0x00)
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GPR[rt] = COP0_BADVADDR;
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GPR[rt] = (signed_word) (signed_address) COP0_BADVADDR;
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else
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else
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COP0_BADVADDR = GPR[rt];
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COP0_BADVADDR = GPR[rt];
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break;
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break;
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@ -383,7 +383,7 @@ struct _sim_cpu {
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#define NR_COP0_GPR 32
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#define NR_COP0_GPR 32
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unsigned_word cop0_gpr[NR_COP0_GPR];
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unsigned_word cop0_gpr[NR_COP0_GPR];
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#define COP0_GPR ((CPU)->cop0_gpr)
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#define COP0_GPR ((CPU)->cop0_gpr)
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#define COP0_BADVADDR ((unsigned32)(COP0_GPR[8]))
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#define COP0_BADVADDR (COP0_GPR[8])
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/* While space is allocated for the floating point registers in the
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/* While space is allocated for the floating point registers in the
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main registers array, they are stored separatly. This is because
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main registers array, they are stored separatly. This is because
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