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sim: aarch64: switch to common disassembler tracing 

The output should largely be the same.
This commit is contained in:
Mike Frysinger 2015-12-30 23:26:05 -05:00
parent 824c862804
commit 1a846c6262
5 changed files with 30 additions and 137 deletions
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17
sim/aarch64/ChangeLog
View File

@ -1,3 +1,20 @@
2016-01-05 Mike Frysinger <vapier@gentoo.org>
* interp.c: Delete dis-asm.h include.
(info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
(sim_create_inferior): Delete disassemble init logic.
(OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
(sim_open): Delete sim_add_option_table call.
* memory.c (mem_error): Delete disas check.
* simulator.c: Delete dis-asm.h include.
(disas): Delete.
(HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
(HALT_NYI): Likewise.
(handle_halt): Delete disas call.
(aarch64_step): Replace disas logic with TRACE_DISASM.
* simulator.h: Delete dis-asm.h include.
(aarch64_print_insn): Delete.
2016-01-04 Mike Frysinger <vapier@gentoo.org>
* simulator.c (MAX, MIN): Delete.

96
sim/aarch64/interp.c
View File

@ -38,58 +38,9 @@
#include "memory.h"
#include "simulator.h"
#include "dis-asm.h"
static struct disassemble_info info;
static unsigned long symcount = 0;
static asymbol ** symtab = NULL;
/* FIXME: 1000 characters should be enough to hold the disassembled
instruction plus any comments that come after it. But maybe with
C++ programs this might not be enough. Not sure if it is worth
adding logic to dynamically grow the buffer though. */
static char opbuf[1000];
static int op_printf (void *, const char *, ...) ATTRIBUTE_FPTR_PRINTF_2;
static int
op_printf (void *stream ATTRIBUTE_UNUSED, const char *fmt, ...)
{
size_t space_remaining;
int ret;
va_list ap;
space_remaining = sizeof (opbuf) - strlen (opbuf);
va_start (ap, fmt);
/* Instead of printing to stream we store the text in opbuf.
This allows us to use the sim_io_eprintf routine to output
the text in aarch64_print_insn. */
ret = vsnprintf (opbuf + strlen (opbuf), space_remaining, fmt, ap);
va_end (ap);
return ret;
}
void
aarch64_print_insn (SIM_DESC sd, uint64_t addr)
{
int size;
opbuf[0] = 0;
size = print_insn_aarch64 (addr, & info);
sim_io_eprintf (sd, " %*s\n", size, opbuf);
}
static int
sim_dis_read (bfd_vma memaddr,
bfd_byte * ptr,
unsigned int length,
struct disassemble_info * info)
{
aarch64_get_mem_blk (info->application_data, memaddr, (char *) ptr, length);
return 0;
}
/* Filter out (in place) symbols that are useless for disassembly.
COUNT is the number of elements in SYMBOLS.
Return the number of useful symbols. */
@ -202,16 +153,6 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
STATE_PROG_ARGV (sd) = dupargv (argv);
}
memset (& info, 0, sizeof (info));
init_disassemble_info (& info, NULL, op_printf);
info.read_memory_func = sim_dis_read;
info.arch = bfd_get_arch (abfd);
info.mach = bfd_get_mach (abfd);
info.application_data = cpu;
if (info.mach == 0)
info.arch = bfd_arch_aarch64;
disassemble_init_for_target (& info);
storage = bfd_get_symtab_upper_bound (abfd);
if (storage > 0)
{
@ -384,41 +325,6 @@ free_state (SIM_DESC sd)
sim_state_free (sd);
}
enum
{
OPTION_DISAS = OPTION_START,
};
static SIM_RC
aarch64_option_handler (SIM_DESC sd ATTRIBUTE_UNUSED,
sim_cpu * current_cpu ATTRIBUTE_UNUSED,
int opt,
char * arg ATTRIBUTE_UNUSED,
int is_command ATTRIBUTE_UNUSED)
{
switch (opt)
{
case OPTION_DISAS:
disas = TRUE;
return SIM_RC_OK;
default:
sim_io_eprintf (sd, "Unknown AArch64 option %d\n", opt);
return SIM_RC_FAIL;
}
}
static DECLARE_OPTION_HANDLER (aarch64_option_handler);
const OPTION aarch64_options[] =
{
{ {"disas", no_argument, NULL, OPTION_DISAS },
'\0', NULL, "Enable instruction disassembly",
aarch64_option_handler, NULL },
{ {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL, NULL }
};
SIM_DESC
sim_open (SIM_OPEN_KIND kind,
struct host_callback_struct * callback,
@ -434,8 +340,6 @@ sim_open (SIM_OPEN_KIND kind,
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
sim_add_option_table (sd, NULL, aarch64_options);
/* Perform the initialization steps one by one. */
if (sim_cpu_alloc_all (sd, 1, 0) != SIM_RC_OK
|| sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK

2
sim/aarch64/memory.c
View File

@ -39,8 +39,6 @@
static inline void
mem_error (sim_cpu *cpu, const char *message, uint64_t addr)
{
if (disas)
sim_io_eprintf (CPU_STATE (cpu), "\n");
TRACE_MEMORY (cpu, "ERROR: %s: %" PRIx64, message, addr);
}

49
sim/aarch64/simulator.c
View File

@ -28,8 +28,6 @@
#include <time.h>
#include <limits.h>
#include "dis-asm.h"
#include "simulator.h"
#include "cpustate.h"
#include "memory.h"
@ -37,8 +35,6 @@
#define NO_SP 0
#define SP_OK 1
bfd_boolean disas = FALSE;
#define TST(_flag) (aarch64_test_CPSR_bit (cpu, _flag))
#define IS_SET(_X) ( TST (( _X )))
#define IS_CLEAR(_X) (!TST (( _X )))
@ -46,14 +42,11 @@ bfd_boolean disas = FALSE;
#define HALT_UNALLOC \
do \
{ \
if (TRACE_INSN_P (cpu)) \
{ \
aarch64_print_insn (CPU_STATE (cpu), aarch64_get_PC (cpu)); \
TRACE_INSN (cpu, \
"Unallocated instruction detected at sim line %d,"\
" exe addr %" PRIx64, \
__LINE__, aarch64_get_PC (cpu)); \
} \
TRACE_DISASM (cpu, aarch64_get_PC (cpu)); \
TRACE_INSN (cpu, \
"Unallocated instruction detected at sim line %d," \
" exe addr %" PRIx64, \
__LINE__, aarch64_get_PC (cpu)); \
sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),\
sim_stopped, SIM_SIGILL); \
} \
@ -62,14 +55,11 @@ bfd_boolean disas = FALSE;
#define HALT_NYI \
do \
{ \
if (TRACE_INSN_P (cpu)) \
{ \
aarch64_print_insn (CPU_STATE (cpu), aarch64_get_PC (cpu)); \
TRACE_INSN (cpu, \
"Unimplemented instruction detected at sim line %d,"\
" exe addr %" PRIx64, \
__LINE__, aarch64_get_PC (cpu)); \
} \
TRACE_DISASM (cpu, aarch64_get_PC (cpu)); \
TRACE_INSN (cpu, \
"Unimplemented instruction detected at sim line %d," \
" exe addr %" PRIx64, \
__LINE__, aarch64_get_PC (cpu)); \
sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),\
sim_stopped, SIM_SIGABRT); \
} \
@ -12678,9 +12668,6 @@ handle_halt (sim_cpu *cpu, uint32_t val)
else if (fd == 1)
{
printf ("%.*s", (int) len, aarch64_get_mem_ptr (cpu, buf));
if (disas)
/* So that the output stays in sync with trace output. */
fflush (stdout);
}
else if (fd == 2)
{
@ -13032,19 +13019,9 @@ aarch64_step (sim_cpu *cpu)
aarch64_set_next_PC (cpu, pc + 4);
aarch64_get_instr (cpu) = aarch64_get_mem_u32 (cpu, pc);
if (TRACE_INSN_P (cpu))
{
if (disas)
TRACE_INSN (cpu, " pc = %" PRIx64 " ", pc);
else
TRACE_INSN (cpu, " pc = %" PRIx64 " instr = %x", pc,
aarch64_get_instr (cpu));
}
else if (disas)
sim_io_eprintf (CPU_STATE (cpu), " %" PRIx64 " ", pc);
if (disas)
aarch64_print_insn (CPU_STATE (cpu), pc);
TRACE_INSN (cpu, " pc = %" PRIx64 " instr = %x", pc,
aarch64_get_instr (cpu));
TRACE_DISASM (cpu, pc);
aarch64_decode_and_execute (cpu, pc);

3
sim/aarch64/simulator.h
View File

@ -29,8 +29,6 @@
#include "sim-main.h"
#include "decode.h"
extern bfd_boolean disas;
#define TOP_LEVEL_RETURN_PC 0xffffffffffffffecULL
/* Call this to set the start stack pointer, frame pointer and pc
@ -50,7 +48,6 @@ extern void aarch64_init (sim_cpu *, uint64_t);
extern void aarch64_run (SIM_DESC);
extern const char * aarch64_get_func (uint64_t);
extern void aarch64_print_insn (SIM_DESC, uint64_t);
extern uint64_t aarch64_get_sym_value (const char *);
extern void aarch64_init_LIT_table (void);