[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.

bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
This commit is contained in:
Renlin Li 2015-10-02 16:04:09 +01:00
parent dc8008f508
commit 1aa66fb152
10 changed files with 70 additions and 0 deletions

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@ -1,3 +1,11 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (aarch64_reloc_got_type): Add

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@ -5786,6 +5786,9 @@ tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC,
/* AArch64 TLS General Dynamic relocation. */
BFD_RELOC_AARCH64_TLSGD_MOVW_G1,
/* AArch64 TLS INITIAL EXEC relocation. */
BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1,

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@ -168,6 +168,7 @@
((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC \
@ -1006,6 +1007,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Higher 16 bits of GOT offset to tls_index. */
HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSGD_MOVW_G1), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */

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@ -2755,6 +2755,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21",
"BFD_RELOC_AARCH64_TLSGD_ADR_PREL21",
"BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC",
"BFD_RELOC_AARCH64_TLSGD_MOVW_G1",
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1",
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC",
"BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21",

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@ -6829,6 +6829,10 @@ ENUMDOC
Unsigned 12 bit byte offset to global offset table entry for a symbols
tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
ENUM
BFD_RELOC_AARCH64_TLSGD_MOVW_G1
ENUMDOC
AArch64 TLS General Dynamic relocation.
ENUM
BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
ENUMDOC

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@ -1,3 +1,10 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
(md_apply_fix): Likewise.
(aarch64_force_relocation): Likewise.
2015-10-02 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifier

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@ -2500,6 +2500,15 @@ static struct reloc_table_entry reloc_table[] = {
0,
0},
/* Most significant bits 16-31 of address/value: MOVZ. */
{"tlsgd_g1", 0,
0, /* adr_type */
0,
BFD_RELOC_AARCH64_TLSGD_MOVW_G1,
0,
0,
0},
/* Get to the page containing GOT TLS entry for a symbol */
{"tlsdesc", 0,
BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21, /* adr_type */
@ -4670,6 +4679,7 @@ process_movw_reloc_info (void)
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_G2_S:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
@ -4696,6 +4706,7 @@ process_movw_reloc_info (void)
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
@ -6915,6 +6926,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
@ -7143,6 +7155,7 @@ aarch64_force_relocation (struct fix *fixp)
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:

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@ -1,3 +1,8 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* gas/aarch64/reloc-tlsgd_g1.s: New.
* gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 Renlin Li <renlin.li@arm.com>
* gas/aarch64/reloc-gotoff_g0_nc.s: New.

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@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: d2a0001c movz x28, #0x0, lsl #16
0: R_AARCH64_TLSGD_MOVW_G1 var

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@ -0,0 +1,4 @@
func:
// R_AARCH64_TLSGD_MOVW_G1 var
movz x28, #:tlsgd_g1:var