Fri Feb 21 14:34:31 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* config/tc-d30v.c (parallel_ok): New function. * config/tc-d30v.h: Define TARGET_BYTES_BIG_ENDIAN.
This commit is contained in:
Martin Hunt
parent
cea0f6fc02
commit
1b52469766
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@ -1,5 +1,8 @@
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Fri Feb 21 14:34:31 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
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start-sanitize-d30v
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* config/tc-d30v.c (parallel_ok): New function.
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* config/tc-d30v.h: Define TARGET_BYTES_BIG_ENDIAN.
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end-sanitize-d30v
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* config/tc-d10v.c (md_pcrel_from_section): Return 0 if
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relocation is in different section. Fixes PR11574.
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@ -447,34 +447,6 @@ get_operands (exp, cmp_hack)
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return (numops);
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}
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#if 0
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static unsigned long
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d30v_insert_operand (insn, op_type, value, left, fix)
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unsigned long insn;
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int op_type;
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offsetT value;
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int left;
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fixS *fix;
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{
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int shift, bits;
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shift = d30v_operands[op_type].shift;
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if (left)
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shift += 15;
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bits = d30v_operands[op_type].bits;
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/* truncate to the proper number of bits */
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if (check_range (value, bits, d30v_operands[op_type].flags))
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as_bad_where (fix->fx_file, fix->fx_line, "operand out of range: %d", value);
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value &= 0x7FFFFFFF >> (31 - bits);
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insn |= (value << shift);
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return insn;
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}
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#endif
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/* build_insn generates the instruction. It does everything */
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/* but write the FM bits. */
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@ -526,7 +498,6 @@ build_insn (opcode, opers)
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number = id;
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}
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if (Optimizing) printf("bits=%d length=%d shift=%d number=%x\n",bits,length,shift,number);
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if (opers[i].X_op != O_register && opers[i].X_op != O_constant && !(flags & OPERAND_NAME))
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{
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@ -541,7 +512,6 @@ build_insn (opcode, opers)
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fixups->fix[fixups->fc].exp = opers[i];
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fixups->fix[fixups->fc].operand = form->operands[i];
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fixups->fix[fixups->fc].pcrel = op->reloc_flag;
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if (Optimizing) printf("fixup %d: reloc=%d operand=%d\n",fixups->fc,fixups->fix[fixups->fc].reloc,form->operands[i]);
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(fixups->fc)++;
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}
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@ -585,7 +555,6 @@ write_long (opcode, insn, fx)
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if (fx->fix[i].reloc)
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{
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where = f - frag_now->fr_literal;
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if (Optimizing) printf("write_L: reloc at %x\n",where);
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fix_new_exp (frag_now,
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where,
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fx->fix[i].size,
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@ -623,7 +592,6 @@ write_1_short (opcode, insn, fx)
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if (fx->fix[i].reloc)
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{
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where = f - frag_now->fr_literal;
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if (Optimizing) printf("write_1: reloc at %x\n",where);
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fix_new_exp (frag_now,
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where,
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fx->fix[i].size,
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@ -648,8 +616,6 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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char *f;
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int i,j, where;
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if (Optimizing) printf("write_2_short: %llx %llx exec=%d\n",insn1,insn2,exec_type);
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if(exec_type != 1 && (opcode1->op->flags_used == FLAG_JSR))
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{
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/* subroutines must be called from 32-bit boundaries */
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@ -735,7 +701,6 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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{
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where = (f - frag_now->fr_literal) + 4*j;
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if (Optimizing) printf("write_2: reloc at %x\n",where);
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fix_new_exp (frag_now,
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where,
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fx->fix[i].size,
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@ -759,105 +724,91 @@ parallel_ok (op1, insn1, op2, insn2, exec_type)
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unsigned long insn1, insn2;
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int exec_type;
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{
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#if 0
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int i, j, flags, mask, shift, regno;
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unsigned long ins, mod[2], used[2];
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struct d30v_insn *op;
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int i, j, flags, mask, shift, regno, bits;
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unsigned long ins, mod_reg[2][3], used_reg[2][3];
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struct d30v_format *f;
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struct d30v_opcode *op;
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if ((op1->exec_type & SEQ) != 0 || (op2->exec_type & SEQ) != 0
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|| (op1->exec_type & PAR) == 0 || (op2->exec_type & PAR) == 0
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|| (op1->unit == BOTH) || (op2->unit == BOTH)
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|| (op1->unit == IU && op2->unit == IU)
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|| (op1->unit == MU && op2->unit == MU))
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/* section 4.3: both instructions must not be IU or MU only */
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if ((op1->op->unit == IU && op2->op->unit == IU)
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|| (op1->op->unit == MU && op2->op->unit == MU))
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return 0;
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/* If the first instruction is a branch and this is auto parallazation,
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don't combine with any second instruction. */
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if (exec_type == 0 && (op1->exec_type & BRANCH) != 0)
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return 0;
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/*
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[0] r0-r31
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[1] r32-r63
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[2] a0, a1
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*/
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/* The idea here is to create two sets of bitmasks (mod and used) */
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/* which indicate which registers are modified or used by each instruction. */
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/* The operation can only be done in parallel if instruction 1 and instruction 2 */
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/* modify different registers, and neither instruction modifies any registers */
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/* the other is using. Accesses to control registers, PSW, and memory are treated */
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/* as accesses to a single register. So if both instructions write memory or one */
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/* instruction writes memory and the other reads, then they cannot be done in parallel. */
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/* Likewise, if one instruction mucks with the psw and the other reads the PSW */
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/* (which includes C, F0, and F1), then they cannot operate safely in parallel. */
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/* the bitmasks (mod and used) look like this (bit 31 = MSB) */
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/* r0-r15 0-15 */
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/* a0-a1 16-17 */
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/* cr (not psw) 18 */
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/* psw 19 */
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/* mem 20 */
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for (j=0;j<2;j++)
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for (j = 0; j < 2; j++)
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{
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if (j == 0)
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{
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op = op1;
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f = op1->form;
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op = op1->op;
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ins = insn1;
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}
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else
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{
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op = op2;
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f = op2->form;
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op = op2->op;
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ins = insn2;
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}
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mod[j] = used[j] = 0;
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if (op->exec_type & BRANCH_LINK)
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mod[j] |= 1 << 13;
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for (i = 0; op->operands[i]; i++)
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mod_reg[j][0] = mod_reg[j][1] = 0;
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mod_reg[j][2] = op->flags_set;
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used_reg[j][0] = used_reg[j][1] = 0;
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used_reg[j][2] = op->flags_used;
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for (i = 0; f->operands[i]; i++)
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{
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flags = d30v_operands[op->operands[i]].flags;
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shift = d30v_operands[op->operands[i]].shift;
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mask = 0x7FFFFFFF >> (31 - d30v_operands[op->operands[i]].bits);
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flags = d30v_operand_table[f->operands[i]].flags;
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shift = 12 - d30v_operand_table[f->operands[i]].position;
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bits = d30v_operand_table[f->operands[i]].bits;
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if (bits == 32)
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mask = 0xffffffff;
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else
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mask = 0x7FFFFFFF >> (31 - bits);
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if (flags & OPERAND_REG)
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{
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regno = (ins >> shift) & mask;
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if (flags & OPERAND_ACC)
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regno += 16;
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else if (flags & OPERAND_CONTROL) /* mvtc or mvfc */
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{
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if (regno == 0)
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regno = 19;
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else
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regno = 18;
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}
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else if (flags & OPERAND_FLAG)
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regno = 19;
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if ( flags & OPERAND_DEST )
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if (flags & OPERAND_DEST)
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{
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mod[j] |= 1 << regno;
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if (flags & OPERAND_EVEN)
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mod[j] |= 1 << (regno + 1);
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if (flags & OPERAND_ACC)
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mod_reg[j][2] = 1 << (regno+16);
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else if (flags & OPERAND_FLAG)
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mod_reg[j][2] = 1 << regno;
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else if (!(flags & OPERAND_CONTROL))
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{
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if (regno >= 32)
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mod_reg[j][1] = 1 << (regno - 32);
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else
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mod_reg[j][0] = 1 << regno;
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}
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}
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else
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{
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used[j] |= 1 << regno ;
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if (flags & OPERAND_EVEN)
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used[j] |= 1 << (regno + 1);
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if (flags & OPERAND_ACC)
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used_reg[j][2] = 1 << (regno+16);
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else if (flags & OPERAND_FLAG)
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used_reg[j][2] = 1 << regno;
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else if (!(flags & OPERAND_CONTROL))
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{
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if (regno >= 32)
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used_reg[j][1] = 1 << (regno - 32);
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else
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used_reg[j][0] = 1 << regno;
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}
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}
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}
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}
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if (op->exec_type & RMEM)
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used[j] |= 1 << 20;
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else if (op->exec_type & WMEM)
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mod[j] |= 1 << 20;
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else if (op->exec_type & RF0)
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used[j] |= 1 << 19;
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else if (op->exec_type & WF0)
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mod[j] |= 1 << 19;
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else if (op->exec_type & WCAR)
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mod[j] |= 1 << 19;
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}
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if ((mod[0] & mod[1]) == 0 && (mod[0] & used[1]) == 0 && (mod[1] & used[0]) == 0)
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return 1;
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#endif
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return 0;
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for(j = 0; j < 3; j++)
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if ((mod_reg[0][j] & mod_reg[1][j])
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|| (mod_reg[0][j] & used_reg[1][j])
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|| (mod_reg[1][j] & used_reg[0][j]))
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return 0;
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return 1;
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}
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@ -985,8 +936,6 @@ do_assemble (str, opcode)
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expressionS myops[6];
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long long insn;
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if (Optimizing) printf("do_assemble %s\n",str);
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/* Drop leading whitespace */
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while (*str == ' ')
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str++;
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@ -1074,7 +1023,6 @@ do_assemble (str, opcode)
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input_line_pointer = save;
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insn = build_insn (opcode, myops);
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if (Optimizing) printf("insn=%llx\n",insn);
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return (insn);
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}
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@ -1093,8 +1041,6 @@ find_format (opcode, myops, cmp_hack)
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struct d30v_format *fm;
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struct d30v_operand *op;
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if (Optimizing) printf("find_format: %s\n",opcode->name);
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/* get all the operands and save them as expressions */
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numops = get_operands (myops, cmp_hack);
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@ -1112,7 +1058,6 @@ find_format (opcode, myops, cmp_hack)
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int X_op = myops[j].X_op;
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int num = myops[j].X_add_number;
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if (Optimizing) printf("form=%d mod=%d opnum=%d flags=%x X_op=%d num=%d\n",index,fm->modifier,j,flags,X_op,num);
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if ( flags & OPERAND_SPECIAL )
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break;
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else if (X_op == 0)
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@ -1125,7 +1070,6 @@ find_format (opcode, myops, cmp_hack)
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(flags & OPERAND_CONTROL && !(num & OPERAND_CONTROL | num & OPERAND_FLAG)))
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{
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match = 0;
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if (Optimizing) printf("failed 1\n");
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}
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}
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else
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@ -1135,7 +1079,6 @@ find_format (opcode, myops, cmp_hack)
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((flags & OPERAND_ATPAR) && ((X_op != O_absent) || (num != OPERAND_ATPAR))) ||
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((flags & OPERAND_ATSIGN) && ((X_op != O_absent) || (num != OPERAND_ATSIGN))))
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{
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if (Optimizing) printf("failed 2\n");
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match=0;
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}
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else if (flags & OPERAND_NUM)
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@ -1165,17 +1108,13 @@ find_format (opcode, myops, cmp_hack)
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/* and adding our current offset */
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for (value = 0, f = frchain_now->frch_root; f; f = f->fr_next)
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value += f->fr_fix + f->fr_offset;
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if (Optimizing) printf("offset=%d (0x%x) value=%d (0x%x)\n",value,value,
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S_GET_VALUE(myops[j].X_add_symbol),S_GET_VALUE(myops[j].X_add_symbol) );
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if (opcode->reloc_flag == RELOC_PCREL)
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value = S_GET_VALUE(myops[j].X_add_symbol) - value -
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(obstack_next_free(&frchain_now->frch_obstack) - frag_now->fr_literal);
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else
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value = S_GET_VALUE(myops[j].X_add_symbol);
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if (Optimizing) printf("symbol value=%d (0x%x) reloc=%d\n",value,value,opcode->reloc_flag);
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if (check_range (value, d30v_operand_table[fm->operands[j]].bits, flags))
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match = 0;
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if (Optimizing) printf("match=%d\n",match);
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}
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else
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match = 0;
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@ -1207,7 +1146,6 @@ tc_gen_reloc (seg, fixp)
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reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
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reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
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reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
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if (Optimizing) printf("tc_gen_reloc: addr=%x howto=%x\n",reloc->address,reloc->howto);
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if (reloc->howto == (reloc_howto_type *) NULL)
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{
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as_bad_where (fixp->fx_file, fixp->fx_line,
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@ -1259,20 +1197,18 @@ md_apply_fix3 (fixp, valuep, seg)
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else if (fixp->fx_pcrel)
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{
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value = *valuep;
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if (Optimizing) printf("value=0x%lx\n",value);
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} else
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}
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else
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{
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value = fixp->fx_offset;
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if (Optimizing) printf("Value=0x%lx\n",value);
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if (fixp->fx_subsy != (symbolS *) NULL)
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{
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if (Optimizing) printf("subsy != NULL\n");
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if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
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value -= S_GET_VALUE (fixp->fx_subsy);
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else
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{
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/* We don't actually support subtracting a symbol. */
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as_bad_where (fixp->fx_file, fixp->fx_line,
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as_bad_where (fixp->fx_file, fixp->fx_line,
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"expression too complex");
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}
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}
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@ -1282,42 +1218,35 @@ md_apply_fix3 (fixp, valuep, seg)
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value, and stuff the instruction back again. */
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where = fixp->fx_frag->fr_literal + fixp->fx_where;
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insn = bfd_getb32 ((unsigned char *) where);
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if (Optimizing) printf("md_apply_fix3: type=%ld where=%lx insn=%lx value=%lx\n",fixp->fx_r_type,where,insn,value);
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switch (fixp->fx_r_type)
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{
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case BFD_RELOC_D30V_6:
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if (Optimizing) printf("BFD_RELOC_D30V_6\n");
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insn |= value & 0x3F;
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bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
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break;
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case BFD_RELOC_D30V_15:
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if (Optimizing) printf("BFD_RELOC_D30V_15\n");
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insn |= (value >> 3) & 0xFFF;
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bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
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break;
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case BFD_RELOC_D30V_15_PCREL:
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if ((long)fixp->fx_where & 0x7)
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value += 4;
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if (Optimizing) printf("BFD_RELOC_D30V_15_PCREL\n");
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insn |= (value >> 3) & 0xFFF;
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bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
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break;
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case BFD_RELOC_D30V_21:
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if (Optimizing) printf("BFD_RELOC_D30V_21\n");
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insn |= (value >> 3) & 0x3FFFF;
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bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
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break;
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case BFD_RELOC_D30V_21_PCREL:
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if ((long)fixp->fx_where & 0x7)
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value += 4;
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if (Optimizing) printf("BFD_RELOC_D30V_21_PCREL: insn=%lx value=%lx\n",insn,(long)value);
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insn |= (value >> 3) & 0x3FFFF;
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bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
|
||||
break;
|
||||
case BFD_RELOC_D30V_32:
|
||||
insn2 = bfd_getb32 ((unsigned char *) where + 4);
|
||||
if (Optimizing) printf("BFD_RELOC_D30V_32: insn=0x%08x%08x\n",(int)insn,(int)insn2);
|
||||
insn |= (value >> 26) & 0x3F; /* top 6 bits */
|
||||
insn2 |= ((value & 0x03FC0000) << 2); /* next 8 bits */
|
||||
insn2 |= value & 0x0003FFFF; /* bottom 18 bits */
|
||||
|
|
@ -1328,7 +1257,6 @@ md_apply_fix3 (fixp, valuep, seg)
|
|||
if ((long)fixp->fx_where & 0x7)
|
||||
value += 4;
|
||||
insn2 = bfd_getb32 ((unsigned char *) where + 4);
|
||||
if (Optimizing) printf("BFD_RELOC_D30V_32_PCREL: insn=0x%08x%08x\n",(int)insn,(int)insn2);
|
||||
insn |= (value >> 26) & 0x3F; /* top 6 bits */
|
||||
insn2 |= ((value & 0x03FC0000) << 2); /* next 8 bits */
|
||||
insn2 |= value & 0x0003FFFF; /* bottom 18 bits */
|
||||
|
|
@ -1336,7 +1264,6 @@ md_apply_fix3 (fixp, valuep, seg)
|
|||
bfd_putb32 ((bfd_vma) insn2, (unsigned char *) where + 4);
|
||||
break;
|
||||
case BFD_RELOC_32:
|
||||
if (Optimizing) printf("BFD_RELOC_32: insn=0x%08x value=0x%x\n",(int)insn,(int)value);
|
||||
bfd_putb32 ((bfd_vma) value, (unsigned char *) where);
|
||||
break;
|
||||
default:
|
||||
|
|
|
|||
Loading…
Reference in New Issue