* mep-tdep.c (IS_BRA, BRA_DISP): New macros.

(mep_analyze_prologue): Add case for BRA instruction.
This commit is contained in:
Kevin Buettner 2007-07-13 00:00:15 +00:00
parent 44139f2d0c
commit 1ba3e7a3e6
2 changed files with 22 additions and 0 deletions

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@ -1,3 +1,8 @@
2007-07-12 Kevin Buettner <kevinb@redhat.com>
* mep-tdep.c (IS_BRA, BRA_DISP): New macros.
(mep_analyze_prologue): Add case for BRA instruction.
2007-07-12 Ulrich Weigand <uweigand@de.ibm.com>
* solib-svr4.c (LM_ADDR_CHECK): Relax prelink recognition heuristic.

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@ -1578,6 +1578,10 @@ mep_get_insn (CORE_ADDR pc, long *insn)
#define MOV_TARGET(i) (FIELD (i, 24, 4))
#define MOV_SOURCE(i) (FIELD (i, 20, 4))
/* BRA disp12.align2 1011_dddd_dddd_ddd0 xxxx_xxxx_xxxx_xxxx */
#define IS_BRA(i) (((i) & 0xf0010000) == 0xb0000000)
#define BRA_DISP(i) (SFIELD (i, 17, 11) << 1)
/* This structure holds the results of a prologue analysis. */
struct mep_prologue
@ -1806,6 +1810,19 @@ mep_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
reg[rn] = pv_area_fetch (stack, addr, 4);
}
else if (IS_BRA (insn) && BRA_DISP (insn) > 0)
{
/* When a loop appears as the first statement as a function
body, gcc 4.x will use a BRA instruction to branch to the
loop condition checking code. This BRA instruction is
marked as part of the prologue. We therefore set next_pc
to this branch target and also stop the prologue scan.
The instructions at and beyond the branch target should
no longer be associated with the prologue. */
next_pc = pc + BRA_DISP (insn);
after_last_frame_setup_insn = next_pc;
break;
}
else
/* We've hit some instruction we don't know how to simulate.
Strictly speaking, we should set every value we're