* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
	prototype.
	* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
	(bfd_elf32_get_synthetic_symtab): New macro.
	* elfxx-mips.c (plt_entry): New structure.
	(mips_elf_link_hash_entry): Add use_plt_entry member.
	(mips_elf_link_hash_table): Rename plt_entry_size member to
	plt_mips_entry_size.  Add plt_comp_entry_size, plt_mips_offset,
	plt_comp_offset, plt_got_index entries and plt_header_is_comp
	members.
	(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
	(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
	(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
	(STUB_LI16S_MICROMIPS): Likewise.
	(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
	(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
	(micromips_o32_exec_plt0_entry): New variable.
	(mips16_o32_exec_plt_entry): Likewise.
	(micromips_o32_exec_plt_entry): Likewise.
	(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
	(mips_elf_output_extsym): Update to use gotplt_union's plist
	member rather than offset.
	(mips_elf_gotplt_index): Likewise.  Remove the VxWorks
	restriction.  Use MIPS_ELF_GOT_SIZE to calculate GOT address.
	(mips_elf_count_got_symbols): Update to use gotplt_union's plist
	member rather than offset.
	(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
	entries.
	(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
	here.
	(mips_elf_make_plt_record): New function.
	(_bfd_mips_elf_check_relocs): Update comment.  Record occurences
	of JAL relocations that might need a PLT entry.
	(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
	gotplt_union's plist member rather than offset.  Set individual
	PLT entry sizes here.  Handle MIPS16/microMIPS PLT entries.
	Don't set the symbol's value in the symbol table for PLT
	references here.  Don't set the PLT or PLT GOT section sizes
	here.
	(mips_elf_estimate_stub_size): Handle microMIPS stubs.
	(mips_elf_allocate_lazy_stub): Likewise.
	(mips_elf_lay_out_lazy_stubs): Likewise.  Define a _MIPS_STUBS_
	magic symbol.
	(mips_elf_set_plt_sym_value): New function.
	(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
	PLT and PLT GOT section sizes here.  Set the symbol values in
	the symbol table for PLT references here.  Handle microMIPS
	annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
	(_bfd_mips_elf_finish_dynamic_symbol): Update to use
	gotplt_union's plist member rather than offset.  Handle
	MIPS16/microMIPS PLT entries.  Handle microMIPS stubs.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
	gotplt_union's plist member rather than offset.  Use
	MIPS_ELF_GOT_SIZE to calculate GOT address.
	(mips_finish_exec_plt): Handle microMIPS PLT.  Return status.
	(_bfd_mips_elf_finish_dynamic_sections): Handle result from
	mips_finish_exec_plt.
	(_bfd_mips_elf_link_hash_table_create): Update to use
	gotplt_union's plist member rather than offset.
	(_bfd_mips_elf_get_synthetic_symtab): New function.

	include/elf/
	* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
	(ELF_ST_SET_MIPS_PLT): Likewise.

	gdb/
	* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
	microMIPS synthetic symbols.

	ld/
	* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
	as close to .plt as possible.
	* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
	$PLT_NEXT_DATA variables.

	ld/testsuite/
	* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
	* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
	magic symbol.
	* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
	* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
	* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
	* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
	* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
	* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
	* ld-mips-elf/tlslib-o32.d: Likewise.

	opcodes/
	* mips-dis.c (is_mips16_plt_tail): New function.
	(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
	word.
	(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
This commit is contained in:
Maciej W. Rozycki 2013-06-24 23:55:46 +00:00
parent b652c496ac
commit 1bbce13264
26 changed files with 1173 additions and 243 deletions

View File

@ -1,3 +1,66 @@
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
2013-06-24 Wawa <caojinyu@msn.com> 2013-06-24 Wawa <caojinyu@msn.com>
PR 15657 PR 15657

View File

@ -2366,7 +2366,6 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = {
#define elf_backend_default_use_rela_p 0 #define elf_backend_default_use_rela_p 0
#define elf_backend_sign_extend_vma TRUE #define elf_backend_sign_extend_vma TRUE
#define elf_backend_plt_readonly 1 #define elf_backend_plt_readonly 1
#define elf_backend_plt_sym_val _bfd_mips_elf_plt_sym_val
#define elf_backend_discard_info _bfd_mips_elf_discard_info #define elf_backend_discard_info _bfd_mips_elf_discard_info
#define elf_backend_ignore_discarded_relocs \ #define elf_backend_ignore_discarded_relocs \
@ -2378,6 +2377,7 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = {
mips_elf_is_local_label_name mips_elf_is_local_label_name
#define bfd_elf32_bfd_is_target_special_symbol \ #define bfd_elf32_bfd_is_target_special_symbol \
_bfd_mips_elf_is_target_special_symbol _bfd_mips_elf_is_target_special_symbol
#define bfd_elf32_get_synthetic_symtab _bfd_mips_elf_get_synthetic_symtab
#define bfd_elf32_find_nearest_line _bfd_mips_elf_find_nearest_line #define bfd_elf32_find_nearest_line _bfd_mips_elf_find_nearest_line
#define bfd_elf32_find_inliner_info _bfd_mips_elf_find_inliner_info #define bfd_elf32_find_inliner_info _bfd_mips_elf_find_inliner_info
#define bfd_elf32_new_section_hook _bfd_mips_elf_new_section_hook #define bfd_elf32_new_section_hook _bfd_mips_elf_new_section_hook
@ -2505,7 +2505,6 @@ mips_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
#define elf_backend_default_use_rela_p 1 #define elf_backend_default_use_rela_p 1
#undef elf_backend_got_header_size #undef elf_backend_got_header_size
#define elf_backend_got_header_size (4 * 3) #define elf_backend_got_header_size (4 * 3)
#undef elf_backend_plt_sym_val
#undef elf_backend_finish_dynamic_symbol #undef elf_backend_finish_dynamic_symbol
#define elf_backend_finish_dynamic_symbol \ #define elf_backend_finish_dynamic_symbol \
@ -2531,4 +2530,6 @@ mips_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
#undef elf_backend_symbol_processing #undef elf_backend_symbol_processing
/* NOTE: elf_backend_rela_normal is not defined for MIPS. */ /* NOTE: elf_backend_rela_normal is not defined for MIPS. */
#undef bfd_elf32_get_synthetic_symtab
#include "elf32-target.h" #include "elf32-target.h"

File diff suppressed because it is too large Load Diff

View File

@ -152,6 +152,8 @@ extern bfd_boolean _bfd_mips_elf_init_stubs
asection *(*) (const char *, asection *, asection *)); asection *(*) (const char *, asection *, asection *));
extern bfd_vma _bfd_mips_elf_plt_sym_val extern bfd_vma _bfd_mips_elf_plt_sym_val
(bfd_vma, const asection *, const arelent *rel); (bfd_vma, const asection *, const arelent *rel);
extern long _bfd_mips_elf_get_synthetic_symtab
(bfd *, long, asymbol **, long, asymbol **, asymbol **);
extern void _bfd_mips_post_process_headers extern void _bfd_mips_post_process_headers
(bfd *abfd, struct bfd_link_info *link_info); (bfd *abfd, struct bfd_link_info *link_info);

View File

@ -1,3 +1,8 @@
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com> 2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
* objfiles.h (pc_in_section): New prototype. * objfiles.h (pc_in_section): New prototype.

View File

@ -343,8 +343,9 @@ make_compact_addr (CORE_ADDR addr)
"special", i.e. refers to a MIPS16 or microMIPS function, and sets "special", i.e. refers to a MIPS16 or microMIPS function, and sets
one of the "special" bits in a minimal symbol to mark it accordingly. one of the "special" bits in a minimal symbol to mark it accordingly.
The test checks an ELF-private flag that is valid for true function The test checks an ELF-private flag that is valid for true function
symbols only; in particular synthetic symbols such as for PLT stubs symbols only; for synthetic symbols such as for PLT stubs that have
have no ELF-private part at all. no ELF-private part at all the MIPS BFD backend arranges for this
information to be carried in the asymbol's udata field instead.
msymbol_is_mips16 and msymbol_is_micromips test the "special" bit msymbol_is_mips16 and msymbol_is_micromips test the "special" bit
in a minimal symbol. */ in a minimal symbol. */
@ -353,13 +354,18 @@ static void
mips_elf_make_msymbol_special (asymbol * sym, struct minimal_symbol *msym) mips_elf_make_msymbol_special (asymbol * sym, struct minimal_symbol *msym)
{ {
elf_symbol_type *elfsym = (elf_symbol_type *) sym; elf_symbol_type *elfsym = (elf_symbol_type *) sym;
unsigned char st_other;
if ((sym->flags & BSF_SYNTHETIC) != 0) if ((sym->flags & BSF_SYNTHETIC) == 0)
st_other = elfsym->internal_elf_sym.st_other;
else if ((sym->flags & BSF_FUNCTION) != 0)
st_other = sym->udata.i;
else
return; return;
if (ELF_ST_IS_MICROMIPS (elfsym->internal_elf_sym.st_other)) if (ELF_ST_IS_MICROMIPS (st_other))
MSYMBOL_TARGET_FLAG_2 (msym) = 1; MSYMBOL_TARGET_FLAG_2 (msym) = 1;
else if (ELF_ST_IS_MIPS16 (elfsym->internal_elf_sym.st_other)) else if (ELF_ST_IS_MIPS16 (st_other))
MSYMBOL_TARGET_FLAG_1 (msym) = 1; MSYMBOL_TARGET_FLAG_1 (msym) = 1;
} }

View File

@ -1,3 +1,8 @@
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
2013-06-19 Will Newton <will.newton@linaro.org> 2013-06-19 Will Newton <will.newton@linaro.org>
* aarch64.h: Remove R_AARCH64_IRELATIVE. * aarch64.h: Remove R_AARCH64_IRELATIVE.

View File

@ -803,8 +803,14 @@ extern void bfd_mips_elf32_swap_reginfo_out
PLT entries and traditional MIPS lazy binding stubs. We mark the former PLT entries and traditional MIPS lazy binding stubs. We mark the former
with STO_MIPS_PLT to distinguish them from the latter. */ with STO_MIPS_PLT to distinguish them from the latter. */
#define STO_MIPS_PLT 0x8 #define STO_MIPS_PLT 0x8
#define ELF_ST_IS_MIPS_PLT(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PLT) #define ELF_ST_IS_MIPS_PLT(other) \
#define ELF_ST_SET_MIPS_PLT(other) (((other) & ~STO_MIPS_FLAGS) | STO_MIPS_PLT) ((ELF_ST_IS_MIPS16 (other) \
? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \
: ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
#define ELF_ST_SET_MIPS_PLT(other) \
((ELF_ST_IS_MIPS16 (other) \
? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \
: ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
/* This value is used to mark PIC functions in an object that mixes /* This value is used to mark PIC functions in an object that mixes
PIC and non-PIC. Note that this bit overlaps with STO_MIPS16, PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,

View File

@ -1,3 +1,10 @@
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
* Makefile.am (ALL_EMULATION_SOURCES): Move MIPS ELF emulations to... * Makefile.am (ALL_EMULATION_SOURCES): Move MIPS ELF emulations to...

View File

@ -8,3 +8,10 @@ LITTLE_OUTPUT_FORMAT="elf32-tradlittlemips"
unset DATA_ADDR unset DATA_ADDR
SHLIB_TEXT_START_ADDR=0 SHLIB_TEXT_START_ADDR=0
ENTRY=__start ENTRY=__start
# Place .got.plt as close to .plt as possible so that the former can be
# referred to from the latter with the microMIPS ADDIUPC instruction
# that only has a span of +/-16MB.
PLT_NEXT_DATA=
INITIAL_READWRITE_SECTIONS=$OTHER_READWRITE_SECTIONS
unset OTHER_READWRITE_SECTIONS

View File

@ -10,6 +10,7 @@
# OTHER_READONLY_SECTIONS - other than .text .init .rodata ... # OTHER_READONLY_SECTIONS - other than .text .init .rodata ...
# (e.g., .PARISC.milli) # (e.g., .PARISC.milli)
# OTHER_TEXT_SECTIONS - these get put in .text when relocating # OTHER_TEXT_SECTIONS - these get put in .text when relocating
# INITIAL_READWRITE_SECTIONS - at start of data segment (after relro)
# OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ... # OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ...
# (e.g., .PARISC.global) # (e.g., .PARISC.global)
# OTHER_RELRO_SECTIONS - other than .data.rel.ro ... # OTHER_RELRO_SECTIONS - other than .data.rel.ro ...
@ -33,6 +34,7 @@
# OTHER_SDATA_SECTIONS - sections just after .sdata. # OTHER_SDATA_SECTIONS - sections just after .sdata.
# OTHER_BSS_SYMBOLS - symbols that appear at the start of the # OTHER_BSS_SYMBOLS - symbols that appear at the start of the
# .bss section besides __bss_start. # .bss section besides __bss_start.
# PLT_NEXT_DATA - .plt next to data segment when .plt is in text segment.
# DATA_PLT - .plt should be in data segment, not text segment. # DATA_PLT - .plt should be in data segment, not text segment.
# PLT_BEFORE_GOT - .plt just before .got when .plt is in data segement. # PLT_BEFORE_GOT - .plt just before .got when .plt is in data segement.
# BSS_PLT - .plt should be in bss segment # BSS_PLT - .plt should be in bss segment
@ -132,7 +134,7 @@ if test -z "$PLT"; then
PLT=".plt ${RELOCATING-0} : { *(.plt)${IREL_IN_PLT+ *(.iplt)} } PLT=".plt ${RELOCATING-0} : { *(.plt)${IREL_IN_PLT+ *(.iplt)} }
${IREL_IN_PLT-$IPLT}" ${IREL_IN_PLT-$IPLT}"
fi fi
test -n "${DATA_PLT-${BSS_PLT-text}}" && TEXT_PLT=yes test -n "${DATA_PLT-${BSS_PLT-text}}" && TEXT_PLT=
if test -z "$GOT"; then if test -z "$GOT"; then
if test -z "$SEPARATE_GOTPLT"; then if test -z "$SEPARATE_GOTPLT"; then
GOT=".got ${RELOCATING-0} : { *(.got.plt) *(.igot.plt) *(.got) *(.igot) }" GOT=".got ${RELOCATING-0} : { *(.got.plt) *(.igot.plt) *(.got) *(.igot) }"
@ -463,7 +465,7 @@ cat <<EOF
${RELOCATING+${INIT_END}} ${RELOCATING+${INIT_END}}
} ${FILL} } ${FILL}
${TEXT_PLT+${PLT}} ${TEXT_PLT+${PLT_NEXT_DATA-${PLT}}}
${TINY_READONLY_SECTION} ${TINY_READONLY_SECTION}
.text ${RELOCATING-0} : .text ${RELOCATING-0} :
{ {
@ -527,6 +529,7 @@ cat <<EOF
/* These sections are generated by the Sun/Oracle C++ compiler. */ /* These sections are generated by the Sun/Oracle C++ compiler. */
.exception_ranges ${RELOCATING-0} : ONLY_IF_RO { *(.exception_ranges .exception_ranges ${RELOCATING-0} : ONLY_IF_RO { *(.exception_ranges
.exception_ranges*) } .exception_ranges*) }
${TEXT_PLT+${PLT_NEXT_DATA+${PLT}}}
/* Adjust the address for the data segment. We want to adjust up to /* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. */ the same address within the page on the next page up. */
@ -562,6 +565,7 @@ cat <<EOF
${DATA_GOT+${RELRO_NOW+${GOTPLT}}} ${DATA_GOT+${RELRO_NOW+${GOTPLT}}}
${DATA_GOT+${RELRO_NOW-${SEPARATE_GOTPLT+${GOT}}}} ${DATA_GOT+${RELRO_NOW-${SEPARATE_GOTPLT+${GOT}}}}
${RELOCATING+${DATA_SEGMENT_RELRO_END}} ${RELOCATING+${DATA_SEGMENT_RELRO_END}}
${INITIAL_READWRITE_SECTIONS}
${DATA_GOT+${RELRO_NOW-${SEPARATE_GOTPLT-${GOT}}}} ${DATA_GOT+${RELRO_NOW-${SEPARATE_GOTPLT-${GOT}}}}
${DATA_GOT+${RELRO_NOW-${GOTPLT}}} ${DATA_GOT+${RELRO_NOW-${GOTPLT}}}

View File

@ -1,3 +1,19 @@
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
2013-06-19 Will Newton <will.newton@linaro.org> 2013-06-19 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Remove ifunc tests. * ld-aarch64/aarch64-elf.exp: Remove ifunc tests.

View File

@ -28,8 +28,8 @@ Disassembly of section \.text:
4400034: f89e 0020 sw a0,32\(s8\) 4400034: f89e 0020 sw a0,32\(s8\)
4400038: f8be 0024 sw a1,36\(s8\) 4400038: f8be 0024 sw a1,36\(s8\)
440003c: 41a2 0440 lui v0,0x440 440003c: 41a2 0440 lui v0,0x440
4400040: 3082 02a0 addiu a0,v0,672 4400040: 3082 0290 addiu a0,v0,656
4400044: f110 0028 jalx 44000a0 <printf@plt> 4400044: f620 004c jal 4400098 <printf@micromipsplt>
4400048: 0000 0000 nop 4400048: 0000 0000 nop
440004c: f620 0010 jal 4400020 <internal_function> 440004c: f620 0010 jal 4400020 <internal_function>
4400050: 0000 0000 nop 4400050: 0000 0000 nop
@ -44,17 +44,18 @@ Disassembly of section \.text:
Disassembly of section \.plt: Disassembly of section \.plt:
04400080 <_PROCEDURE_LINKAGE_TABLE_>: 04400080 <_PROCEDURE_LINKAGE_TABLE_>:
4400080: 3c1c0440 lui gp,0x440 4400080: 7980 0012 addiu v1,\$pc,72
4400084: 8f9900d8 lw t9,216\(gp\) 4400084: ff23 0000 lw t9,0\(v1\)
4400088: 279c00d8 addiu gp,gp,216 4400088: 0535 subu v0,v0,v1
440008c: 031cc023 subu t8,t8,gp 440008a: 2525 srl v0,v0,2
4400090: 03e07821 move t7,ra 440008c: 3302 fffe addiu t8,v0,-2
4400094: 0018c082 srl t8,t8,0x2 4400090: 0dff move t7,ra
4400098: 0320f809 jalr t9 4400092: 45f9 jalrs t9
440009c: 2718fffe addiu t8,t8,-2 4400094: 0f83 move gp,v1
4400096: 0c00 nop
044000a0 <printf@plt>: 04400098 <printf@micromipsplt>:
44000a0: 3c0f0440 lui t7,0x440 4400098: 7900 000e addiu v0,\$pc,56
44000a4: 8df900e0 lw t9,224\(t7\) 440009c: ff22 0000 lw t9,0\(v0\)
44000a8: 03200008 jr t9 44000a0: 4599 jr t9
44000ac: 25f800e0 addiu t8,t7,224 44000a2: 0f02 move t8,v0

View File

@ -31,7 +31,7 @@ Disassembly of section \.text:
#... #...
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
00000c00 <.MIPS.stubs>: 00000c00 <_MIPS_STUBS_>:
c00: 8f998010 lw t9,-32752\(gp\) c00: 8f998010 lw t9,-32752\(gp\)
c04: 03e07821 move t7,ra c04: 03e07821 move t7,ra
c08: 0320f809 jalr t9 c08: 0320f809 jalr t9

View File

@ -42,9 +42,10 @@ Disassembly of section \.text:
.*: 03200008 jr t9 .*: 03200008 jr t9
.*: 00000000 nop .*: 00000000 nop
.*: 00000000 nop .*: 00000000 nop
Disassembly of section .MIPS.stubs:
00044030 <\.MIPS\.stubs>: Disassembly of section \.MIPS\.stubs:
00044030 <_MIPS_STUBS_>:
.*: 8f998010 lw t9,-32752\(gp\) .*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra .*: 03e07821 move t7,ra
.*: 0320f809 jalr t9 .*: 0320f809 jalr t9

View File

@ -91,9 +91,10 @@ Disassembly of section \.text:
44090: 3c02000a lui v0,0xa 44090: 3c02000a lui v0,0xa
44094: 24422018 addiu v0,v0,8216 44094: 24422018 addiu v0,v0,8216
\.\.\. \.\.\.
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
000440a0 <\.MIPS\.stubs>: 000440a0 <_MIPS_STUBS_>:
440a0: 8f998010 lw t9,-32752\(gp\) 440a0: 8f998010 lw t9,-32752\(gp\)
440a4: 03e07821 move t3,ra 440a4: 03e07821 move t3,ra
440a8: 0320f809 jalr t9 440a8: 0320f809 jalr t9

View File

@ -91,9 +91,10 @@ Disassembly of section \.text:
44090: 3c02000a lui v0,0xa 44090: 3c02000a lui v0,0xa
44094: 24422018 addiu v0,v0,8216 44094: 24422018 addiu v0,v0,8216
\.\.\. \.\.\.
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
0+440a0 <\.MIPS\.stubs>: 0+440a0 <_MIPS_STUBS_>:
440a0: df998010 ld t9,-32752\(gp\) 440a0: df998010 ld t9,-32752\(gp\)
440a4: 03e0782d move t3,ra 440a4: 03e0782d move t3,ra
440a8: 0320f809 jalr t9 440a8: 0320f809 jalr t9

View File

@ -91,9 +91,10 @@ Disassembly of section \.text:
44090: 3c02000a lui v0,0xa 44090: 3c02000a lui v0,0xa
44094: 24422018 addiu v0,v0,8216 44094: 24422018 addiu v0,v0,8216
\.\.\. \.\.\.
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
000440a0 <\.MIPS\.stubs>: 000440a0 <_MIPS_STUBS_>:
440a0: 8f998010 lw t9,-32752\(gp\) 440a0: 8f998010 lw t9,-32752\(gp\)
440a4: 03e07821 move t7,ra 440a4: 03e07821 move t7,ra
440a8: 0320f809 jalr t9 440a8: 0320f809 jalr t9

View File

@ -3,7 +3,7 @@
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
.* <\.MIPS.stubs>: .* <_MIPS_STUBS_>:
.*: 8f998010 lw t9,-32752\(gp\) .*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra .*: 03e07821 move t7,ra
.*: 3c180001 lui t8,0x1 .*: 3c180001 lui t8,0x1

View File

@ -3,7 +3,7 @@
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
.* <\.MIPS.stubs>: .* <_MIPS_STUBS_>:
.*: 8f998010 lw t9,-32752\(gp\) .*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra .*: 03e07821 move t7,ra
.*: 3c180002 lui t8,0x2 .*: 3c180002 lui t8,0x2

View File

@ -3,7 +3,7 @@
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
.* <\.MIPS.stubs>: .* <_MIPS_STUBS_>:
.*: 8f998010 lw t9,-32752\(gp\) .*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra .*: 03e07821 move t7,ra
.*: 0320f809 jalr t9 .*: 0320f809 jalr t9

View File

@ -3,7 +3,7 @@
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
.* <\.MIPS.stubs>: .* <_MIPS_STUBS_>:
.*: 8f998010 lw t9,-32752\(gp\) .*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra .*: 03e07821 move t7,ra
.*: 0320f809 jalr t9 .*: 0320f809 jalr t9

View File

@ -3,7 +3,7 @@
Disassembly of section \.MIPS\.stubs: Disassembly of section \.MIPS\.stubs:
.* <\.MIPS.stubs>: .* <_MIPS_STUBS_>:
.*: 8f998010 lw t9,-32752\(gp\) .*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra .*: 03e07821 move t7,ra
.*: 0320f809 jalr t9 .*: 0320f809 jalr t9

View File

@ -35,9 +35,10 @@ Disassembly of section .text:
.*: 03e00008 jr ra .*: 03e00008 jr ra
.*: 27bd0010 addiu sp,sp,16 .*: 27bd0010 addiu sp,sp,16
... ...
Disassembly of section .MIPS.stubs: Disassembly of section .MIPS.stubs:
.* <.MIPS.stubs>: .* <_MIPS_STUBS_>:
.*: 8f998010 lw t9,-32752\(gp\) .*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra .*: 03e07821 move t7,ra
.*: 0320f809 jalr t9 .*: 0320f809 jalr t9

View File

@ -1,3 +1,10 @@
2013-06-24 Maciej W. Rozycki <macro@codesourcery.com>
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
2013-06-21 DJ Delorie <dj@redhat.com> 2013-06-21 DJ Delorie <dj@redhat.com>
* msp430-decode.opc: New. * msp430-decode.opc: New.

View File

@ -2056,6 +2056,23 @@ print_mips16_insn_arg (char type,
} }
} }
/* Check if the given address is the last word of a MIPS16 PLT entry.
This word is data and depending on the value it may interfere with
disassembly of further PLT entries. We make use of the fact PLT
symbols are marked BSF_SYNTHETIC. */
static bfd_boolean
is_mips16_plt_tail (struct disassemble_info *info, bfd_vma addr)
{
if (info->symbols
&& info->symbols[0]
&& (info->symbols[0]->flags & BSF_SYNTHETIC)
&& addr == bfd_asymbol_value (info->symbols[0]) + 12)
return TRUE;
return FALSE;
}
/* Disassemble mips16 instructions. */ /* Disassemble mips16 instructions. */
static int static int
@ -2063,7 +2080,7 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
{ {
const fprintf_ftype infprintf = info->fprintf_func; const fprintf_ftype infprintf = info->fprintf_func;
int status; int status;
bfd_byte buffer[2]; bfd_byte buffer[4];
int length; int length;
int insn; int insn;
bfd_boolean use_extend; bfd_boolean use_extend;
@ -2076,11 +2093,32 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
info->insn_info_valid = 1; info->insn_info_valid = 1;
info->branch_delay_insns = 0; info->branch_delay_insns = 0;
info->data_size = 0; info->data_size = 0;
info->insn_type = dis_nonbranch;
info->target = 0; info->target = 0;
info->target2 = 0; info->target2 = 0;
status = (*info->read_memory_func) (memaddr, buffer, 2, info); /* Decode PLT entry's GOT slot address word. */
if (is_mips16_plt_tail (info, memaddr))
{
info->insn_type = dis_noninsn;
status = (*info->read_memory_func) (memaddr, buffer, 4, info);
if (status == 0)
{
unsigned int gotslot;
if (info->endian == BFD_ENDIAN_BIG)
gotslot = bfd_getb32 (buffer);
else
gotslot = bfd_getl32 (buffer);
infprintf (is, ".word\t0x%x", gotslot);
return 4;
}
}
else
{
info->insn_type = dis_nonbranch;
status = (*info->read_memory_func) (memaddr, buffer, 2, info);
}
if (status != 0) if (status != 0)
{ {
(*info->memory_error_func) (status, memaddr, info); (*info->memory_error_func) (status, memaddr, info);
@ -2963,27 +3001,26 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
static bfd_boolean static bfd_boolean
is_compressed_mode_p (struct disassemble_info *info) is_compressed_mode_p (struct disassemble_info *info)
{ {
elf_symbol_type *symbol;
int pos;
int i; int i;
int l;
for (i = 0; i < info->num_symbols; i++) for (i = info->symtab_pos, l = i + info->num_symbols; i < l; i++)
{ if (((info->symtab[i])->flags & BSF_SYNTHETIC) != 0
pos = info->symtab_pos + i; && ((!micromips_ase
&& ELF_ST_IS_MIPS16 ((*info->symbols)->udata.i))
if (bfd_asymbol_flavour (info->symtab[pos]) != bfd_target_elf_flavour) || (micromips_ase
continue; && ELF_ST_IS_MICROMIPS ((*info->symbols)->udata.i))))
return 1;
if (info->symtab[pos]->section != info->section) else if (bfd_asymbol_flavour (info->symtab[i]) == bfd_target_elf_flavour
continue; && info->symtab[i]->section == info->section)
{
symbol = (elf_symbol_type *) info->symtab[pos]; elf_symbol_type *symbol = (elf_symbol_type *) info->symtab[i];
if ((!micromips_ase if ((!micromips_ase
&& ELF_ST_IS_MIPS16 (symbol->internal_elf_sym.st_other)) && ELF_ST_IS_MIPS16 (symbol->internal_elf_sym.st_other))
|| (micromips_ase || (micromips_ase
&& ELF_ST_IS_MICROMIPS (symbol->internal_elf_sym.st_other))) && ELF_ST_IS_MICROMIPS (symbol->internal_elf_sym.st_other)))
return 1; return 1;
} }
return 0; return 0;
} }