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[binutils][aarch64] New sve_shift_tsz_bhsd iclass. 

This new iclass encodes the variant by which is the most significant bit
used of bits 23-22:20-19, where those bits are usually part of a
given constant operand.

include/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
	iclass.

opcodes/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

	* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
	sve_shift_tsz_bhsd iclass encode.
	* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
	sve_shift_tsz_bhsd iclass decode.
This commit is contained in:
Matthew Malcomson 2019-05-09 10:29:23 +01:00
parent 3c17238bc9
commit 1be5f94f9c
5 changed files with 25 additions and 0 deletions
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5
include/ChangeLog
View File

@ -1,3 +1,8 @@
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
iclass.
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22

1
include/opcode/aarch64.h
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@ -599,6 +599,7 @@ enum aarch64_insn_class
sve_size_sd2,
sve_size_013,
sve_shift_tsz_hsd,
sve_shift_tsz_bhsd,
testbranch,
cryptosm3,
cryptosm4,

7
opcodes/ChangeLog
View File

@ -1,3 +1,10 @@
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_shift_tsz_bhsd iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_shift_tsz_bhsd iclass decode.
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm-2.c: Regenerated.

1
opcodes/aarch64-asm.c
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@ -1626,6 +1626,7 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
case sve_shift_pred:
case sve_shift_unpred:
case sve_shift_tsz_hsd:
case sve_shift_tsz_bhsd:
/* For indices and shift amounts, the variant is encoded as
part of the immediate. */
break;

11
opcodes/aarch64-dis.c
View File

@ -2832,6 +2832,17 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
variant = i;
break;
case sve_shift_tsz_bhsd:
i = extract_fields (inst->value, 0, 2, FLD_SVE_tszh, FLD_SVE_tszl_19);
if (i == 0)
return FALSE;
while (i != 1)
{
i >>= 1;
variant += 1;
}
break;
case sve_shift_tsz_hsd:
i = extract_fields (inst->value, 0, 2, FLD_SVE_sz, FLD_SVE_tszl_19);
if (i == 0)