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Rename emit_load_store to aarch64_emit_load_store 

Likewise, this patch renames emit_load_store to
aarch64_emit_load_store.

gdb:

2015-10-12  Yao Qi  <yao.qi@linaro.org>

	* arch/aarch64-insn.c (emit_load_store): Rename to ...
	(aarch64_emit_load_store): ... it.  All callers updated.

gdb/gdbserver:

2015-10-12  Yao Qi  <yao.qi@linaro.org>

	* linux-aarch64-low.c: Update all callers as emit_load_store
	is renamed to aarch64_emit_load_store.
This commit is contained in:
Yao Qi 2015-10-12 11:28:39 +01:00
parent e1c587c312
commit 1c2e1515c4
5 changed files with 25 additions and 15 deletions
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5
gdb/ChangeLog
View File

@ -1,3 +1,8 @@
2015-10-12 Yao Qi <yao.qi@linaro.org>
* arch/aarch64-insn.c (emit_load_store): Rename to ...
(aarch64_emit_load_store): ... it. All callers updated.
2015-10-12 Yao Qi <yao.qi@linaro.org>
* arch/aarch64-insn.c (emit_insn): Rename to ...

10
gdb/arch/aarch64-insn.c
View File

@ -342,11 +342,11 @@ aarch64_emit_insn (uint32_t *buf, uint32_t insn)
/* Helper function emitting a load or store instruction. */
int
emit_load_store (uint32_t *buf, uint32_t size,
enum aarch64_opcodes opcode,
struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
aarch64_emit_load_store (uint32_t *buf, uint32_t size,
enum aarch64_opcodes opcode,
struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
uint32_t op;

14
gdb/arch/aarch64-insn.h
View File

@ -269,7 +269,7 @@ void aarch64_relocate_instruction (uint32_t insn,
0 .. 32760 range (12 bits << 3). */
#define emit_ldr(buf, rt, rn, operand) \
emit_load_store (buf, rt.is64 ? 3 : 2, LDR, rt, rn, operand)
aarch64_emit_load_store (buf, rt.is64 ? 3 : 2, LDR, rt, rn, operand)
/* Write a LDRSW instruction into *BUF. The register size is 64-bit.
@ -283,7 +283,7 @@ void aarch64_relocate_instruction (uint32_t insn,
0 .. 16380 range (12 bits << 2). */
#define emit_ldrsw(buf, rt, rn, operand) \
emit_load_store (buf, 3, LDRSW, rt, rn, operand)
aarch64_emit_load_store (buf, 3, LDRSW, rt, rn, operand)
/* Write a TBZ or TBNZ instruction into *BUF.
@ -312,10 +312,10 @@ void aarch64_relocate_instruction (uint32_t insn,
int aarch64_emit_insn (uint32_t *buf, uint32_t insn);
int emit_load_store (uint32_t *buf, uint32_t size,
enum aarch64_opcodes opcode,
struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand);
int aarch64_emit_load_store (uint32_t *buf, uint32_t size,
enum aarch64_opcodes opcode,
struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand);
#endif

5
gdb/gdbserver/ChangeLog
View File

@ -1,3 +1,8 @@
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c: Update all callers as emit_load_store
is renamed to aarch64_emit_load_store.
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c: Update all callers of function renaming

6
gdb/gdbserver/linux-aarch64-low.c
View File

@ -902,7 +902,7 @@ emit_ldrh (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return emit_load_store (buf, 1, LDR, rt, rn, operand);
return aarch64_emit_load_store (buf, 1, LDR, rt, rn, operand);
}
/* Write a LDRB instruction into *BUF.
@ -921,7 +921,7 @@ emit_ldrb (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return emit_load_store (buf, 0, LDR, rt, rn, operand);
return aarch64_emit_load_store (buf, 0, LDR, rt, rn, operand);
}
@ -942,7 +942,7 @@ emit_str (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return emit_load_store (buf, rt.is64 ? 3 : 2, STR, rt, rn, operand);
return aarch64_emit_load_store (buf, rt.is64 ? 3 : 2, STR, rt, rn, operand);
}
/* Helper function emitting an exclusive load or store instruction. */