Update ARC instruction data-base.

gas/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/noargs_a7.d: New file.
	* testsuite/gas/arc/noargs_a7.s: Likewise.
	* testsuite/gas/arc/noargs_hs.d: Likewise.
	* testsuite/gas/arc/noargs_hs.s: Likewise.

opcode/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
This commit is contained in:
Claudiu Zissulescu 2016-04-06 16:47:56 +02:00
parent b99747aeed
commit 1c2e355e48
7 changed files with 80 additions and 0 deletions

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@ -1,3 +1,10 @@
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/noargs_a7.d: New file.
* testsuite/gas/arc/noargs_a7.s: Likewise.
* testsuite/gas/arc/noargs_hs.d: Likewise.
* testsuite/gas/arc/noargs_hs.s: Likewise.
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/textinsn-errors.d: New File.

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@ -0,0 +1,17 @@
#objdump: -d
.*: +file format .*arc.*
Disassembly of section .text:
00000000 <.text>:
0: 246f 003f rtie
4: 216f 003f sleep 0
8: 78e0 nop_s
a: 256f 003f brk
e: 236f 003f sync
12: 226f 003f trap0
16: 7fff brk_s
18: 79e0 unimp_s
1a: 366f 701a rtsc 0,0

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@ -0,0 +1,10 @@
#Test if the following mnemonics are recognized for ARC700
rtie
sleep
nop_s
brk
sync
trap0
brk_s
unimp_s
rtsc

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@ -0,0 +1,22 @@
#as: -mcpu=archs
#objdump: -d
.*: +file format .*arc.*
Disassembly of section .text:
00000000 <.text>:
0: 226f 003f swi
4: 7ae0 swi_s
6: 276f 003f clri 0
a: 266f 003f seti 0
e: 246f 003f rtie
12: 216f 003f sleep 0
16: 226f 103f dsync
1a: 264a 7000 mov 0,0
1e: 78e0 nop_s
20: 256f 003f brk
24: 236f 003f sync
28: 7fff brk_s
2a: 79e0 unimp_s

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@ -0,0 +1,14 @@
#Test if the following mnemonics are recognized for ARC HS
swi
swi_s
clri
seti
rtie
sleep
dsync
nop
nop_s
brk
sync
brk_s
unimp_s

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@ -1,3 +1,7 @@
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* arc-tbl.h: Add rtsc, sleep with no arguments.
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):

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@ -13794,6 +13794,9 @@
/* rtsc 0,limm 0011011000101111R111111110011010. */
{ "rtsc", 0x362F7F9A, 0xFFFF7FFF, ARC_OPCODE_ARC700, CONTROL, NONE, { ZA, LIMM }, { 0 }},
/* rtsc 0011011001101111R111000000011010. */
{ "rtsc", 0x366F701A, 0xFFFF7FFF, ARC_OPCODE_ARC700, CONTROL, NONE, { 0 }, { 0 }},
/* sat16<.f> b,c 00101bbb00101111FBBBCCCCCC000010. */
{ "sat16", 0x282F0002, 0xF8FF003F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700, ARITH, NONE, { RB, RC }, { C_F }},
@ -14625,6 +14628,9 @@
/* sleep limm 00100001001011110000111110111111. */
{ "sleep", 0x212F0FBF, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { LIMM }, { 0 }},
/* sleep 00100001011011110000uuuuuu111111. */
{ "sleep", 0x216F003F, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { 0 }, { 0 }},
/* sqrtacc c 00101010001011110000CCCCCC111111. */
{ "sqrtacc", 0x2A2F003F, 0xFFFFF03F, ARC_OPCODE_ARCv2EM, DSP, NONE, { RC }, { 0 }},