Allow VL=1 on scalar FMA instructions.

gas/testsuite/

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/fma-scalar-intel.d: New.
	* gas/i386/fma-scalar.d: Likewise.
	* gas/i386/fma-scalar.s: Likewise.
	* gas/i386/x86-64-fma-scalar-intel.d: Likewise.
	* gas/i386/x86-64-fma-scalar.d: Likewise.
	* gas/i386/x86-64-fma-scalar.s: Likewise.

	* gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel,
	x86-64-fma-scalar and x86-64-fma-scalar-intel.

opcodes/

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXVexWdqScalar): New.
	(vex_scalar_w_dq_mode): Likewise.
	(prefix_table): Update entries for PREFIX_VEX_3899,
	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	(OP_EX): Likewise.
This commit is contained in:
H.J. Lu 2010-01-28 15:33:23 +00:00
parent 70ecb3842d
commit 1c4809636b
10 changed files with 842 additions and 13 deletions

View File

@ -1,3 +1,15 @@
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/fma-scalar-intel.d: New.
* gas/i386/fma-scalar.d: Likewise.
* gas/i386/fma-scalar.s: Likewise.
* gas/i386/x86-64-fma-scalar-intel.d: Likewise.
* gas/i386/x86-64-fma-scalar.d: Likewise.
* gas/i386/x86-64-fma-scalar.s: Likewise.
* gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel,
x86-64-fma-scalar and x86-64-fma-scalar-intel.
2010-01-28 Nick Clifton <nickc@redhat.com> 2010-01-28 Nick Clifton <nickc@redhat.com>
PR 11225 PR 11225

View File

@ -0,0 +1,132 @@
#as: -mavxscalar=256
#objdump: -dwMintel
#name: i386 FMA scalar insns (Intel disassembly)
#source: fma-scalar.s
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd xmm2,xmm6,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss xmm2,xmm6,DWORD PTR \[ecx\]
#pass

View File

@ -0,0 +1,131 @@
#as: -mavxscalar=256
#objdump: -dw
#name: i386 FMA scalar insns
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss \(%ecx\),%xmm6,%xmm2
#pass

View File

@ -0,0 +1,135 @@
# Check AVX scalar instructions
.allow_index_reg
.text
_start:
# Tests for op xmm/mem64, xmm, xmm
vfmadd132sd %xmm4,%xmm6,%xmm2
vfmadd132sd (%ecx),%xmm6,%xmm2
vfmadd213sd %xmm4,%xmm6,%xmm2
vfmadd213sd (%ecx),%xmm6,%xmm2
vfmadd231sd %xmm4,%xmm6,%xmm2
vfmadd231sd (%ecx),%xmm6,%xmm2
vfmsub132sd %xmm4,%xmm6,%xmm2
vfmsub132sd (%ecx),%xmm6,%xmm2
vfmsub213sd %xmm4,%xmm6,%xmm2
vfmsub213sd (%ecx),%xmm6,%xmm2
vfmsub231sd %xmm4,%xmm6,%xmm2
vfmsub231sd (%ecx),%xmm6,%xmm2
vfnmadd132sd %xmm4,%xmm6,%xmm2
vfnmadd132sd (%ecx),%xmm6,%xmm2
vfnmadd213sd %xmm4,%xmm6,%xmm2
vfnmadd213sd (%ecx),%xmm6,%xmm2
vfnmadd231sd %xmm4,%xmm6,%xmm2
vfnmadd231sd (%ecx),%xmm6,%xmm2
vfnmsub132sd %xmm4,%xmm6,%xmm2
vfnmsub132sd (%ecx),%xmm6,%xmm2
vfnmsub213sd %xmm4,%xmm6,%xmm2
vfnmsub213sd (%ecx),%xmm6,%xmm2
vfnmsub231sd %xmm4,%xmm6,%xmm2
vfnmsub231sd (%ecx),%xmm6,%xmm2
# Tests for op xmm/mem32, xmm, xmm
vfmadd132ss %xmm4,%xmm6,%xmm2
vfmadd132ss (%ecx),%xmm6,%xmm2
vfmadd213ss %xmm4,%xmm6,%xmm2
vfmadd213ss (%ecx),%xmm6,%xmm2
vfmadd231ss %xmm4,%xmm6,%xmm2
vfmadd231ss (%ecx),%xmm6,%xmm2
vfmsub132ss %xmm4,%xmm6,%xmm2
vfmsub132ss (%ecx),%xmm6,%xmm2
vfmsub213ss %xmm4,%xmm6,%xmm2
vfmsub213ss (%ecx),%xmm6,%xmm2
vfmsub231ss %xmm4,%xmm6,%xmm2
vfmsub231ss (%ecx),%xmm6,%xmm2
vfnmadd132ss %xmm4,%xmm6,%xmm2
vfnmadd132ss (%ecx),%xmm6,%xmm2
vfnmadd213ss %xmm4,%xmm6,%xmm2
vfnmadd213ss (%ecx),%xmm6,%xmm2
vfnmadd231ss %xmm4,%xmm6,%xmm2
vfnmadd231ss (%ecx),%xmm6,%xmm2
vfnmsub132ss %xmm4,%xmm6,%xmm2
vfnmsub132ss (%ecx),%xmm6,%xmm2
vfnmsub213ss %xmm4,%xmm6,%xmm2
vfnmsub213ss (%ecx),%xmm6,%xmm2
vfnmsub231ss %xmm4,%xmm6,%xmm2
vfnmsub231ss (%ecx),%xmm6,%xmm2
.intel_syntax noprefix
# Tests for op xmm/mem64, xmm, xmm
vfmadd132sd xmm2,xmm6,xmm4
vfmadd132sd xmm2,xmm6,QWORD PTR [ecx]
vfmadd132sd xmm2,xmm6,[ecx]
vfmadd213sd xmm2,xmm6,xmm4
vfmadd213sd xmm2,xmm6,QWORD PTR [ecx]
vfmadd213sd xmm2,xmm6,[ecx]
vfmadd231sd xmm2,xmm6,xmm4
vfmadd231sd xmm2,xmm6,QWORD PTR [ecx]
vfmadd231sd xmm2,xmm6,[ecx]
vfmsub132sd xmm2,xmm6,xmm4
vfmsub132sd xmm2,xmm6,QWORD PTR [ecx]
vfmsub132sd xmm2,xmm6,[ecx]
vfmsub213sd xmm2,xmm6,xmm4
vfmsub213sd xmm2,xmm6,QWORD PTR [ecx]
vfmsub213sd xmm2,xmm6,[ecx]
vfmsub231sd xmm2,xmm6,xmm4
vfmsub231sd xmm2,xmm6,QWORD PTR [ecx]
vfmsub231sd xmm2,xmm6,[ecx]
vfnmadd132sd xmm2,xmm6,xmm4
vfnmadd132sd xmm2,xmm6,QWORD PTR [ecx]
vfnmadd132sd xmm2,xmm6,[ecx]
vfnmadd213sd xmm2,xmm6,xmm4
vfnmadd213sd xmm2,xmm6,QWORD PTR [ecx]
vfnmadd213sd xmm2,xmm6,[ecx]
vfnmadd231sd xmm2,xmm6,xmm4
vfnmadd231sd xmm2,xmm6,QWORD PTR [ecx]
vfnmadd231sd xmm2,xmm6,[ecx]
vfnmsub132sd xmm2,xmm6,xmm4
vfnmsub132sd xmm2,xmm6,QWORD PTR [ecx]
vfnmsub132sd xmm2,xmm6,[ecx]
vfnmsub213sd xmm2,xmm6,xmm4
vfnmsub213sd xmm2,xmm6,QWORD PTR [ecx]
vfnmsub213sd xmm2,xmm6,[ecx]
vfnmsub231sd xmm2,xmm6,xmm4
vfnmsub231sd xmm2,xmm6,QWORD PTR [ecx]
vfnmsub231sd xmm2,xmm6,[ecx]
# Tests for op xmm/mem32, xmm, xmm
vfmadd132ss xmm2,xmm6,xmm4
vfmadd132ss xmm2,xmm6,DWORD PTR [ecx]
vfmadd132ss xmm2,xmm6,[ecx]
vfmadd213ss xmm2,xmm6,xmm4
vfmadd213ss xmm2,xmm6,DWORD PTR [ecx]
vfmadd213ss xmm2,xmm6,[ecx]
vfmadd231ss xmm2,xmm6,xmm4
vfmadd231ss xmm2,xmm6,DWORD PTR [ecx]
vfmadd231ss xmm2,xmm6,[ecx]
vfmsub132ss xmm2,xmm6,xmm4
vfmsub132ss xmm2,xmm6,DWORD PTR [ecx]
vfmsub132ss xmm2,xmm6,[ecx]
vfmsub213ss xmm2,xmm6,xmm4
vfmsub213ss xmm2,xmm6,DWORD PTR [ecx]
vfmsub213ss xmm2,xmm6,[ecx]
vfmsub231ss xmm2,xmm6,xmm4
vfmsub231ss xmm2,xmm6,DWORD PTR [ecx]
vfmsub231ss xmm2,xmm6,[ecx]
vfnmadd132ss xmm2,xmm6,xmm4
vfnmadd132ss xmm2,xmm6,DWORD PTR [ecx]
vfnmadd132ss xmm2,xmm6,[ecx]
vfnmadd213ss xmm2,xmm6,xmm4
vfnmadd213ss xmm2,xmm6,DWORD PTR [ecx]
vfnmadd213ss xmm2,xmm6,[ecx]
vfnmadd231ss xmm2,xmm6,xmm4
vfnmadd231ss xmm2,xmm6,DWORD PTR [ecx]
vfnmadd231ss xmm2,xmm6,[ecx]
vfnmsub132ss xmm2,xmm6,xmm4
vfnmsub132ss xmm2,xmm6,DWORD PTR [ecx]
vfnmsub132ss xmm2,xmm6,[ecx]
vfnmsub213ss xmm2,xmm6,xmm4
vfnmsub213ss xmm2,xmm6,DWORD PTR [ecx]
vfnmsub213ss xmm2,xmm6,[ecx]
vfnmsub231ss xmm2,xmm6,xmm4
vfnmsub231ss xmm2,xmm6,DWORD PTR [ecx]
vfnmsub231ss xmm2,xmm6,[ecx]

View File

@ -163,6 +163,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "sse2avx-opts-intel" run_dump_test "sse2avx-opts-intel"
run_dump_test "fma" run_dump_test "fma"
run_dump_test "fma-intel" run_dump_test "fma-intel"
run_dump_test "fma-scalar"
run_dump_test "fma-scalar-intel"
run_dump_test "fma4" run_dump_test "fma4"
run_dump_test "lwp" run_dump_test "lwp"
run_dump_test "xop" run_dump_test "xop"
@ -343,6 +345,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-avx-swap-intel" run_dump_test "x86-64-avx-swap-intel"
run_dump_test "x86-64-fma" run_dump_test "x86-64-fma"
run_dump_test "x86-64-fma-intel" run_dump_test "x86-64-fma-intel"
run_dump_test "x86-64-fma-scalar"
run_dump_test "x86-64-fma-scalar-intel"
run_dump_test "x86-64-fma4" run_dump_test "x86-64-fma4"
run_dump_test "x86-64-lwp" run_dump_test "x86-64-lwp"
run_dump_test "x86-64-xop" run_dump_test "x86-64-xop"

View File

@ -0,0 +1,132 @@
#as: -mavxscalar=256
#objdump: -dwMintel
#name: x86-64 FMA scalar insns (Intel disassembly)
#source: x86-64-fma-scalar.s
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
#pass

View File

@ -0,0 +1,131 @@
#as: -mavxscalar=256
#objdump: -dw
#name: x86-64 FMA scalar insns
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 d4 vfmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 99 11 vfmadd132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 d4 vfmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd b9 11 vfmadd231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b d4 vfmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9b 11 vfmsub132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab d4 vfmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ab 11 vfmsub213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb d4 vfmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bb 11 vfmsub231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d d4 vfnmadd132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9d 11 vfnmadd132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad d4 vfnmadd213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd ad 11 vfnmadd213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd d4 vfnmadd231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bd 11 vfnmadd231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f d4 vfnmsub132sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd 9f 11 vfnmsub132sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af d4 vfnmsub213sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd af 11 vfnmsub213sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf d4 vfnmsub231sd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 cd bf 11 vfnmsub231sd \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 d4 vfmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 99 11 vfmadd132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 d4 vfmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d b9 11 vfmadd231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b d4 vfmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9b 11 vfmsub132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab d4 vfmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ab 11 vfmsub213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb d4 vfmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bb 11 vfmsub231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d d4 vfnmadd132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9d 11 vfnmadd132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad d4 vfnmadd213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d ad 11 vfnmadd213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd d4 vfnmadd231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bd 11 vfnmadd231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f d4 vfnmsub132ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d 9f 11 vfnmsub132ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af d4 vfnmsub213ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d af 11 vfnmsub213ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf d4 vfnmsub231ss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 4d bf 11 vfnmsub231ss \(%rcx\),%xmm6,%xmm2
#pass

View File

@ -0,0 +1,135 @@
# Check 64bit AVX scalar instructions
.allow_index_reg
.text
_start:
# Tests for op xmm/mem64, xmm, xmm
vfmadd132sd %xmm4,%xmm6,%xmm2
vfmadd132sd (%rcx),%xmm6,%xmm2
vfmadd213sd %xmm4,%xmm6,%xmm2
vfmadd213sd (%rcx),%xmm6,%xmm2
vfmadd231sd %xmm4,%xmm6,%xmm2
vfmadd231sd (%rcx),%xmm6,%xmm2
vfmsub132sd %xmm4,%xmm6,%xmm2
vfmsub132sd (%rcx),%xmm6,%xmm2
vfmsub213sd %xmm4,%xmm6,%xmm2
vfmsub213sd (%rcx),%xmm6,%xmm2
vfmsub231sd %xmm4,%xmm6,%xmm2
vfmsub231sd (%rcx),%xmm6,%xmm2
vfnmadd132sd %xmm4,%xmm6,%xmm2
vfnmadd132sd (%rcx),%xmm6,%xmm2
vfnmadd213sd %xmm4,%xmm6,%xmm2
vfnmadd213sd (%rcx),%xmm6,%xmm2
vfnmadd231sd %xmm4,%xmm6,%xmm2
vfnmadd231sd (%rcx),%xmm6,%xmm2
vfnmsub132sd %xmm4,%xmm6,%xmm2
vfnmsub132sd (%rcx),%xmm6,%xmm2
vfnmsub213sd %xmm4,%xmm6,%xmm2
vfnmsub213sd (%rcx),%xmm6,%xmm2
vfnmsub231sd %xmm4,%xmm6,%xmm2
vfnmsub231sd (%rcx),%xmm6,%xmm2
# Tests for op xmm/mem32, xmm, xmm
vfmadd132ss %xmm4,%xmm6,%xmm2
vfmadd132ss (%rcx),%xmm6,%xmm2
vfmadd213ss %xmm4,%xmm6,%xmm2
vfmadd213ss (%rcx),%xmm6,%xmm2
vfmadd231ss %xmm4,%xmm6,%xmm2
vfmadd231ss (%rcx),%xmm6,%xmm2
vfmsub132ss %xmm4,%xmm6,%xmm2
vfmsub132ss (%rcx),%xmm6,%xmm2
vfmsub213ss %xmm4,%xmm6,%xmm2
vfmsub213ss (%rcx),%xmm6,%xmm2
vfmsub231ss %xmm4,%xmm6,%xmm2
vfmsub231ss (%rcx),%xmm6,%xmm2
vfnmadd132ss %xmm4,%xmm6,%xmm2
vfnmadd132ss (%rcx),%xmm6,%xmm2
vfnmadd213ss %xmm4,%xmm6,%xmm2
vfnmadd213ss (%rcx),%xmm6,%xmm2
vfnmadd231ss %xmm4,%xmm6,%xmm2
vfnmadd231ss (%rcx),%xmm6,%xmm2
vfnmsub132ss %xmm4,%xmm6,%xmm2
vfnmsub132ss (%rcx),%xmm6,%xmm2
vfnmsub213ss %xmm4,%xmm6,%xmm2
vfnmsub213ss (%rcx),%xmm6,%xmm2
vfnmsub231ss %xmm4,%xmm6,%xmm2
vfnmsub231ss (%rcx),%xmm6,%xmm2
.intel_syntax noprefix
# Tests for op xmm/mem64, xmm, xmm
vfmadd132sd xmm2,xmm6,xmm4
vfmadd132sd xmm2,xmm6,QWORD PTR [rcx]
vfmadd132sd xmm2,xmm6,[rcx]
vfmadd213sd xmm2,xmm6,xmm4
vfmadd213sd xmm2,xmm6,QWORD PTR [rcx]
vfmadd213sd xmm2,xmm6,[rcx]
vfmadd231sd xmm2,xmm6,xmm4
vfmadd231sd xmm2,xmm6,QWORD PTR [rcx]
vfmadd231sd xmm2,xmm6,[rcx]
vfmsub132sd xmm2,xmm6,xmm4
vfmsub132sd xmm2,xmm6,QWORD PTR [rcx]
vfmsub132sd xmm2,xmm6,[rcx]
vfmsub213sd xmm2,xmm6,xmm4
vfmsub213sd xmm2,xmm6,QWORD PTR [rcx]
vfmsub213sd xmm2,xmm6,[rcx]
vfmsub231sd xmm2,xmm6,xmm4
vfmsub231sd xmm2,xmm6,QWORD PTR [rcx]
vfmsub231sd xmm2,xmm6,[rcx]
vfnmadd132sd xmm2,xmm6,xmm4
vfnmadd132sd xmm2,xmm6,QWORD PTR [rcx]
vfnmadd132sd xmm2,xmm6,[rcx]
vfnmadd213sd xmm2,xmm6,xmm4
vfnmadd213sd xmm2,xmm6,QWORD PTR [rcx]
vfnmadd213sd xmm2,xmm6,[rcx]
vfnmadd231sd xmm2,xmm6,xmm4
vfnmadd231sd xmm2,xmm6,QWORD PTR [rcx]
vfnmadd231sd xmm2,xmm6,[rcx]
vfnmsub132sd xmm2,xmm6,xmm4
vfnmsub132sd xmm2,xmm6,QWORD PTR [rcx]
vfnmsub132sd xmm2,xmm6,[rcx]
vfnmsub213sd xmm2,xmm6,xmm4
vfnmsub213sd xmm2,xmm6,QWORD PTR [rcx]
vfnmsub213sd xmm2,xmm6,[rcx]
vfnmsub231sd xmm2,xmm6,xmm4
vfnmsub231sd xmm2,xmm6,QWORD PTR [rcx]
vfnmsub231sd xmm2,xmm6,[rcx]
# Tests for op xmm/mem32, xmm, xmm
vfmadd132ss xmm2,xmm6,xmm4
vfmadd132ss xmm2,xmm6,DWORD PTR [rcx]
vfmadd132ss xmm2,xmm6,[rcx]
vfmadd213ss xmm2,xmm6,xmm4
vfmadd213ss xmm2,xmm6,DWORD PTR [rcx]
vfmadd213ss xmm2,xmm6,[rcx]
vfmadd231ss xmm2,xmm6,xmm4
vfmadd231ss xmm2,xmm6,DWORD PTR [rcx]
vfmadd231ss xmm2,xmm6,[rcx]
vfmsub132ss xmm2,xmm6,xmm4
vfmsub132ss xmm2,xmm6,DWORD PTR [rcx]
vfmsub132ss xmm2,xmm6,[rcx]
vfmsub213ss xmm2,xmm6,xmm4
vfmsub213ss xmm2,xmm6,DWORD PTR [rcx]
vfmsub213ss xmm2,xmm6,[rcx]
vfmsub231ss xmm2,xmm6,xmm4
vfmsub231ss xmm2,xmm6,DWORD PTR [rcx]
vfmsub231ss xmm2,xmm6,[rcx]
vfnmadd132ss xmm2,xmm6,xmm4
vfnmadd132ss xmm2,xmm6,DWORD PTR [rcx]
vfnmadd132ss xmm2,xmm6,[rcx]
vfnmadd213ss xmm2,xmm6,xmm4
vfnmadd213ss xmm2,xmm6,DWORD PTR [rcx]
vfnmadd213ss xmm2,xmm6,[rcx]
vfnmadd231ss xmm2,xmm6,xmm4
vfnmadd231ss xmm2,xmm6,DWORD PTR [rcx]
vfnmadd231ss xmm2,xmm6,[rcx]
vfnmsub132ss xmm2,xmm6,xmm4
vfnmsub132ss xmm2,xmm6,DWORD PTR [rcx]
vfnmsub132ss xmm2,xmm6,[rcx]
vfnmsub213ss xmm2,xmm6,xmm4
vfnmsub213ss xmm2,xmm6,DWORD PTR [rcx]
vfnmsub213ss xmm2,xmm6,[rcx]
vfnmsub231ss xmm2,xmm6,xmm4
vfnmsub231ss xmm2,xmm6,DWORD PTR [rcx]
vfnmsub231ss xmm2,xmm6,[rcx]

View File

@ -1,3 +1,15 @@
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXVexWdqScalar): New.
(vex_scalar_w_dq_mode): Likewise.
(prefix_table): Update entries for PREFIX_VEX_3899,
PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
PREFIX_VEX_38BD and PREFIX_VEX_38BF.
(intel_operand_size): Handle vex_scalar_w_dq_mode.
(OP_EX): Likewise.
2010-01-27 H.J. Lu <hongjiu.lu@intel.com> 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMScalar): New. * i386-dis.c (XMScalar): New.

View File

@ -354,6 +354,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EXxmmq { OP_EX, xmmq_mode } #define EXxmmq { OP_EX, xmmq_mode }
#define EXymmq { OP_EX, ymmq_mode } #define EXymmq { OP_EX, ymmq_mode }
#define EXVexWdq { OP_EX, vex_w_dq_mode } #define EXVexWdq { OP_EX, vex_w_dq_mode }
#define EXVexWdqScalar { OP_EX, vex_scalar_w_dq_mode }
#define MS { OP_MS, v_mode } #define MS { OP_MS, v_mode }
#define XS { OP_XS, v_mode } #define XS { OP_XS, v_mode }
#define EMCq { OP_EMC, q_mode } #define EMCq { OP_EMC, q_mode }
@ -481,6 +482,8 @@ enum
q_scalar_swap_mode, q_scalar_swap_mode,
/* like vex_mode, ignore vector length. */ /* like vex_mode, ignore vector length. */
vex_scalar_mode, vex_scalar_mode,
/* like vex_w_dq_mode, ignore vector length. */
vex_scalar_w_dq_mode,
es_reg, es_reg,
cs_reg, cs_reg,
@ -4695,7 +4698,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfmadd132s%XW", { XM, Vex, EXVexWdq } }, { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_389A */ /* PREFIX_VEX_389A */
@ -4709,7 +4712,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfmsub132s%XW", { XM, Vex, EXVexWdq } }, { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_389C */ /* PREFIX_VEX_389C */
@ -4723,7 +4726,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfnmadd132s%XW", { XM, Vex, EXVexWdq } }, { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_389E */ /* PREFIX_VEX_389E */
@ -4737,7 +4740,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfnmsub132s%XW", { XM, Vex, EXVexWdq } }, { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38A6 */ /* PREFIX_VEX_38A6 */
@ -4766,7 +4769,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfmadd213s%XW", { XM, Vex, EXVexWdq } }, { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38AA */ /* PREFIX_VEX_38AA */
@ -4780,7 +4783,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfmsub213s%XW", { XM, Vex, EXVexWdq } }, { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38AC */ /* PREFIX_VEX_38AC */
@ -4794,7 +4797,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfnmadd213s%XW", { XM, Vex, EXVexWdq } }, { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38AE */ /* PREFIX_VEX_38AE */
@ -4808,7 +4811,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfnmsub213s%XW", { XM, Vex, EXVexWdq } }, { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38B6 */ /* PREFIX_VEX_38B6 */
@ -4836,7 +4839,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfmadd231s%XW", { XM, Vex, EXVexWdq } }, { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38BA */ /* PREFIX_VEX_38BA */
@ -4850,7 +4853,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfmsub231s%XW", { XM, Vex, EXVexWdq } }, { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38BC */ /* PREFIX_VEX_38BC */
@ -4864,7 +4867,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfnmadd231s%XW", { XM, Vex, EXVexWdq } }, { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38BE */ /* PREFIX_VEX_38BE */
@ -4878,7 +4881,7 @@ static const struct dis386 prefix_table[][4] = {
{ {
{ Bad_Opcode }, { Bad_Opcode },
{ Bad_Opcode }, { Bad_Opcode },
{ "vfnmsub231s%XW", { XM, Vex, EXVexWdq } }, { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } },
}, },
/* PREFIX_VEX_38DB */ /* PREFIX_VEX_38DB */
@ -12776,6 +12779,7 @@ intel_operand_size (int bytemode, int sizeflag)
oappend ("OWORD PTR "); oappend ("OWORD PTR ");
break; break;
case vex_w_dq_mode: case vex_w_dq_mode:
case vex_scalar_w_dq_mode:
if (!need_vex) if (!need_vex)
abort (); abort ();
@ -13969,7 +13973,8 @@ OP_EX (int bytemode, int sizeflag)
&& bytemode != d_scalar_mode && bytemode != d_scalar_mode
&& bytemode != d_scalar_swap_mode && bytemode != d_scalar_swap_mode
&& bytemode != q_scalar_mode && bytemode != q_scalar_mode
&& bytemode != q_scalar_swap_mode) && bytemode != q_scalar_swap_mode
&& bytemode != vex_scalar_w_dq_mode)
{ {
switch (vex.length) switch (vex.length)
{ {