* sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N. * sh-opc.h (sh_arg_type): Add new operand types. (sh_table): Add new opcodes from SH3E Floating Point ISA. sh3e stuff. Sanitized out for now.
This commit is contained in:
parent
db186b3db7
commit
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@ -104,6 +104,27 @@ else
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done
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fi
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sh3e_files="ChangeLog sh-dis.c sh-opc.h"
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if ( echo $* | grep keep\-sh3e > /dev/null ) ; then
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if [ -n "${verbose}" ] ; then
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echo Keeping sh3e stuff in $sh3e_files.
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fi
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else
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if [ -n "${verbose}" ]; then
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echo -n Cleaning sh3e in `pwd`:
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fi
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for f in $sh3e_files ; do
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if [ -n "${verbose}" ] ; then
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echo -n " " $f
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fi
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sed -e '/start\-sanitize\-sh3e/,/end\-sanitize\-sh3e/d' -e '/ xl /d' < $f > new
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if [ -n "${safe}" ] ; then
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mv $f .Recover
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fi
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mv new $f
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done
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fi
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rce_files="configure.in configure"
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if ( echo $* | grep keep\-rce > /dev/null ) ; then
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for i in $rce_files ; do
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@ -1,3 +1,35 @@
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start-sanitize-sh3e
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Mon Aug 7 02:21:40 1995 Jeff Law (law@snake.cs.utah.edu)
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* sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
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F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
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* sh-opc.h (sh_arg_type): Add new operand types.
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(sh_table): Add new opcodes from SH3E Floating Point ISA.
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end-sanitize-sh3e
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Sat Aug 5 16:50:14 1995 Fred Fish <fnf@cygnus.com>
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* Makefile.in (distclean): Remove generated file config.h.
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Sat Aug 5 16:50:14 1995 Fred Fish <fnf@cygnus.com>
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* Makefile.in (distclean): Remove generated file config.h.
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Wed Aug 2 18:33:40 1995 Ian Lance Taylor <ian@cygnus.com>
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* m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
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Clean up tables.
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* m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
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(opcode): Remove.
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(print_insn_m68k): Change d to be const. Use m68k_numopcodes
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rather than numopcodes. Use m68k_opcodes rather than removed
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opcode function. Don't check F_ALIAS.
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(print_insn_arg): Change first parameter to be const char *.
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* Makefile.in (ALL_MACHINES): Add m68k-opc.o.
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(m68k-opc.o): New target.
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* configure.in: Build m68k-opc.o for bfd_m68k_arch.
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* configure: Rebuild.
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Wed Aug 2 08:23:38 1995 Doug Evans <dje@canuck.cygnus.com>
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* sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
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@ -1,3 +1,20 @@
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/* Definitions for SH opcodes.
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Copyright (C) 1993, 1994, 1995 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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typedef enum {
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HEX_0,
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HEX_1,
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@ -30,6 +47,7 @@ typedef enum {
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IMM_8BY2,
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IMM_8BY4
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} sh_nibble_type;
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typedef enum {
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A_END,
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A_BDISP12,
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@ -56,15 +74,26 @@ typedef enum {
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A_REG_M,
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A_REG_N,
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A_SR,
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A_VBR
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A_VBR,
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/* start-sanitize-sh3e */
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F_REG_N,
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F_REG_M,
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FPUL_N,
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FPUL_M,
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FPSCR_N,
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FPSCR_M
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/* end-sanitize-sh3e */
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} sh_arg_type;
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typedef struct {
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char *name;
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sh_arg_type arg[3];
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sh_nibble_type nibbles[4];
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char *name;
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sh_arg_type arg[3];
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sh_nibble_type nibbles[4];
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} sh_opcode_info;
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#ifdef DEFINE_TABLE
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sh_opcode_info sh_table[]={
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sh_opcode_info sh_table[] = {
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/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM_8}},
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@ -150,12 +179,24 @@ sh_opcode_info sh_table[]={
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/* 0100nnnn00101010 lds <REG_N>,PR */{"lds",{A_REG_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_A}},
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/* start-sanitize-sh3e */
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/* 0100nnnn01011010 lds <REG_N>,FPUL */{"lds",{A_REG_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_A}},
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/* 0100nnnn01101010 lds <REG_M>,FPSCR */{"lds",{A_REG_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_A}},
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/* end-sanitize-sh3e
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/* 0100nnnn00000110 lds.l @<REG_N>+,MACH*/{"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}},
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/* 0100nnnn00010110 lds.l @<REG_N>+,MACL*/{"lds.l",{A_INC_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_6}},
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/* 0100nnnn00100110 lds.l @<REG_N>+,PR */{"lds.l",{A_INC_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_6}},
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/* start-sanitize-sh3e */
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/* 0100nnnn01010110 lds.l @<REG_M>+,FPUL*/{"lds.l",{A_INC_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_6}},
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/* 0100nnnn01100110 lds.l @<REG_M>+,FPSCR*/{"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}},
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/* end-sanitize-sh3e */
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/* 0100nnnnmmmm1111 mac.w @<REG_M>+,@<REG_N>+*/{"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}},
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/* 1110nnnni8*1.... mov #<imm>,<REG_N> */{"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}},
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@ -264,11 +305,10 @@ sh_opcode_info sh_table[]={
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/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}},
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/* start-sanitize-sh3 */
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/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}},
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/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}},
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/* end-sanitize-sh3 */
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/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}},
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/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}},
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@ -309,12 +349,24 @@ sh_opcode_info sh_table[]={
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/* 0000nnnn00101010 sts PR,<REG_N> */{"sts",{A_PR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_A}},
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/* start-sanitize-sh3e */
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/* 0100nnnn01011010 sts FPUL,<REG_N> */{"sts",{FPUL_M,A_REG_N},{HEX_4,REG_N,HEX_5,HEX_A}},
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/* 0100nnnn01101010 sts FPSCR,<REG_N> */{"sts",{FPSCR_M,A_REG_N},{HEX_4,REG_N,HEX_6,HEX_A}},
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/* end-sanitize-sh3e */
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/* 0100nnnn00000010 sts.l MACH,@-<REG_N>*/{"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}},
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/* 0100nnnn00010010 sts.l MACL,@-<REG_N>*/{"sts.l",{A_MACL,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_2}},
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/* 0100nnnn00100010 sts.l PR,@-<REG_N> */{"sts.l",{A_PR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_2}},
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/* start-sanitize-sh3e */
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/* 0100nnnn01010110 sts.l FPUL,@-<REG_N>*/{"sts.l",{FPUL_M,A_DEC_M},{HEX_4,REG_N,HEX_5,HEX_6}},
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/* 0100nnnn01100110 sts.l FPSCR,@-<REG_N>*/{"sts.l",{FPSCR_M,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_6}},
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/* end-sanitize-sh3e */
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/* 0011nnnnmmmm1000 sub <REG_M>,<REG_N> */{"sub",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_8}},
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/* 0011nnnnmmmm1010 subc <REG_M>,<REG_N>*/{"subc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_A}},
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@ -354,5 +406,33 @@ sh_opcode_info sh_table[]={
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/* 0000nnnnmmmm1111 mac.l @<REG_M>+,@<REG_N>+*/{"mac.l",{A_INC_M,A_INC_N},{HEX_0,REG_N,REG_M,HEX_F}},
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/* 0000nnnn00100011 braf <REG_N> */{"braf",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_3}},
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/* 0000nnnn00000011 bsrf <REG_N> */{"bsrf",{A_REG_N},{HEX_0,REG_N,HEX_0,HEX_3}},
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0};
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/* start-sanitize-sh3e */
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/* 1111nnnn01011101 fabs <F_REG_N> */{"fabs",{F_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}},
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/* 1111nnnnmmmm0000 fadd <F_REG_M>,<F_REG_N>*/{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
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/* 1111nnnnmmmm0100 fcmp/eq <F_REG_M>,<F_REG_N>*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}},
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/* 1111nnnnmmmm0101 fcmp/gt <F_REG_M>,<F_REG_N>*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}},
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/* 1111nnnnmmmm0011 fdiv <F_REG_M>,<F_REG_N>*/{"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}},
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/* 1111nnnn10001101 fldi0 <F_REG_N> */{"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}},
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/* 1111nnnn10011101 fldi1 <F_REG_N> */{"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}},
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/* 1111nnnn00011101 flds <F_REG_M>,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}},
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/* 1111nnnn00101101 float FPUL,<F_REG_N>*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}},
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/* 1111nnnnmmmm1110 fmac <F_REG_M>,<F_REG_N>*/{"fmac",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}},
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/* 1111nnnnmmmm1100 fmov <F_REG_M>,<F_REG_N>*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},
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/* 1111nnnnmmmm1000 fmov.s @<REG_M>,<F_REG_N>*/{"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
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/* 1111nnnnmmmm1010 fmov.s <F_REG_M>,@<REG_N>*/{"fmov.s",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
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/* 1111nnnnmmmm1001 fmov.s @<REG_M>+,<F_REG_N>*/{"fmov.s",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
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/* 1111nnnnmmmm1011 fmov.s <F_REG_M>,@-<REG_N>*/{"fmov.s",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
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/* 1111nnnnmmmm0110 fmov.s @(R0,<REG_M>),<F_REG_N>*/{"fmov.s",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
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/* 1111nnnnmmmm0111 fmov.s <F_REG_M>,@(R0,<REG_N>)*/{"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
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/* 1111nnnnmmmm0010 fmul <F_REG_M>,<F_REG_N>*/{"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}},
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/* 1111nnnn01001101 fneg <F_REG_N> */{"fneg",{F_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}},
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/* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}},
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/* 1111nnnn00001101 fsts FPUL,<F_REG_N>*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}},
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/* 1111nnnnmmmm0001 fsub <F_REG_M>,<F_REG_N>*/{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
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/* 1111nnnn00111101 ftrc <F_REG_M>,FPUL*/{"ftrc",{F_REG_N,FPUL_N},{HEX_F,REG_N,HEX_3,HEX_D}},
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/* 1111nnnn01111101 ftst/nan <F_REG_N> */{"ftst/nan",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}},
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/* end-sanitize-sh3e */
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{ 0 }
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};
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#endif
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