ppc476 linker workaround shared lib fixes again
Huh, I can't even write a binary search properly. bfd/ * elf32-ppc.c (ppc_elf_relocate_section): Correct binary search of dynamic relocs. ld/testsuite/ * ld-powerpc/ppc476-shared.s: Repeat dynamic reloc generating insns. * ld-powerpc/ppc476-shared.d: Update. * ld-powerpc/ppc476-shared2.d: Update.
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@ -1,3 +1,8 @@
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2015-06-16 Alan Modra <amodra@gmail.com>
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* elf32-ppc.c (ppc_elf_relocate_section): Correct binary search of
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dynamic relocs.
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2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
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* elf-bfd.h : Remove struct elf_build_id.
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@ -9642,32 +9642,33 @@ ppc_elf_relocate_section (bfd *output_bfd,
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sreloc = elf_section_data (input_section)->sreloc;
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if (sreloc != NULL)
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{
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bfd_byte *slo, *shi, *srelend;
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Elf32_External_Rela *slo, *shi, *srelend;
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bfd_vma soffset;
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slo = sreloc->contents;
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shi = srelend
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= slo + sreloc->reloc_count * sizeof (Elf32_External_Rela);
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slo = (Elf32_External_Rela *) sreloc->contents;
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shi = srelend = slo + sreloc->reloc_count;
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soffset = (offset + input_section->output_section->vma
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+ input_section->output_offset);
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while (slo < shi)
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{
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bfd_byte *srel = slo + (shi - slo) / 2;
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bfd_elf32_swap_reloca_in (output_bfd, srel, &outrel);
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Elf32_External_Rela *srel = slo + (shi - slo) / 2;
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bfd_elf32_swap_reloca_in (output_bfd, (bfd_byte *) srel,
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&outrel);
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if (outrel.r_offset < soffset)
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slo = srel + 1;
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else if (outrel.r_offset > soffset + 3)
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shi = srel;
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else
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{
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bfd_byte *nextr = srel + sizeof (Elf32_External_Rela);
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if (nextr != srelend)
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if (srel + 1 != srelend)
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{
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memmove (srel, nextr, srelend - nextr);
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srel = srelend - sizeof (Elf32_External_Rela);
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memmove (srel, srel + 1,
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(srelend - (srel + 1)) * sizeof (*srel));
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srel = srelend - 1;
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}
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outrel.r_offset += patch_off - offset;
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bfd_elf32_swap_reloca_out (output_bfd, &outrel, srel);
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bfd_elf32_swap_reloca_out (output_bfd, &outrel,
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(bfd_byte *) srel);
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break;
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}
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}
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@ -1,3 +1,9 @@
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2015-06-16 Alan Modra <amodra@gmail.com>
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* ld-powerpc/ppc476-shared.s: Repeat dynamic reloc generating insns.
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* ld-powerpc/ppc476-shared.d: Update.
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* ld-powerpc/ppc476-shared2.d: Update.
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2015-06-12 Tristan Gingold <gingold@adacore.com>
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* ld-scripts/print-memory-usage-1.t,
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@ -8,23 +8,41 @@
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Disassembly of section \.text:
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0+fffc <\.text>:
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fffc: (48 01 00 04|04 00 01 48) b 20000 .*
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0000fffc <\.text>:
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fffc: (48 03 00 04|04 00 03 48) b 40000 .*
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10000: (38 63 00 00|00 00 63 38) addi r3,r3,0
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1000[02]: R_PPC_ADDR16_LO .bss
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1000[02]: R_PPC_ADDR16_LO \.bss
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\.\.\.
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1fff0: (42 9f 00 05|05 00 9f 42) bcl .*
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1fff4: (7d 28 02 a6|a6 02 28 7d) mflr r9
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1fff8: (3d 29 00 00|00 00 29 3d) addis r9,r9,0
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1fff[8a]: R_PPC_REL16_HA .bss\+0x[46]
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1fffc: (48 00 00 14|14 00 00 48) b 20010 .*
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20000: (3c 60 00 00|00 00 60 3c) lis r3,0
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2000[02]: R_PPC_ADDR16_HA .bss
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20004: (4b fe ff fc|fc ff fe 4b) b 10000 .*
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20008: (48 00 00 02|02 00 00 48) ba 0 .*
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2000c: (48 00 00 02|02 00 00 48) ba 0 .*
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20010: (39 29 01 00|00 01 29 39) addi r9,r9,256
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2001[02]: R_PPC_REL16_LO .bss\+0x1[ce]
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20014: (4b ff ff ec|ec ff ff 4b) b 20000 .*
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20018: (48 00 00 02|02 00 00 48) ba 0 .*
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2001c: (48 00 00 02|02 00 00 48) ba 0 .*
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1fffc: (48 02 00 14|14 00 02 48) b 40010 .*
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20000: (38 63 00 00|00 00 63 38) addi r3,r3,0
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2000[02]: R_PPC_ADDR16_LO \.bss
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\.\.\.
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2fffc: (48 01 00 24|24 00 01 48) b 40020 .*
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30000: (38 63 00 00|00 00 63 38) addi r3,r3,0
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3000[02]: R_PPC_ADDR16_LO \.bss
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\.\.\.
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3fff0: (42 9f 00 05|05 00 9f 42) bcl .*
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3fff4: (7d 28 02 a6|a6 02 28 7d) mflr r9
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3fff8: (3d 29 00 00|00 00 29 3d) addis r9,r9,0
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3fff[8a]: R_PPC_REL16_HA \.bss\+0x[46]
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3fffc: (48 00 00 34|34 00 00 48) b 40030 .*
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40000: (3c 60 00 00|00 00 60 3c) lis r3,0
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4000[02]: R_PPC_ADDR16_HA \.bss
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40004: (4b fc ff fc|fc ff fc 4b) b 10000 .*
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40008: (48 00 00 02|02 00 00 48) ba 0 .*
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4000c: (48 00 00 02|02 00 00 48) ba 0 .*
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40010: (3c 60 00 00|00 00 60 3c) lis r3,0
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4001[02]: R_PPC_ADDR16_HA \.bss
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40014: (4b fd ff ec|ec ff fd 4b) b 20000 .*
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40018: (48 00 00 02|02 00 00 48) ba 0 .*
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4001c: (48 00 00 02|02 00 00 48) ba 0 .*
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40020: (3c 60 00 00|00 00 60 3c) lis r3,0
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4002[02]: R_PPC_ADDR16_HA \.bss
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40024: (4b fe ff dc|dc ff fe 4b) b 30000 .*
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40028: (48 00 00 02|02 00 00 48) ba 0 .*
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4002c: (48 00 00 02|02 00 00 48) ba 0 .*
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40030: (39 29 01 50|50 01 29 39) addi r9,r9,336
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4003[02]: R_PPC_REL16_LO \.bss\+0x3[ce]
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40034: (4b ff ff cc|cc ff ff 4b) b 40000 .*
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40038: (48 00 00 02|02 00 00 48) ba 0 .*
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4003c: (48 00 00 02|02 00 00 48) ba 0 .*
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@ -1,8 +1,14 @@
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.text
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lis 3,x@ha
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addi 3,3,x@l
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.org 0x10000
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lis 3,x@ha
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addi 3,3,x@l
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.org 0x20000
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lis 3,x@ha
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addi 3,3,x@l
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.org 0xfff4
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.org 0x2fff4
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bcl 20,31,.+4
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0:
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mflr 9
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@ -8,5 +8,9 @@
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DYNAMIC RELOCATION RECORDS
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OFFSET TYPE VALUE
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0001000[02] R_PPC_ADDR16_LO \.text\+0x000200f4
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0002000[02] R_PPC_ADDR16_HA \.text\+0x000200f4
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0001000[02] R_PPC_ADDR16_LO \.text\+0x00040144
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0002000[02] R_PPC_ADDR16_LO \.text\+0x00040144
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0003000[02] R_PPC_ADDR16_LO \.text\+0x00040144
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0004000[02] R_PPC_ADDR16_HA \.text\+0x00040144
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0004001[02] R_PPC_ADDR16_HA \.text\+0x00040144
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0004002[02] R_PPC_ADDR16_HA \.text\+0x00040144
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