include/elf/ChangeLog:
Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * sh.h (EF_SH2A_NOFPU): New. 2003-12-01 Michael Snyder <msnyder@redhat.com> * sh.h (EF_SH2A): New. bfd/ChangeLog: Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * archures.c (bfd_mach_sh2a_nofpu): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH2A_NOFPU_NEXT): New. (arch_info_struct): Add sh2a_nofpu. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu. 2003-12-29 DJ Delorie <dj@redhat.com> * reloc.c: Add relocs for sh2a. * bfd-in2.h: Regenerate. * libbfd.hh: Regenerate. 2003-12-01 Michael Snyder <msnyder@redhat.com> * archures.c (bfd_mach_sh2a): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums. (SH2A_NEXT): New. (arch_info_struct): Add sh2a. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a. binutils/ChangeLog: * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and EF_SH2A_NOFPU. gas/ChangeLog: Introduce SH2a support. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (get_specific): Change arch_sh2a_up to arch_sh2a_nofpu_up. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition to end of conditional expression. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c: Add sh2a-nofpu support. 2003-12-29 DJ Delorie <dj@redhat.com> * tc-sh.c: Add sh2a support. (parse_reg): Add tbr. (parse_at): Support @@(disp,tbr). (get_specific): Support sh2a opcodes. (insert4): New, for 4 byte relocs. (build_Mytes): Support sh2a opcodes. (md_apply_fix3_Mytes): Support sh2a opcodes. 2003-12-02 Michael Snyder <msnyder@redhat.com> * config/tc-sh.c (md_parse_option): Handle sh2a. (sh_elf_final_processing): Ditto. gas/testsuite/ChangeLog: 2003-12-30 DJ Delorie <dj@redhat.com> * gas/sh/sh2a.s: New. * gas/sh/sh2a.d: New. * gas/sh/basic.exp: Add it.
This commit is contained in:
Alexandre Oliva
parent
e7fbc2bf98
commit
1d70c7fb83
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@ -1,3 +1,24 @@
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2004-07-29 Alexandre Oliva <aoliva@redhat.com>
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Introduce SH2a support.
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2004-02-18 Corinna Vinschen <vinschen@redhat.com>
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* archures.c (bfd_mach_sh2a_nofpu): New.
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* bfd-in2.h: Rebuilt.
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* cpu-sh.c (SH2A_NOFPU_NEXT): New.
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(arch_info_struct): Add sh2a_nofpu.
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* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu.
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2003-12-29 DJ Delorie <dj@redhat.com>
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* reloc.c: Add relocs for sh2a.
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* bfd-in2.h: Regenerate.
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* libbfd.hh: Regenerate.
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2003-12-01 Michael Snyder <msnyder@redhat.com>
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* archures.c (bfd_mach_sh2a): New.
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* bfd-in2.h: Rebuilt.
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* cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums.
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(SH2A_NEXT): New.
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(arch_info_struct): Add sh2a.
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* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a.
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2004-07-28 Nick Clifton <nickc@redhat.com>
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John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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@ -229,6 +229,8 @@ DESCRIPTION
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.#define bfd_mach_sh 1
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.#define bfd_mach_sh2 0x20
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.#define bfd_mach_sh_dsp 0x2d
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.#define bfd_mach_sh2a 0x2a
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.#define bfd_mach_sh2a_nofpu 0x2b
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.#define bfd_mach_sh2e 0x2e
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.#define bfd_mach_sh3 0x30
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.#define bfd_mach_sh3_nommu 0x31
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@ -1677,6 +1677,8 @@ enum bfd_architecture
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#define bfd_mach_sh 1
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#define bfd_mach_sh2 0x20
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#define bfd_mach_sh_dsp 0x2d
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#define bfd_mach_sh2a 0x2a
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#define bfd_mach_sh2a_nofpu 0x2b
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#define bfd_mach_sh2e 0x2e
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#define bfd_mach_sh3 0x30
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#define bfd_mach_sh3_nommu 0x31
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@ -2637,6 +2639,14 @@ field in the instruction. */
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/* Renesas / SuperH SH relocs. Not all of these appear in object files. */
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BFD_RELOC_SH_PCDISP8BY2,
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BFD_RELOC_SH_PCDISP12BY2,
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BFD_RELOC_SH_IMM3,
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BFD_RELOC_SH_IMM3U,
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BFD_RELOC_SH_DISP12,
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BFD_RELOC_SH_DISP12BY2,
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BFD_RELOC_SH_DISP12BY4,
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BFD_RELOC_SH_DISP12BY8,
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BFD_RELOC_SH_DISP20,
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BFD_RELOC_SH_DISP20BY8,
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BFD_RELOC_SH_IMM4,
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BFD_RELOC_SH_IMM4BY2,
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BFD_RELOC_SH_IMM4BY4,
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32
bfd/cpu-sh.c
32
bfd/cpu-sh.c
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@ -38,6 +38,8 @@
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#define SH4_NOFPU_NEXT &arch_info_struct[11]
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#define SH4_NOMMU_NOFPU_NEXT &arch_info_struct[12]
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#define SH4A_NOFPU_NEXT &arch_info_struct[13]
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#define SH2A_NEXT &arch_info_struct[14]
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#define SH2A_NOFPU_NEXT &arch_info_struct[15]
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#define SH64_NEXT NULL
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static const bfd_arch_info_type arch_info_struct[] =
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@ -224,6 +226,34 @@ static const bfd_arch_info_type arch_info_struct[] =
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bfd_default_scan,
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SH4A_NOFPU_NEXT
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},
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{
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32, /* 32 bits in a word. */
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32, /* 32 bits in an address. */
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8, /* 8 bits in a byte. */
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bfd_arch_sh,
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bfd_mach_sh2a,
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"sh", /* Arch_name. */
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"sh2a", /* Printable name. */
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1,
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FALSE, /* Not the default. */
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bfd_default_compatible,
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bfd_default_scan,
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SH2A_NEXT
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},
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{
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32, /* 32 bits in a word. */
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32, /* 32 bits in an address. */
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8, /* 8 bits in a byte. */
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bfd_arch_sh,
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bfd_mach_sh2a_nofpu,
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"sh", /* Arch_name. */
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"sh2a-nofpu", /* Printable name. */
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1,
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FALSE, /* Not the default. */
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bfd_default_compatible,
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bfd_default_scan,
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SH2A_NOFPU_NEXT
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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@ -269,6 +299,8 @@ static struct { unsigned long bfd_mach, arch, arch_up; } bfd_to_arch_table[] =
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{ bfd_mach_sh2, arch_sh2, arch_sh2_up },
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{ bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
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{ bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
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{ bfd_mach_sh2a, arch_sh2a, arch_sh2a_up },
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{ bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up },
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{ bfd_mach_sh3, arch_sh3, arch_sh3_up },
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{ bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
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{ bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
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@ -6913,7 +6913,13 @@ sh_elf_merge_private_data (bfd *ibfd, bfd *obfd)
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}
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if (! sh_merge_bfd_arch (ibfd, obfd))
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return FALSE;
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{
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_bfd_error_handler ("%s: uses instructions which are incompatible "
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"with instructions used in previous modules",
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bfd_archive_filename (ibfd));
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bfd_set_error (bfd_error_bad_value);
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return FALSE;
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}
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elf_elfheader (obfd)->e_flags =
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sh_elf_get_flags_from_mach (bfd_get_mach (obfd));
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@ -1135,6 +1135,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
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"BFD_RELOC_ARM_GOTPC",
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"BFD_RELOC_SH_PCDISP8BY2",
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"BFD_RELOC_SH_PCDISP12BY2",
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"BFD_RELOC_SH_IMM3",
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"BFD_RELOC_SH_IMM3U",
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"BFD_RELOC_SH_DISP12",
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"BFD_RELOC_SH_DISP12BY2",
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"BFD_RELOC_SH_DISP12BY4",
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"BFD_RELOC_SH_DISP12BY8",
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"BFD_RELOC_SH_DISP20",
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"BFD_RELOC_SH_DISP20BY8",
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"BFD_RELOC_SH_IMM4",
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"BFD_RELOC_SH_IMM4BY2",
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"BFD_RELOC_SH_IMM4BY4",
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16
bfd/reloc.c
16
bfd/reloc.c
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@ -2613,6 +2613,22 @@ ENUM
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BFD_RELOC_SH_PCDISP8BY2
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ENUMX
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BFD_RELOC_SH_PCDISP12BY2
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ENUMX
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BFD_RELOC_SH_IMM3
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ENUMX
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BFD_RELOC_SH_IMM3U
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ENUMX
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BFD_RELOC_SH_DISP12
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ENUMX
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BFD_RELOC_SH_DISP12BY2
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ENUMX
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BFD_RELOC_SH_DISP12BY4
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ENUMX
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BFD_RELOC_SH_DISP12BY8
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ENUMX
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BFD_RELOC_SH_DISP20
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ENUMX
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BFD_RELOC_SH_DISP20BY8
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ENUMX
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BFD_RELOC_SH_IMM4
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ENUMX
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@ -1,3 +1,8 @@
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2004-07-29 Alexandre Oliva <aoliva@redhat.com>
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* readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and
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EF_SH2A_NOFPU.
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2004-07-28 Alexandre Oliva <aoliva@redhat.com>
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2003-07-08 Alexandre Oliva <aoliva@redhat.com>
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@ -2009,8 +2009,10 @@ get_machine_flags (unsigned e_flags, unsigned e_machine)
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case EF_SH5: strcat (buf, ", sh5"); break;
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case EF_SH2E: strcat (buf, ", sh2e"); break;
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case EF_SH4A: strcat (buf, ", sh4a"); break;
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case EF_SH2A: strcat (buf, ", sh2a"); break;
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case EF_SH4_NOFPU: strcat (buf, ", sh4-nofpu"); break;
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case EF_SH4A_NOFPU: strcat (buf, ", sh4a-nofpu"); break;
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case EF_SH2A_NOFPU: strcat (buf, ", sh2a-nofpu"); break;
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default: strcat (buf, ", unknown ISA"); break;
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}
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@ -1,3 +1,28 @@
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2004-07-29 Alexandre Oliva <aoliva@redhat.com>
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Introduce SH2a support.
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2004-02-24 Corinna Vinschen <vinschen@redhat.com>
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* config/tc-sh.c (get_specific): Change arch_sh2a_up to
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arch_sh2a_nofpu_up.
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2004-02-24 Corinna Vinschen <vinschen@redhat.com>
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* config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling.
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2004-02-20 Corinna Vinschen <vinschen@redhat.com>
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* config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition
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to end of conditional expression.
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2004-02-20 Corinna Vinschen <vinschen@redhat.com>
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* config/tc-sh.c: Add sh2a-nofpu support.
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2003-12-29 DJ Delorie <dj@redhat.com>
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* tc-sh.c: Add sh2a support.
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(parse_reg): Add tbr.
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(parse_at): Support @@(disp,tbr).
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(get_specific): Support sh2a opcodes.
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(insert4): New, for 4 byte relocs.
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(build_Mytes): Support sh2a opcodes.
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(md_apply_fix3_Mytes): Support sh2a opcodes.
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2003-12-02 Michael Snyder <msnyder@redhat.com>
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* config/tc-sh.c (md_parse_option): Handle sh2a.
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(sh_elf_final_processing): Ditto.
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2004-07-27 Jason Thorpe <thorpej@wasabisystems.com>
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* config/tc-hppa.h (TARGET_FORMAT): Set to "elf32-hppa-netbsd"
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@ -1098,6 +1098,12 @@ parse_reg (char *src, int *mode, int *reg)
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return 3;
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}
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if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r'
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&& ! IDENT_CHAR ((unsigned char) src[3]))
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{
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*mode = A_TBR;
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return 3;
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}
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if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
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&& ! IDENT_CHAR ((unsigned char) src[4]))
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{
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@ -1268,7 +1274,15 @@ parse_at (char *src, sh_operand_info *op)
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int len;
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int mode;
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src++;
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if (src[0] == '-')
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if (src[0] == '@')
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{
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src = parse_at (src, op);
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if (op->type == A_DISP_TBR)
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op->type = A_DISP2_TBR;
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else
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as_bad (_("illegal double indirection"));
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}
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else if (src[0] == '-')
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{
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/* Must be predecrement. */
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src++;
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@ -1341,6 +1355,10 @@ parse_at (char *src, sh_operand_info *op)
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{
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op->type = A_DISP_GBR;
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}
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else if (mode == A_TBR)
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{
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op->type = A_DISP_TBR;
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}
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else if (mode == A_PC)
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{
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/* We want @(expr, pc) to uniformly address . + expr,
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@ -1542,6 +1560,36 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
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sh_operand_info *user = operands + n;
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sh_arg_type arg = this_try->arg[n];
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if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
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&& ( arg == A_DISP_REG_M
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|| arg == A_DISP_REG_N))
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{
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/* Check a few key IMM* fields for overflow. */
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int opf;
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long val = user->immediate.X_add_number;
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for (opf = 0; opf < 4; opf ++)
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switch (this_try->nibbles[opf])
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{
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case IMM0_4:
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case IMM1_4:
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if (val < 0 || val > 15)
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goto fail;
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break;
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case IMM0_4BY2:
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case IMM1_4BY2:
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if (val < 0 || val > 15 * 2)
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goto fail;
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break;
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case IMM0_4BY4:
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case IMM1_4BY4:
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if (val < 0 || val > 15 * 4)
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goto fail;
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break;
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default:
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break;
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}
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}
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switch (arg)
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{
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case A_DISP_PC:
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@ -1552,6 +1600,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
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case A_BDISP12:
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case A_BDISP8:
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case A_DISP_GBR:
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case A_DISP2_TBR:
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case A_MACH:
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case A_PR:
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case A_MACL:
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@ -1596,6 +1645,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
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reg_n = user->reg;
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break;
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case A_GBR:
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case A_TBR:
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case A_SR:
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case A_VBR:
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case A_DSR:
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@ -1616,6 +1666,22 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
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reg_b = user->reg;
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break;
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case A_INC_R15:
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if (user->type != A_INC_N)
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goto fail;
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if (user->reg != 15)
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goto fail;
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reg_n = user->reg;
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break;
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case A_DEC_R15:
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if (user->type != A_DEC_N)
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goto fail;
|
||||
if (user->reg != 15)
|
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goto fail;
|
||||
reg_n = user->reg;
|
||||
break;
|
||||
|
||||
case A_REG_M:
|
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case A_INC_M:
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case A_DEC_M:
|
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|
|
@ -2040,6 +2106,16 @@ insert (char *where, int how, int pcrel, sh_operand_info *op)
|
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how);
|
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}
|
||||
|
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static void
|
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insert4 (char * where, int how, int pcrel, sh_operand_info * op)
|
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{
|
||||
fix_new_exp (frag_now,
|
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where - frag_now->fr_literal,
|
||||
4,
|
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& op->immediate,
|
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pcrel,
|
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how);
|
||||
}
|
||||
static void
|
||||
build_relax (sh_opcode_info *opcode, sh_operand_info *op)
|
||||
{
|
||||
|
|
@ -2126,16 +2202,31 @@ static unsigned int
|
|||
build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
|
||||
{
|
||||
int index;
|
||||
char nbuf[4];
|
||||
char *output = frag_more (2);
|
||||
char nbuf[8];
|
||||
char *output;
|
||||
unsigned int size = 2;
|
||||
int low_byte = target_big_endian ? 1 : 0;
|
||||
int max_index = 4;
|
||||
|
||||
nbuf[0] = 0;
|
||||
nbuf[1] = 0;
|
||||
nbuf[2] = 0;
|
||||
nbuf[3] = 0;
|
||||
nbuf[4] = 0;
|
||||
nbuf[5] = 0;
|
||||
nbuf[6] = 0;
|
||||
nbuf[7] = 0;
|
||||
|
||||
for (index = 0; index < 4; index++)
|
||||
if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
|
||||
{
|
||||
output = frag_more (4);
|
||||
size = 4;
|
||||
max_index = 8;
|
||||
}
|
||||
else
|
||||
output = frag_more (2);
|
||||
|
||||
for (index = 0; index < max_index; index++)
|
||||
{
|
||||
sh_nibble_type i = opcode->nibbles[index];
|
||||
if (i < 16)
|
||||
|
|
@ -2167,6 +2258,48 @@ build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
|
|||
case REG_N_B01:
|
||||
nbuf[index] = reg_n | 0x01;
|
||||
break;
|
||||
case IMM0_3s:
|
||||
nbuf[index] |= 0x08;
|
||||
case IMM0_3c:
|
||||
insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
|
||||
break;
|
||||
case IMM0_3Us:
|
||||
nbuf[index] |= 0x80;
|
||||
case IMM0_3Uc:
|
||||
insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
|
||||
break;
|
||||
case DISP0_12:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand);
|
||||
break;
|
||||
case DISP0_12BY2:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand);
|
||||
break;
|
||||
case DISP0_12BY4:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand);
|
||||
break;
|
||||
case DISP0_12BY8:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand);
|
||||
break;
|
||||
case DISP1_12:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1);
|
||||
break;
|
||||
case DISP1_12BY2:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1);
|
||||
break;
|
||||
case DISP1_12BY4:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1);
|
||||
break;
|
||||
case DISP1_12BY8:
|
||||
insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1);
|
||||
break;
|
||||
case IMM0_20_4:
|
||||
break;
|
||||
case IMM0_20:
|
||||
insert4 (output, BFD_RELOC_SH_DISP20, 0, operand);
|
||||
break;
|
||||
case IMM0_20BY8:
|
||||
insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand);
|
||||
break;
|
||||
case IMM0_4BY4:
|
||||
insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
|
||||
break;
|
||||
|
|
@ -2231,6 +2364,19 @@ build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
|
|||
output[0] = (nbuf[0] << 4) | (nbuf[1]);
|
||||
output[1] = (nbuf[2] << 4) | (nbuf[3]);
|
||||
}
|
||||
if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
|
||||
{
|
||||
if (!target_big_endian)
|
||||
{
|
||||
output[3] = (nbuf[4] << 4) | (nbuf[5]);
|
||||
output[2] = (nbuf[6] << 4) | (nbuf[7]);
|
||||
}
|
||||
else
|
||||
{
|
||||
output[2] = (nbuf[4] << 4) | (nbuf[5]);
|
||||
output[3] = (nbuf[6] << 4) | (nbuf[7]);
|
||||
}
|
||||
}
|
||||
return size;
|
||||
}
|
||||
|
||||
|
|
@ -3722,6 +3868,57 @@ md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
|
|||
shift = 0;
|
||||
switch (fixP->fx_r_type)
|
||||
{
|
||||
case BFD_RELOC_SH_IMM3:
|
||||
max = 0x7;
|
||||
* buf = (* buf & 0xf8) | (val & 0x7);
|
||||
break;
|
||||
case BFD_RELOC_SH_IMM3U:
|
||||
max = 0x7;
|
||||
* buf = (* buf & 0x8f) | ((val & 0x7) << 4);
|
||||
break;
|
||||
case BFD_RELOC_SH_DISP12:
|
||||
max = 0xfff;
|
||||
buf[lowbyte] = val & 0xff;
|
||||
buf[highbyte] |= (val >> 8) & 0x0f;
|
||||
break;
|
||||
case BFD_RELOC_SH_DISP12BY2:
|
||||
max = 0xfff;
|
||||
shift = 1;
|
||||
buf[lowbyte] = (val >> 1) & 0xff;
|
||||
buf[highbyte] |= (val >> 9) & 0x0f;
|
||||
break;
|
||||
case BFD_RELOC_SH_DISP12BY4:
|
||||
max = 0xfff;
|
||||
shift = 2;
|
||||
buf[lowbyte] = (val >> 2) & 0xff;
|
||||
buf[highbyte] |= (val >> 10) & 0x0f;
|
||||
break;
|
||||
case BFD_RELOC_SH_DISP12BY8:
|
||||
max = 0xfff;
|
||||
shift = 3;
|
||||
buf[lowbyte] = (val >> 3) & 0xff;
|
||||
buf[highbyte] |= (val >> 11) & 0x0f;
|
||||
break;
|
||||
case BFD_RELOC_SH_DISP20:
|
||||
if (! target_big_endian)
|
||||
abort();
|
||||
max = 0x7ffff;
|
||||
min = -0x80000;
|
||||
buf[1] = (buf[1] & 0x0f) | (val >> 12) & 0xf0;
|
||||
buf[2] = (val >> 8) & 0xff;
|
||||
buf[3] = val & 0xff;
|
||||
break;
|
||||
case BFD_RELOC_SH_DISP20BY8:
|
||||
if (!target_big_endian)
|
||||
abort();
|
||||
max = 0x7ffff;
|
||||
min = -0x80000;
|
||||
shift = 8;
|
||||
buf[1] = (buf[1] & 0x0f) | (val >> 20) & 0xf0;
|
||||
buf[2] = (val >> 16) & 0xff;
|
||||
buf[3] = (val >> 8) & 0xff;
|
||||
break;
|
||||
|
||||
case BFD_RELOC_SH_IMM4:
|
||||
max = 0xf;
|
||||
*buf = (*buf & 0xf0) | (val & 0xf);
|
||||
|
|
|
|||
|
|
@ -1,3 +1,10 @@
|
|||
2004-07-29 Alexandre Oliva <aoliva@redhat.com>
|
||||
|
||||
2003-12-30 DJ Delorie <dj@redhat.com>
|
||||
* gas/sh/sh2a.s: New.
|
||||
* gas/sh/sh2a.d: New.
|
||||
* gas/sh/basic.exp: Add it.
|
||||
|
||||
2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* gas/all/gas.exp (do_930509a): Disable test for crx.
|
||||
|
|
|
|||
|
|
@ -160,6 +160,7 @@ if [istarget sh*-*-*] then {
|
|||
|
||||
# Test -renesas.
|
||||
run_dump_test "renesas-1"
|
||||
run_dump_test "sh2a"
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,68 @@
|
|||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#name: SH2a new instructions
|
||||
#as: -isa=sh2a
|
||||
|
||||
dump.o: file format elf32-sh
|
||||
|
||||
Disassembly of section .text:
|
||||
0x00000000 33 79 4f ff band.b #7,@\(4095,r3\)
|
||||
0x00000004 33 79 cf ff bandnot.b #7,@\(4095,r3\)
|
||||
0x00000008 33 79 0f ff bclr.b #7,@\(4095,r3\)
|
||||
0x0000000c 86 37 bclr #7,r3
|
||||
0x0000000e 33 79 3f ff bld.b #7,@\(4095,r3\)
|
||||
0x00000012 87 3f bld #7,r3
|
||||
0x00000014 33 79 bf ff bldnot.b #7,@\(4095,r3\)
|
||||
0x00000018 33 79 5f ff bor.b #7,@\(4095,r3\)
|
||||
0x0000001c 33 79 df ff bornot.b #7,@\(4095,r3\)
|
||||
0x00000020 33 79 1f ff bset.b #7,@\(4095,r3\)
|
||||
0x00000024 86 3f bset #7,r3
|
||||
0x00000026 33 79 2f ff bst.b #7,@\(4095,r3\)
|
||||
0x0000002a 87 37 bst #7,r3
|
||||
0x0000002c 33 79 6f ff bxor.b #7,@\(4095,r3\)
|
||||
0x00000030 43 91 clips.b r3
|
||||
0x00000032 43 95 clips.w r3
|
||||
0x00000034 43 81 clipu.b r3
|
||||
0x00000036 43 85 clipu.w r3
|
||||
0x00000038 43 94 divs r0,r3
|
||||
0x0000003a 43 84 divu r0,r3
|
||||
0x0000003c 33 31 3f ff fmov.s fr3,@\(16380,r3\)
|
||||
0x00000040 33 21 3f ff fmov.d dr2,@\(32760,r3\)
|
||||
0x00000044 33 31 7f ff fmov.s @\(16380,r3\),fr3
|
||||
0x00000048 32 31 7f ff fmov.d @\(32760,r3\),dr2
|
||||
0x0000004c 43 4b jsr/n @r3
|
||||
0x0000004e 83 ff jsr/n @@\(1020,tbr\)
|
||||
0x00000050 43 e5 ldbank @r3,r0
|
||||
0x00000052 43 4a ldc r3,tbr
|
||||
0x00000054 34 31 0f ff mov.b r3,@\(4095,r4\)
|
||||
0x00000058 34 31 1f ff mov.w r3,@\(8190,r4\)
|
||||
0x0000005c 34 31 2f ff mov.l r3,@\(16380,r4\)
|
||||
0x00000060 35 41 4f ff mov.b @\(4095,r4\),r5
|
||||
0x00000064 35 41 5f ff mov.w @\(8190,r4\),r5
|
||||
0x00000068 35 41 6f ff mov.l @\(16380,r4\),r5
|
||||
0x0000006c 43 8b mov.b r0,@r3\+
|
||||
0x0000006e 43 9b mov.w r0,@r3\+
|
||||
0x00000070 43 ab mov.l r0,@r3\+
|
||||
0x00000072 43 cb mov.b @-r3,r0
|
||||
0x00000074 43 db mov.w @-r3,r0
|
||||
0x00000076 43 eb mov.l @-r3,r0
|
||||
0x00000078 03 70 ff ff movi20 #524287,r3
|
||||
0x0000007c 03 80 00 00 movi20 #-524288,r3
|
||||
0x00000080 03 71 ff ff movi20s #134217472,r3
|
||||
0x00000084 03 81 00 00 movi20s #-134217728,r3
|
||||
0x00000088 43 f1 movml.l r3,@-r15
|
||||
0x0000008a 43 f5 movml.l @r15\+,r3
|
||||
0x0000008c 43 f0 movmu.l r3,@-r15
|
||||
0x0000008e 43 f4 movmu.l @r15\+,r3
|
||||
0x00000090 03 39 movrt r3
|
||||
0x00000092 34 31 8f ff movu.b @\(4095,r3\),r4
|
||||
0x00000096 34 31 9f ff movu.w @\(8190,r3\),r4
|
||||
0x0000009a 44 80 mulr r0,r4
|
||||
0x0000009c 00 68 nott
|
||||
0x0000009e 05 83 pref @r5
|
||||
0x000000a0 00 5b resbank
|
||||
0x000000a2 00 6b rts/n
|
||||
0x000000a4 03 7b rtv/n r3
|
||||
0x000000a6 44 3c shad r3,r4
|
||||
0x000000a8 44 3d shld r3,r4
|
||||
0x000000aa 45 e1 stbank r0,@r5
|
||||
0x000000ac 04 4a stc tbr,r4
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
.text
|
||||
|
||||
# New instructions
|
||||
|
||||
band.b #7,@(4095,r3)
|
||||
|
||||
bandnot.b #7,@(4095,r3)
|
||||
|
||||
bclr.b #7,@(4095,r3)
|
||||
bclr #7,r3
|
||||
|
||||
bld.b #7,@(4095,r3)
|
||||
bld #7,r3
|
||||
|
||||
bldnot.b #7,@(4095,r3)
|
||||
|
||||
bor.b #7,@(4095,r3)
|
||||
|
||||
bornot.b #7,@(4095,r3)
|
||||
|
||||
bset.b #7,@(4095,r3)
|
||||
bset #7,r3
|
||||
|
||||
bst.b #7,@(4095,r3)
|
||||
bst #7,r3
|
||||
|
||||
bxor.b #7,@(4095,r3)
|
||||
|
||||
clips.b r3
|
||||
clips.w r3
|
||||
clipu.b r3
|
||||
clipu.w r3
|
||||
|
||||
divs r0,r3
|
||||
divu r0,r3
|
||||
|
||||
fmov.s fr3,@(4095*4,r3)
|
||||
fmov.d dr2,@(4095*8,r3)
|
||||
fmov.s @(4095*4,r3),fr3
|
||||
fmov.d @(4095*8,r3),dr2
|
||||
|
||||
jsr/n @r3
|
||||
jsr/n @@(255*4,tbr)
|
||||
|
||||
ldbank @r3,r0
|
||||
|
||||
ldc r3,tbr
|
||||
|
||||
mov.b r3,@(4095,r4)
|
||||
mov.w r3,@(4095*2,r4)
|
||||
mov.l r3,@(4095*4,r4)
|
||||
mov.b @(4095,r4),r5
|
||||
mov.w @(4095*2,r4),r5
|
||||
mov.l @(4095*4,r4),r5
|
||||
|
||||
mov.b r0,@r3+
|
||||
mov.w r0,@r3+
|
||||
mov.l r0,@r3+
|
||||
mov.b @-r3,r0
|
||||
mov.w @-r3,r0
|
||||
mov.l @-r3,r0
|
||||
|
||||
movi20 #524287,r3
|
||||
movi20 #-524288,r3
|
||||
movi20s #524287*256,r3
|
||||
movi20s #-524288*256,r3
|
||||
|
||||
movml.l r3,@-r15
|
||||
movml.l @r15+,r3
|
||||
|
||||
movmu.l r3,@-r15
|
||||
movmu.l @r15+,r3
|
||||
|
||||
movrt r3
|
||||
|
||||
movu.b @(4095,r3),r4
|
||||
movu.w @(4095*2,r3),r4
|
||||
|
||||
mulr r0,r4
|
||||
|
||||
nott
|
||||
|
||||
pref @r5
|
||||
|
||||
resbank
|
||||
|
||||
rts/n
|
||||
|
||||
rtv/n r3
|
||||
|
||||
shad r3,r4
|
||||
shld r3,r4
|
||||
|
||||
stbank r0,@r5
|
||||
|
||||
stc tbr,r4
|
||||
|
|
@ -1,3 +1,11 @@
|
|||
2004-07-29 Alexandre Oliva <aoliva@redhat.com>
|
||||
|
||||
Introduce SH2a support.
|
||||
2004-02-18 Corinna Vinschen <vinschen@redhat.com>
|
||||
* sh.h (EF_SH2A_NOFPU): New.
|
||||
2003-12-01 Michael Snyder <msnyder@redhat.com>
|
||||
* sh.h (EF_SH2A): New.
|
||||
|
||||
2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* crx.h: Add BFD_RELOC_CRX_SWITCH8, BFD_RELOC_CRX_SWITCH16,
|
||||
|
|
|
|||
|
|
@ -34,10 +34,12 @@
|
|||
#define EF_SH4 9
|
||||
#define EF_SH2E 11
|
||||
#define EF_SH4A 12
|
||||
#define EF_SH2A 13
|
||||
|
||||
#define EF_SH4_NOFPU 16
|
||||
#define EF_SH4A_NOFPU 17
|
||||
#define EF_SH4_NOMMU_NOFPU 18
|
||||
#define EF_SH2A_NOFPU 19
|
||||
#define EF_SH3_NOMMU 20
|
||||
|
||||
/* This one can only mix in objects from other EF_SH5 objects. */
|
||||
|
|
@ -60,11 +62,12 @@
|
|||
/* EF_SH5 */ 0, \
|
||||
/* EF_SH2E */ bfd_mach_sh2e , \
|
||||
/* EF_SH4A */ bfd_mach_sh4a , \
|
||||
/* 13, 14, 15 */ 0, 0, 0, \
|
||||
/* EF_SH2A */ bfd_mach_sh2a , \
|
||||
/* 14, 15 */ 0, 0, \
|
||||
/* EF_SH4_NOFPU */ bfd_mach_sh4_nofpu , \
|
||||
/* EF_SH4A_NOFPU */ bfd_mach_sh4a_nofpu , \
|
||||
/* EF_SH4_NOMMU_NOFPU */ bfd_mach_sh4_nommu_nofpu, \
|
||||
/* 19 */ 0, \
|
||||
/* EF_SH2A_NOFPU */ bfd_mach_sh2a_nofpu , \
|
||||
/* EF_SH3_NOMMU */ bfd_mach_sh3_nommu
|
||||
|
||||
/* Convert arch_sh* into EF_SH*. */
|
||||
|
|
|
|||
Loading…
Reference in New Issue