* s390-tdep.c (op_bctr, op_bctgr, op_bct, op1_bctg, op2_bctg,
op_bxh, op1_bxhg, op2_bxhg, op_bxle, op1_bxleg, op2_bxleg, op1_brct, op2_brct, op1_brctg, op2_brctg, op_brxh, op1_brxhg, op2_brxhg, op_brxle, op1_brxlg, op2_brxlg): New enum values. (is_rsi, is_rie): New insn format decoder routines. (s390_displaced_step_fixup): New function. (s390_gdbarch_init): Install displaced stepping routines.
This commit is contained in:
Ulrich Weigand
parent
1ba3a4f4b8
commit
1db4e8a0b4
@ -1,3 +1,13 @@
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2009-09-27 Ulrich Weigand <uweigand@de.ibm.com>
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* s390-tdep.c (op_bctr, op_bctgr, op_bct, op1_bctg, op2_bctg,
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op_bxh, op1_bxhg, op2_bxhg, op_bxle, op1_bxleg, op2_bxleg,
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op1_brct, op2_brct, op1_brctg, op2_brctg, op_brxh, op1_brxhg,
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op2_brxhg, op_brxle, op1_brxlg, op2_brxlg): New enum values.
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(is_rsi, is_rie): New insn format decoder routines.
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(s390_displaced_step_fixup): New function.
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(s390_gdbarch_init): Install displaced stepping routines.
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2009-09-27 Ulrich Weigand <uweigand@de.ibm.com>
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* configure.tgt (powerpc-*-linux* | powerpc64-*-linux*):
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162
gdb/s390-tdep.c
162
gdb/s390-tdep.c
@ -491,10 +491,24 @@ enum
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op_bas = 0x4d,
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op_bcr = 0x07,
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op_bc = 0x0d,
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op_bctr = 0x06,
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op_bctgr = 0xb946,
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op_bct = 0x46,
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op1_bctg = 0xe3, op2_bctg = 0x46,
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op_bxh = 0x86,
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op1_bxhg = 0xeb, op2_bxhg = 0x44,
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op_bxle = 0x87,
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op1_bxleg= 0xeb, op2_bxleg= 0x45,
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op1_bras = 0xa7, op2_bras = 0x05,
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op1_brasl= 0xc0, op2_brasl= 0x05,
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op1_brc = 0xa7, op2_brc = 0x04,
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op1_brcl = 0xc0, op2_brcl = 0x04,
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op1_brct = 0xa7, op2_brct = 0x06,
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op1_brctg= 0xa7, op2_brctg= 0x07,
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op_brxh = 0x84,
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op1_brxhg= 0xec, op2_brxhg= 0x44,
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op_brxle = 0x85,
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op1_brxlg= 0xec, op2_brxlg= 0x45,
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};
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@ -634,6 +648,41 @@ is_rsy (bfd_byte *insn, int op1, int op2,
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}
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static int
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is_rsi (bfd_byte *insn, int op,
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unsigned int *r1, unsigned int *r3, int *i2)
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{
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if (insn[0] == op)
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{
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*r1 = (insn[1] >> 4) & 0xf;
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*r3 = insn[1] & 0xf;
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/* i2 is a 16-bit signed quantity. */
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*i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
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return 1;
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}
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else
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return 0;
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}
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static int
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is_rie (bfd_byte *insn, int op1, int op2,
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unsigned int *r1, unsigned int *r3, int *i2)
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{
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if (insn[0] == op1
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&& insn[5] == op2)
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{
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*r1 = (insn[1] >> 4) & 0xf;
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*r3 = insn[1] & 0xf;
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/* i2 is a 16-bit signed quantity. */
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*i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
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return 1;
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}
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else
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return 0;
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}
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static int
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is_rx (bfd_byte *insn, int op,
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unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
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@ -1159,6 +1208,109 @@ s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
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return 0;
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}
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/* Displaced stepping. */
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/* Fix up the state of registers and memory after having single-stepped
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a displaced instruction. */
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static void
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s390_displaced_step_fixup (struct gdbarch *gdbarch,
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struct displaced_step_closure *closure,
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CORE_ADDR from, CORE_ADDR to,
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struct regcache *regs)
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{
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/* Since we use simple_displaced_step_copy_insn, our closure is a
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copy of the instruction. */
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gdb_byte *insn = (gdb_byte *) closure;
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static int s390_instrlen[] = { 2, 4, 4, 6 };
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int insnlen = s390_instrlen[insn[0] >> 6];
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/* Fields for various kinds of instructions. */
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unsigned int b2, r1, r2, x2, r3;
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int i2, d2;
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/* Get current PC and addressing mode bit. */
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CORE_ADDR pc = regcache_read_pc (regs);
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CORE_ADDR amode = 0;
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if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
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{
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regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
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amode &= 0x80000000;
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}
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if (debug_displaced)
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fprintf_unfiltered (gdb_stdlog,
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"displaced: (s390) fixup (%s, %s) pc %s amode 0x%x\n",
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paddress (gdbarch, from), paddress (gdbarch, to),
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paddress (gdbarch, pc), (int) amode);
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/* Handle absolute branch and save instructions. */
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if (is_rr (insn, op_basr, &r1, &r2)
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|| is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
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{
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/* Recompute saved return address in R1. */
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regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
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amode | (from + insnlen));
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}
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/* Handle absolute branch instructions. */
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else if (is_rr (insn, op_bcr, &r1, &r2)
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|| is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
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|| is_rr (insn, op_bctr, &r1, &r2)
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|| is_rre (insn, op_bctgr, &r1, &r2)
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|| is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
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|| is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
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|| is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
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|| is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
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|| is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
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|| is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
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{
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/* Update PC iff branch was *not* taken. */
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if (pc == to + insnlen)
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regcache_write_pc (regs, from + insnlen);
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}
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/* Handle PC-relative branch and save instructions. */
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else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
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|| is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
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{
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/* Update PC. */
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regcache_write_pc (regs, pc - to + from);
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/* Recompute saved return address in R1. */
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regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
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amode | (from + insnlen));
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}
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/* Handle PC-relative branch instructions. */
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else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
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|| is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
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|| is_ri (insn, op1_brct, op2_brct, &r1, &i2)
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|| is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
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|| is_rsi (insn, op_brxh, &r1, &r3, &i2)
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|| is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
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|| is_rsi (insn, op_brxle, &r1, &r3, &i2)
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|| is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
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{
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/* Update PC. */
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regcache_write_pc (regs, pc - to + from);
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}
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/* Handle LOAD ADDRESS RELATIVE LONG. */
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else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
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{
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/* Recompute output address in R1. */
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regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
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amode | (from + insnlen + i2*2));
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}
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/* If we executed a breakpoint instruction, point PC right back at it. */
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else if (insn[0] == 0x0 && insn[1] == 0x1)
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regcache_write_pc (regs, from);
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/* For any other insn, PC points right after the original instruction. */
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else
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regcache_write_pc (regs, from + insnlen);
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}
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/* Normal stack frames. */
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@ -2398,6 +2550,16 @@ s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
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set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
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/* Displaced stepping. */
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set_gdbarch_displaced_step_copy_insn (gdbarch,
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simple_displaced_step_copy_insn);
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set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
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set_gdbarch_displaced_step_free_closure (gdbarch,
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simple_displaced_step_free_closure);
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set_gdbarch_displaced_step_location (gdbarch,
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displaced_step_at_entry_point);
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set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
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switch (info.bfd_arch_info->mach)
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{
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case bfd_mach_s390_31:
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