* sky->devo merge, final part of sim merge
[ChangeLog.sky] 1998-12-08 Frank Ch. Eigler <fche@cygnus.com> * sim-main.h (sim_state): Add multi-phase load tracking fields. * sky-gdb.c (sky_option_handler): Add --load-next option handling. * mips.igen (BREAK): Add multi-phase load and printf code handling.
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Load Diff
@ -516,31 +516,8 @@ struct _sim_cpu {
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address_word dspc; /* delay-slot PC */
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address_word dspc; /* delay-slot PC */
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#define DSPC ((CPU)->dspc)
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#define DSPC ((CPU)->dspc)
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#if !WITH_IGEN
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/* Issue a delay slot instruction immediatly by re-calling
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idecode_issue */
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#define DELAY_SLOT(TARGET) \
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do { \
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address_word target = (TARGET); \
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instruction_word delay_insn; \
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sim_events_slip (SD, 1); \
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CIA = CIA + 4; /* NOTE not mips16 */ \
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STATE |= simDELAYSLOT; \
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delay_insn = IMEM32 (CIA); /* NOTE not mips16 */ \
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idecode_issue (CPU_, delay_insn, (CIA)); \
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STATE &= ~simDELAYSLOT; \
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NIA = target; \
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} while (0)
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#define NULLIFY_NEXT_INSTRUCTION() \
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do { \
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sim_events_slip (SD, 1); \
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dotrace (SD, CPU, tracefh, 2, NIA, 4, "load instruction"); \
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NIA = CIA + 8; \
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} while (0)
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#else
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#define DELAY_SLOT(TARGET) NIA = delayslot32 (SD_, (TARGET))
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#define DELAY_SLOT(TARGET) NIA = delayslot32 (SD_, (TARGET))
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#define NULLIFY_NEXT_INSTRUCTION() NIA = nullify_next_insn32 (SD_)
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#define NULLIFY_NEXT_INSTRUCTION() NIA = nullify_next_insn32 (SD_)
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#endif
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/* State of the simulator */
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/* State of the simulator */
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@ -807,12 +784,28 @@ struct sim_state {
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/* start-sanitize-sky */
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/* start-sanitize-sky */
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#ifdef TARGET_SKY
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#ifdef TARGET_SKY
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#ifdef SKY_FUNIT
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#ifdef SKY_FUNIT
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/* Record of option for floating point implementation type. */
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/* Record of option for floating point implementation type. */
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int fp_type_opt;
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int fp_type_opt;
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#define STATE_FP_TYPE_OPT(sd) ((sd)->fp_type_opt)
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#define STATE_FP_TYPE_OPT(sd) ((sd)->fp_type_opt)
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#define STATE_FP_TYPE_OPT_ACCURATE 0x80000000
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#define STATE_FP_TYPE_OPT_ACCURATE 0x80000000
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#endif
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#endif
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/* Index of next unused name slot for multi-phase load list. */
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int next_mload_count;
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#define STATE_MLOAD_COUNT(sd) ((sd)->next_mload_count)
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#define MAX_MLOAD_COUNT 2 /* limit for next_load_count and load_index */
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/* Program names for multi-phase load. */
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char *next_mload_name[MAX_MLOAD_COUNT];
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#define STATE_MLOAD_NAME(sd) ((sd)->next_mload_name)
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/* Index of next program for multi-phase load. */
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int mload_index;
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#define STATE_MLOAD_INDEX(sd) ((sd)->mload_index)
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#endif
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#endif
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/* end-sanitize-sky */
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/* end-sanitize-sky */
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@ -1046,6 +1039,8 @@ void decode_coproc PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigne
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#define DecodeCoproc(instruction) \
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#define DecodeCoproc(instruction) \
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decode_coproc (SD, CPU, cia, (instruction))
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decode_coproc (SD, CPU, cia, (instruction))
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void sim_monitor (SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int arg);
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/* Memory accesses */
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/* Memory accesses */
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@ -1081,12 +1076,10 @@ decode_coproc (SD, CPU, cia, (instruction))
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#define AccessLength_DOUBLEWORD (7)
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#define AccessLength_DOUBLEWORD (7)
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#define AccessLength_QUADWORD (15)
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#define AccessLength_QUADWORD (15)
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#if (WITH_IGEN)
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#define LOADDRMASK (WITH_TARGET_WORD_BITSIZE == 64 \
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#define LOADDRMASK (WITH_TARGET_WORD_BITSIZE == 64 \
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? AccessLength_DOUBLEWORD /*7*/ \
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? AccessLength_DOUBLEWORD /*7*/ \
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: AccessLength_WORD /*3*/)
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: AccessLength_WORD /*3*/)
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#define PSIZE (WITH_TARGET_ADDRESS_BITSIZE)
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#define PSIZE (WITH_TARGET_ADDRESS_BITSIZE)
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#endif
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INLINE_SIM_MAIN (int) address_translation PARAMS ((SIM_DESC sd, sim_cpu *, address_word cia, address_word vAddr, int IorD, int LorS, address_word *pAddr, int *CCA, int raw));
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INLINE_SIM_MAIN (int) address_translation PARAMS ((SIM_DESC sd, sim_cpu *, address_word cia, address_word vAddr, int IorD, int LorS, address_word *pAddr, int *CCA, int raw));
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@ -1149,8 +1142,6 @@ SIM_RC sky_sim_module_install PARAMS ((SIM_DESC sd));
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#define MODULE_LIST sky_sim_module_install,
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#define MODULE_LIST sky_sim_module_install,
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void sim_monitor (SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int arg);
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#ifndef TM_TXVU_H /* In case GDB hasn't been configured yet */
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#ifndef TM_TXVU_H /* In case GDB hasn't been configured yet */
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enum txvu_cpu_context
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enum txvu_cpu_context
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{
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{
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