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Record right reg num of thumb special data instructions 

When GDB decodes these thumb special data instructions, such as 'mov sp, r7'
the Rd is got incorrectly.  According to the arch reference manual, the Rd
is DN:Rdn, in which DN is bit 7 and Rdn is bits 0 to 2.  This patch fixes it.

gdb:

2016-02-26  Yao Qi  <yao.qi@linaro.org>

	* arm-tdep.c (thumb_record_ld_st_reg_offset): Fix the register
	number of Rd.
This commit is contained in:
Yao Qi 2016-02-26 15:00:36 +00:00
parent ce90fefec9
commit 1f33efec7c
2 changed files with 9 additions and 4 deletions
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5
gdb/ChangeLog
View File

@ -1,3 +1,8 @@
2016-02-26 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (thumb_record_ld_st_reg_offset): Fix the register
number of Rd.
2016-02-25 Doug Evans <dje@google.com>
* remote-m32r-sdi.c (recv_char_data): Initialize val to avoid

8
gdb/arm-tdep.c
View File

@ -11512,10 +11512,10 @@ thumb_record_ld_st_reg_offset (insn_decode_record *thumb_insn_r)
}
else
{
/* Format 8; special data processing insns. */
reg_src1 = bits (thumb_insn_r->arm_insn, 0, 2);
record_buf[0] = ARM_PS_REGNUM;
record_buf[1] = reg_src1;
/* Format 8; special data processing insns. */
record_buf[0] = ARM_PS_REGNUM;
record_buf[1] = (bit (thumb_insn_r->arm_insn, 7) << 3
| bits (thumb_insn_r->arm_insn, 0, 2));
thumb_insn_r->reg_rec_count = 2;
}
}