Add new port: crx-elf
This commit is contained in:
parent
5c02dc5924
commit
1fe1f39c06
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@ -1,3 +1,30 @@
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2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
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* Makefile.am (ALL_MACHINES): Add cpu-crx.lo.
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(ALL_MACHINES_CFILES): Add cpu-crx.c.
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(BFD32_BACKENDS): Add elf32-crx.lo.
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(BFD32_BACKENDS_CFILES): Add elf32-crx.c.
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(cpu-crx.lo): New target.
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(elf32-crx.lo): New target.
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* Makefile.in: Regenerate.
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* archures.c (bfd_architecture): Add bfd_{arch,mach}_crx.
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(bfd_archures_list): Add bfd_crx_arch.
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* bfd-in2.h: Regenerate.
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* config.bfd: Handle crx-*-elf*, crx*.
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* configure.in: Handle bfd_elf32_crx_vec.
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* configure: Regenerate.
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* cpu-crx.c: New file.
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* elf32-crx.c: Likewise.
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* libbfd.h: Regenerate.
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* reloc.c: Add BFD_RELOC_CRX_REL4, BFD_RELOC_CRX_REL8,
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BFD_RELOC_CRX_REL8_CMP, BFD_RELOC_CRX_REL16, BFD_RELOC_CRX_REL24,
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BFD_RELOC_CRX_REL32, BFD_RELOC_CRX_REGREL12, BFD_RELOC_CRX_REGREL22,
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BFD_RELOC_CRX_REGREL28, BFD_RELOC_CRX_REGREL32, BFD_RELOC_CRX_ABS16,
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BFD_RELOC_CRX_ABS32, BFD_RELOC_CRX_NUM8, BFD_RELOC_CRX_NUM16,
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BFD_RELOC_CRX_NUM32, BFD_RELOC_CRX_IMM16 and BFD_RELOC_CRX_IMM32
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* targets.c (bfd_elf32_crx_vec): Declare.
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(bfd_target_vector): Add bfd_elf32_crx_vec.
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2004-07-06 Nick Clifton <nickc@redhat.com>
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* config.bfd: Add sh-symbian-elf target.
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@ -5,28 +32,28 @@
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* configure: Regenerate.
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* elf-bfd.h (struct elf_backend_data): Add new field
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'check_directives'.
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* elflink.c (elf_link_add_object_symbols): Invoke the
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* elflink.c (elf_link_add_object_symbols): Invoke the
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check_directives function, if defined.
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* elfxx-target.h: Provide a default, NULL definition for
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* elfxx-target.h: Provide a default, NULL definition for
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check_directives.
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* targets.c: Add bfd_elf32_shl_symbian_vec.
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* elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
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* targets.c: Add bfd_elf32_shl_symbian_vec.
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* elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
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definition.
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(elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
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(elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
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* sh_elf_get_flags_from_mach, sh_elf_find_flags): Likewise.
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(TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
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(TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
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not already been defined.
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* elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
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* sh-symbian.c: New file. Provide functions to support the
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* elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
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* sh-symbian.c: New file. Provide functions to support the
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* sh-symbian-elf target.
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* Makefile.am: Add elf32-sh-symbian.c
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* Makefile.in: Regenerate.
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2004-07-05 Andrew Stubbs <andrew.stubbs@superh.com>
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* elf32-sh.c: Include ../opcodes/sh-opc.h .
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* Makefile.am: Ran make dep-am .
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* Makefile.in: Ran make dep-in .
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* elf32-sh.c: Include ../opcodes/sh-opc.h.
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* Makefile.am: Ran make dep-am.
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* Makefile.in: Ran make dep-in.
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2004-07-03 Aaron W. LaFramboise <aaron98wiridge9@aaronwl.com>
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@ -123,7 +150,7 @@
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2004-06-29 Alan Modra <amodra@bigpond.net.au>
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* bfd-in.h (bfd_get_section_limit): Define.
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* reloc.c (bfd_perform_relocation, bfd_install_relocation)
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* reloc.c (bfd_perform_relocation, bfd_install_relocation)
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(_bfd_final_link_relocate): Use bfd_get_section_limit.
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* aout-tic30.c (tic30_aout_final_link_relocate): Likewise.
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* coff-arm.c (coff_arm_relocate_section): Likewise.
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@ -132,9 +159,9 @@
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(bfd_ns32k_final_link_relocate): Likewise.
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* elf32-d30v.c (bfd_elf_d30v_reloc, bfd_elf_d30v_reloc_21): Likwise.
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* elf32-dlx.c (_bfd_dlx_elf_hi16_reloc): Likewise.
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* elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
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* elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
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(i860_howto_highadj_reloc, i860_howto_splitn_reloc): Likewise.
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* elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
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* elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
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(m32r_elf_generic_reloc, m32r_elf_relocate_section): Likewise.
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* elf32-m68hc1x.c (m68hc11_elf_special_reloc): Likewise.
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* elf32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
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@ -154,8 +181,8 @@
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* elf64-s390.c (s390_elf_ldisp_reloc): Likewise.
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* elf64-sparc.c (init_insn_reloc): Likewise.
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* elfn32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
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* elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
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(_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
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* elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
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(_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
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(_bfd_mips_elf_generic_reloc): Likewise.
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* bfd-in2.h: Regenerate.
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@ -60,6 +60,7 @@ ALL_MACHINES = \
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cpu-avr.lo \
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cpu-cr16c.lo \
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cpu-cris.lo \
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cpu-crx.lo \
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cpu-d10v.lo \
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cpu-d30v.lo \
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cpu-dlx.lo \
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@ -116,6 +117,7 @@ ALL_MACHINES_CFILES = \
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cpu-avr.c \
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cpu-cris.c \
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cpu-cr16c.c \
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cpu-crx.c \
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cpu-d10v.c \
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cpu-d30v.c \
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cpu-dlx.c \
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@ -220,6 +222,7 @@ BFD32_BACKENDS = \
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elf32-avr.lo \
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elf32-cr16c.lo \
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elf32-cris.lo \
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elf32-crx.lo \
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elf32-d10v.lo \
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elf32-d30v.lo \
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elf32-dlx.lo \
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@ -388,6 +391,7 @@ BFD32_BACKENDS_CFILES = \
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elf32-avr.c \
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elf32-cr16c.c \
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elf32-cris.c \
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elf32-crx.c \
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elf32-d10v.c \
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elf32-d30v.c \
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elf32-dlx.c \
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@ -938,6 +942,7 @@ cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
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cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
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cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
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cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
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cpu-crx.lo: cpu-crx.c $(INCDIR)/filenames.h
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cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
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cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
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cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
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@ -1167,6 +1172,10 @@ elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
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$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
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$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
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elf32-target.h
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elf32-crx.lo: elf32-crx.c $(INCDIR)/filenames.h elf-bfd.h \
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$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
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$(INCDIR)/bfdlink.h $(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h \
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elf32-target.h
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elf32-d10v.lo: elf32-d10v.c $(INCDIR)/filenames.h elf-bfd.h \
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$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
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$(INCDIR)/bfdlink.h $(INCDIR)/elf/d10v.h $(INCDIR)/elf/reloc-macros.h \
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@ -186,6 +186,7 @@ ALL_MACHINES = \
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cpu-avr.lo \
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cpu-cr16c.lo \
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cpu-cris.lo \
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cpu-crx.lo \
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cpu-d10v.lo \
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cpu-d30v.lo \
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cpu-dlx.lo \
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@ -243,6 +244,7 @@ ALL_MACHINES_CFILES = \
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cpu-avr.c \
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cpu-cris.c \
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cpu-cr16c.c \
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cpu-crx.c \
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cpu-d10v.c \
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cpu-d30v.c \
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cpu-dlx.c \
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@ -348,6 +350,7 @@ BFD32_BACKENDS = \
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elf32-avr.lo \
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elf32-cr16c.lo \
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elf32-cris.lo \
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elf32-crx.lo \
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elf32-d10v.lo \
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elf32-d30v.lo \
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elf32-dlx.lo \
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@ -517,6 +520,7 @@ BFD32_BACKENDS_CFILES = \
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elf32-avr.c \
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elf32-cr16c.c \
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elf32-cris.c \
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elf32-crx.c \
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elf32-d10v.c \
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elf32-d30v.c \
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elf32-dlx.c \
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@ -1471,6 +1475,7 @@ cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
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cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
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cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
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cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
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cpu-crx.lo: cpu-crx.c $(INCDIR)/filenames.h
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cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
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cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
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cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
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@ -1700,6 +1705,10 @@ elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
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$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
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$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
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elf32-target.h
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elf32-crx.lo: elf32-crx.c $(INCDIR)/filenames.h elf-bfd.h \
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$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
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$(INCDIR)/bfdlink.h $(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h \
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elf32-target.h
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elf32-d10v.lo: elf32-d10v.c $(INCDIR)/filenames.h elf-bfd.h \
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$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
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$(INCDIR)/bfdlink.h $(INCDIR)/elf/d10v.h $(INCDIR)/elf/reloc-macros.h \
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@ -315,6 +315,8 @@ DESCRIPTION
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.#define bfd_mach_avr5 5
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. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
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.#define bfd_mach_cr16c 1
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. bfd_arch_crx, {* National Semiconductor CRX. *}
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.#define bfd_mach_crx 1
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. bfd_arch_cris, {* Axis CRIS *}
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. bfd_arch_s390, {* IBM s390 *}
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.#define bfd_mach_s390_31 31
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@ -385,6 +387,7 @@ extern const bfd_arch_info_type bfd_arm_arch;
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extern const bfd_arch_info_type bfd_avr_arch;
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extern const bfd_arch_info_type bfd_cr16c_arch;
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extern const bfd_arch_info_type bfd_cris_arch;
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extern const bfd_arch_info_type bfd_crx_arch;
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extern const bfd_arch_info_type bfd_d10v_arch;
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extern const bfd_arch_info_type bfd_d30v_arch;
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extern const bfd_arch_info_type bfd_dlx_arch;
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@ -446,6 +449,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
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&bfd_avr_arch,
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&bfd_cr16c_arch,
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&bfd_cris_arch,
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&bfd_crx_arch,
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&bfd_d10v_arch,
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&bfd_d30v_arch,
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&bfd_dlx_arch,
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@ -1756,6 +1756,8 @@ enum bfd_architecture
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#define bfd_mach_avr5 5
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bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
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#define bfd_mach_cr16c 1
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bfd_arch_crx, /* National Semiconductor CRX. */
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#define bfd_mach_crx 1
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bfd_arch_cris, /* Axis CRIS */
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bfd_arch_s390, /* IBM s390 */
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#define bfd_mach_s390_31 31
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@ -3436,6 +3438,25 @@ This is the 5 bits of a value. */
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BFD_RELOC_16C_IMM32,
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BFD_RELOC_16C_IMM32_C,
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/* NS CRX Relocations. */
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BFD_RELOC_CRX_REL4,
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BFD_RELOC_CRX_REL8,
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BFD_RELOC_CRX_REL8_CMP,
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BFD_RELOC_CRX_REL16,
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BFD_RELOC_CRX_REL24,
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BFD_RELOC_CRX_REL32,
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BFD_RELOC_CRX_REGREL12,
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BFD_RELOC_CRX_REGREL22,
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BFD_RELOC_CRX_REGREL28,
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BFD_RELOC_CRX_REGREL32,
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BFD_RELOC_CRX_ABS16,
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BFD_RELOC_CRX_ABS32,
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BFD_RELOC_CRX_NUM8,
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BFD_RELOC_CRX_NUM16,
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BFD_RELOC_CRX_NUM32,
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BFD_RELOC_CRX_IMM16,
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BFD_RELOC_CRX_IMM32,
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/* These relocs are only used within the CRIS assembler. They are not
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(at present) written to any object files. */
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BFD_RELOC_CRIS_BDISP8,
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@ -52,6 +52,7 @@ arm*) targ_archs=bfd_arm_arch ;;
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c30*) targ_archs=bfd_tic30_arch ;;
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c4x*) targ_archs=bfd_tic4x_arch ;;
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c54x*) targ_archs=bfd_tic54x_arch ;;
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crx*) targ_archs=bfd_crx_arch ;;
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dlx*) targ_archs=bfd_dlx_arch ;;
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hppa*) targ_archs=bfd_hppa_arch ;;
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i[3-7]86) targ_archs=bfd_i386_arch ;;
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@ -324,6 +325,11 @@ case "${targ}" in
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targ_underscore=yes # Note: not true for bfd_elf32_cris_vec.
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;;
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crx-*-elf*)
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targ_defvec=bfd_elf32_crx_vec
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targ_underscore=yes
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;;
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d10v-*-*)
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targ_defvec=bfd_elf32_d10v_vec
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;;
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@ -6280,6 +6280,7 @@ do
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bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
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bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
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bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
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bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
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bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
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bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
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bfd_elf32_dlx_big_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
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@ -6569,10 +6570,10 @@ case ${host64}-${target64}-${want64} in
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if test -n "$GCC" ; then
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bad_64bit_gcc=no;
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echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6
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echo "configure:6573: checking for gcc version with buggy 64-bit support" >&5
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echo "configure:6574: checking for gcc version with buggy 64-bit support" >&5
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# Add more tests for gcc versions with non-working 64-bit support here.
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cat > conftest.$ac_ext <<EOF
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#line 6576 "configure"
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#line 6577 "configure"
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#include "confdefs.h"
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:__GNUC__:__GNUC_MINOR__:__i386__:
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EOF
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@ -6614,12 +6615,12 @@ esac
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for ac_func in ftello ftello64 fseeko fseeko64
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do
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echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
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echo "configure:6618: checking for $ac_func" >&5
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echo "configure:6619: checking for $ac_func" >&5
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if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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cat > conftest.$ac_ext <<EOF
|
||||
#line 6623 "configure"
|
||||
#line 6624 "configure"
|
||||
#include "confdefs.h"
|
||||
/* System header to define __stub macros and hopefully few prototypes,
|
||||
which can conflict with char $ac_func(); below. */
|
||||
|
@ -6642,7 +6643,7 @@ $ac_func();
|
|||
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:6646: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
if { (eval echo configure:6647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
rm -rf conftest*
|
||||
eval "ac_cv_func_$ac_func=yes"
|
||||
else
|
||||
|
@ -6668,13 +6669,13 @@ done
|
|||
|
||||
if test x"$ac_cv_func_ftello" = xyes -a x"$ac_cv_func_fseeko" = xyes; then
|
||||
echo $ac_n "checking size of off_t""... $ac_c" 1>&6
|
||||
echo "configure:6672: checking size of off_t" >&5
|
||||
echo "configure:6673: checking size of off_t" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_sizeof_off_t'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
for ac_size in 4 8 1 2 16 12 ; do # List sizes in rough order of prevalence.
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 6678 "configure"
|
||||
#line 6679 "configure"
|
||||
#include "confdefs.h"
|
||||
#include "confdefs.h"
|
||||
#include <sys/types.h>
|
||||
|
@ -6684,7 +6685,7 @@ int main() {
|
|||
switch (0) case 0: case (sizeof (off_t) == $ac_size):;
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:6688: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
if { (eval echo configure:6689: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
rm -rf conftest*
|
||||
ac_cv_sizeof_off_t=$ac_size
|
||||
else
|
||||
|
@ -6708,7 +6709,7 @@ EOF
|
|||
|
||||
fi
|
||||
echo $ac_n "checking file_ptr type""... $ac_c" 1>&6
|
||||
echo "configure:6712: checking file_ptr type" >&5
|
||||
echo "configure:6713: checking file_ptr type" >&5
|
||||
bfd_file_ptr="long"
|
||||
bfd_ufile_ptr="unsigned long"
|
||||
if test x"$ac_cv_func_ftello64" = xyes -a x"$ac_cv_func_fseeko64" = xyes \
|
||||
|
@ -6733,17 +6734,17 @@ for ac_hdr in unistd.h
|
|||
do
|
||||
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
|
||||
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
|
||||
echo "configure:6737: checking for $ac_hdr" >&5
|
||||
echo "configure:6738: checking for $ac_hdr" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 6742 "configure"
|
||||
#line 6743 "configure"
|
||||
#include "confdefs.h"
|
||||
#include <$ac_hdr>
|
||||
EOF
|
||||
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
|
||||
{ (eval echo configure:6747: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
|
||||
{ (eval echo configure:6748: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
|
||||
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
|
||||
if test -z "$ac_err"; then
|
||||
rm -rf conftest*
|
||||
|
@ -6772,12 +6773,12 @@ done
|
|||
for ac_func in getpagesize
|
||||
do
|
||||
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
|
||||
echo "configure:6776: checking for $ac_func" >&5
|
||||
echo "configure:6777: checking for $ac_func" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 6781 "configure"
|
||||
#line 6782 "configure"
|
||||
#include "confdefs.h"
|
||||
/* System header to define __stub macros and hopefully few prototypes,
|
||||
which can conflict with char $ac_func(); below. */
|
||||
|
@ -6800,7 +6801,7 @@ $ac_func();
|
|||
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:6804: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
if { (eval echo configure:6805: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
rm -rf conftest*
|
||||
eval "ac_cv_func_$ac_func=yes"
|
||||
else
|
||||
|
@ -6825,7 +6826,7 @@ fi
|
|||
done
|
||||
|
||||
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
|
||||
echo "configure:6829: checking for working mmap" >&5
|
||||
echo "configure:6830: checking for working mmap" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -6833,7 +6834,7 @@ else
|
|||
ac_cv_func_mmap_fixed_mapped=no
|
||||
else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 6837 "configure"
|
||||
#line 6838 "configure"
|
||||
#include "confdefs.h"
|
||||
|
||||
/* Thanks to Mike Haertel and Jim Avera for this test.
|
||||
|
@ -6973,7 +6974,7 @@ main()
|
|||
}
|
||||
|
||||
EOF
|
||||
if { (eval echo configure:6977: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
|
||||
if { (eval echo configure:6978: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
|
||||
then
|
||||
ac_cv_func_mmap_fixed_mapped=yes
|
||||
else
|
||||
|
@ -6998,12 +6999,12 @@ fi
|
|||
for ac_func in madvise mprotect
|
||||
do
|
||||
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
|
||||
echo "configure:7002: checking for $ac_func" >&5
|
||||
echo "configure:7003: checking for $ac_func" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 7007 "configure"
|
||||
#line 7008 "configure"
|
||||
#include "confdefs.h"
|
||||
/* System header to define __stub macros and hopefully few prototypes,
|
||||
which can conflict with char $ac_func(); below. */
|
||||
|
@ -7026,7 +7027,7 @@ $ac_func();
|
|||
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:7030: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
if { (eval echo configure:7031: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
rm -rf conftest*
|
||||
eval "ac_cv_func_$ac_func=yes"
|
||||
else
|
||||
|
|
|
@ -589,6 +589,7 @@ do
|
|||
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
|
||||
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
|
||||
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
|
||||
bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
|
||||
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
|
||||
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
|
||||
bfd_elf32_dlx_big_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
|
||||
|
|
|
@ -0,0 +1,39 @@
|
|||
/* BFD support for the CRX processor.
|
||||
Copyright 2004 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of BFD, the Binary File Descriptor library.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||
|
||||
#include "bfd.h"
|
||||
#include "sysdep.h"
|
||||
#include "libbfd.h"
|
||||
|
||||
|
||||
const bfd_arch_info_type bfd_crx_arch =
|
||||
{
|
||||
16, /* 16 bits in a word. */
|
||||
32, /* 32 bits in an address. */
|
||||
8, /* 8 bits in a byte. */
|
||||
bfd_arch_crx, /* enum bfd_architecture arch. */
|
||||
bfd_mach_crx,
|
||||
"crx", /* Arch name. */
|
||||
"crx", /* Printable name. */
|
||||
1, /* Unsigned int section alignment power. */
|
||||
TRUE, /* The one and only. */
|
||||
bfd_default_compatible,
|
||||
bfd_default_scan ,
|
||||
0,
|
||||
};
|
File diff suppressed because it is too large
Load Diff
17
bfd/libbfd.h
17
bfd/libbfd.h
|
@ -1508,6 +1508,23 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
|
|||
"BFD_RELOC_16C_IMM24_C",
|
||||
"BFD_RELOC_16C_IMM32",
|
||||
"BFD_RELOC_16C_IMM32_C",
|
||||
"BFD_RELOC_CRX_REL4",
|
||||
"BFD_RELOC_CRX_REL8",
|
||||
"BFD_RELOC_CRX_REL8_CMP",
|
||||
"BFD_RELOC_CRX_REL16",
|
||||
"BFD_RELOC_CRX_REL24",
|
||||
"BFD_RELOC_CRX_REL32",
|
||||
"BFD_RELOC_CRX_REGREL12",
|
||||
"BFD_RELOC_CRX_REGREL22",
|
||||
"BFD_RELOC_CRX_REGREL28",
|
||||
"BFD_RELOC_CRX_REGREL32",
|
||||
"BFD_RELOC_CRX_ABS16",
|
||||
"BFD_RELOC_CRX_ABS32",
|
||||
"BFD_RELOC_CRX_NUM8",
|
||||
"BFD_RELOC_CRX_NUM16",
|
||||
"BFD_RELOC_CRX_NUM32",
|
||||
"BFD_RELOC_CRX_IMM16",
|
||||
"BFD_RELOC_CRX_IMM32",
|
||||
"BFD_RELOC_CRIS_BDISP8",
|
||||
"BFD_RELOC_CRIS_UNSIGNED_5",
|
||||
"BFD_RELOC_CRIS_SIGNED_6",
|
||||
|
|
37
bfd/reloc.c
37
bfd/reloc.c
|
@ -3854,6 +3854,43 @@ ENUMX
|
|||
ENUMDOC
|
||||
NS CR16C Relocations.
|
||||
|
||||
ENUM
|
||||
BFD_RELOC_CRX_REL4
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REL8
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REL8_CMP
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REL16
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REL24
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REL32
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REGREL12
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REGREL22
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REGREL28
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_REGREL32
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_ABS16
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_ABS32
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_NUM8
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_NUM16
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_NUM32
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_IMM16
|
||||
ENUMX
|
||||
BFD_RELOC_CRX_IMM32
|
||||
ENUMDOC
|
||||
NS CRX Relocations.
|
||||
|
||||
ENUM
|
||||
BFD_RELOC_CRIS_BDISP8
|
||||
ENUMX
|
||||
|
|
|
@ -532,6 +532,7 @@ extern const bfd_target bfd_elf32_bigarm_vec;
|
|||
extern const bfd_target bfd_elf32_bigmips_vec;
|
||||
extern const bfd_target bfd_elf32_cr16c_vec;
|
||||
extern const bfd_target bfd_elf32_cris_vec;
|
||||
extern const bfd_target bfd_elf32_crx_vec;
|
||||
extern const bfd_target bfd_elf32_d10v_vec;
|
||||
extern const bfd_target bfd_elf32_d30v_vec;
|
||||
extern const bfd_target bfd_elf32_dlx_big_vec;
|
||||
|
@ -826,6 +827,7 @@ static const bfd_target * const _bfd_target_vector[] = {
|
|||
&bfd_elf32_bigmips_vec,
|
||||
&bfd_elf32_cr16c_vec,
|
||||
&bfd_elf32_cris_vec,
|
||||
&bfd_elf32_crx_vec,
|
||||
&bfd_elf32_d10v_vec,
|
||||
&bfd_elf32_d30v_vec,
|
||||
&bfd_elf32_dlx_big_vec,
|
||||
|
|
|
@ -1,3 +1,11 @@
|
|||
2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* MAINTAINERS: Added myself to the list.
|
||||
* readelf.c: Include "elf/crx.h".
|
||||
(guess_is_rela): Handle EM_CRX.
|
||||
(get_machine_name): Likewise.
|
||||
(dump_relocations): Likewise.
|
||||
|
||||
2004-07-03 Aaron W. LaFramboise <aaron98wiridge9@aaronwl.com>
|
||||
|
||||
* doc/binutils.texi (nm): Clarify weak symbol description.
|
||||
|
|
|
@ -62,6 +62,7 @@ responsibility among the other maintainers.
|
|||
BUILD SYSTEM Ben Elliston <bje@gnu.org>
|
||||
BUILD SYSTEM Daniel Jacobowitz <dan@debian.org>
|
||||
CRIS Hans-Peter Nilsson <hp@axis.com>
|
||||
CRX Tomer Levi <Tomer.Levi@nsc.com>
|
||||
DWARF2 Jason Merrill <jason@redhat.com>
|
||||
FR30 Dave Brolley <brolley@redhat.com>
|
||||
FRV Dave Brolley <brolley@redhat.com>
|
||||
|
|
|
@ -105,6 +105,7 @@
|
|||
#include "elf/vax.h"
|
||||
#include "elf/x86-64.h"
|
||||
#include "elf/xstormy16.h"
|
||||
#include "elf/crx.h"
|
||||
#include "elf/iq2000.h"
|
||||
#include "elf/xtensa.h"
|
||||
|
||||
|
@ -678,6 +679,7 @@ guess_is_rela (unsigned long e_machine)
|
|||
case EM_MSP430:
|
||||
case EM_MSP430_OLD:
|
||||
case EM_XSTORMY16:
|
||||
case EM_CRX:
|
||||
case EM_VAX:
|
||||
case EM_IP2K:
|
||||
case EM_IP2K_OLD:
|
||||
|
@ -1166,6 +1168,10 @@ dump_relocations (FILE *file,
|
|||
rtype = elf_xstormy16_reloc_type (type);
|
||||
break;
|
||||
|
||||
case EM_CRX:
|
||||
rtype = elf_crx_reloc_type (type);
|
||||
break;
|
||||
|
||||
case EM_VAX:
|
||||
rtype = elf_vax_reloc_type (type);
|
||||
break;
|
||||
|
@ -1660,6 +1666,7 @@ get_machine_name (unsigned e_machine)
|
|||
case EM_XSTORMY16: return "Sanyo Xstormy16 CPU core";
|
||||
case EM_OPENRISC:
|
||||
case EM_OR32: return "OpenRISC";
|
||||
case EM_CRX: return "National Semiconductor CRX microprocessor";
|
||||
case EM_DLX: return "OpenDLX";
|
||||
case EM_IP2K_OLD:
|
||||
case EM_IP2K: return "Ubicom IP2xxx 8-bit microcontrollers";
|
||||
|
|
|
@ -455,6 +455,10 @@ case $basic_machine in
|
|||
cris | cris-* | etrax*)
|
||||
basic_machine=cris-axis
|
||||
;;
|
||||
crx)
|
||||
basic_machine=crx-unknown
|
||||
os=-elf
|
||||
;;
|
||||
da30 | da30-*)
|
||||
basic_machine=m68k-da30
|
||||
;;
|
||||
|
|
|
@ -48,6 +48,7 @@ program_suffix=NONE
|
|||
program_transform_name=s,x,x,
|
||||
silent=
|
||||
site=
|
||||
sitefile=
|
||||
srcdir=
|
||||
target=NONE
|
||||
verbose=
|
||||
|
@ -162,6 +163,7 @@ Configuration:
|
|||
--help print this message
|
||||
--no-create do not create output files
|
||||
--quiet, --silent do not print \`checking...' messages
|
||||
--site-file=FILE use FILE as the site file
|
||||
--version print the version of autoconf that created configure
|
||||
Directory and file names:
|
||||
--prefix=PREFIX install architecture-independent files in PREFIX
|
||||
|
@ -332,6 +334,11 @@ EOF
|
|||
-site=* | --site=* | --sit=*)
|
||||
site="$ac_optarg" ;;
|
||||
|
||||
-site-file | --site-file | --site-fil | --site-fi | --site-f)
|
||||
ac_prev=sitefile ;;
|
||||
-site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
|
||||
sitefile="$ac_optarg" ;;
|
||||
|
||||
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
|
||||
ac_prev=srcdir ;;
|
||||
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
|
||||
|
@ -497,12 +504,16 @@ fi
|
|||
srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
|
||||
|
||||
# Prefer explicitly selected file to automatically selected ones.
|
||||
if test -z "$CONFIG_SITE"; then
|
||||
if test "x$prefix" != xNONE; then
|
||||
CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
|
||||
else
|
||||
CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
|
||||
if test -z "$sitefile"; then
|
||||
if test -z "$CONFIG_SITE"; then
|
||||
if test "x$prefix" != xNONE; then
|
||||
CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
|
||||
else
|
||||
CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
|
||||
fi
|
||||
fi
|
||||
else
|
||||
CONFIG_SITE="$sitefile"
|
||||
fi
|
||||
for ac_site_file in $CONFIG_SITE; do
|
||||
if test -r "$ac_site_file"; then
|
||||
|
@ -589,7 +600,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
|
|||
fi
|
||||
|
||||
echo $ac_n "checking host system type""... $ac_c" 1>&6
|
||||
echo "configure:593: checking host system type" >&5
|
||||
echo "configure:604: checking host system type" >&5
|
||||
|
||||
host_alias=$host
|
||||
case "$host_alias" in
|
||||
|
@ -610,7 +621,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
|
|||
echo "$ac_t""$host" 1>&6
|
||||
|
||||
echo $ac_n "checking target system type""... $ac_c" 1>&6
|
||||
echo "configure:614: checking target system type" >&5
|
||||
echo "configure:625: checking target system type" >&5
|
||||
|
||||
target_alias=$target
|
||||
case "$target_alias" in
|
||||
|
@ -628,7 +639,7 @@ target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
|
|||
echo "$ac_t""$target" 1>&6
|
||||
|
||||
echo $ac_n "checking build system type""... $ac_c" 1>&6
|
||||
echo "configure:632: checking build system type" >&5
|
||||
echo "configure:643: checking build system type" >&5
|
||||
|
||||
build_alias=$build
|
||||
case "$build_alias" in
|
||||
|
@ -683,7 +694,7 @@ test "$program_transform_name" = "" && program_transform_name="s,x,x,"
|
|||
# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
|
||||
# ./install, which can be erroneously created by make from ./install.sh.
|
||||
echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
|
||||
echo "configure:687: checking for a BSD compatible install" >&5
|
||||
echo "configure:698: checking for a BSD compatible install" >&5
|
||||
if test -z "$INSTALL"; then
|
||||
if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
|
@ -736,7 +747,7 @@ test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
|
|||
test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
|
||||
|
||||
echo $ac_n "checking whether ln works""... $ac_c" 1>&6
|
||||
echo "configure:740: checking whether ln works" >&5
|
||||
echo "configure:751: checking whether ln works" >&5
|
||||
if eval "test \"`echo '$''{'acx_cv_prog_LN'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -760,7 +771,7 @@ else
|
|||
fi
|
||||
|
||||
echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6
|
||||
echo "configure:764: checking whether ln -s works" >&5
|
||||
echo "configure:775: checking whether ln -s works" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -1283,6 +1294,9 @@ case "${target}" in
|
|||
cris-*-*)
|
||||
noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
|
||||
;;
|
||||
crx-*-*)
|
||||
noconfigdirs="$noconfigdirs target-libgloss target-libstdc++-v3 target-libmudflap ${libgcj}"
|
||||
;;
|
||||
d10v-*-*)
|
||||
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
|
||||
;;
|
||||
|
@ -1769,7 +1783,7 @@ else
|
|||
# Extract the first word of "gcc", so it can be a program name with args.
|
||||
set dummy gcc; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:1773: checking for $ac_word" >&5
|
||||
echo "configure:1787: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -1799,7 +1813,7 @@ if test -z "$CC"; then
|
|||
# Extract the first word of "cc", so it can be a program name with args.
|
||||
set dummy cc; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:1803: checking for $ac_word" >&5
|
||||
echo "configure:1817: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -1850,7 +1864,7 @@ fi
|
|||
# Extract the first word of "cl", so it can be a program name with args.
|
||||
set dummy cl; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:1854: checking for $ac_word" >&5
|
||||
echo "configure:1868: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -1882,7 +1896,7 @@ fi
|
|||
fi
|
||||
|
||||
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
|
||||
echo "configure:1886: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
|
||||
echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
|
||||
|
||||
ac_ext=c
|
||||
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
|
||||
|
@ -1893,12 +1907,12 @@ cross_compiling=$ac_cv_prog_cc_cross
|
|||
|
||||
cat > conftest.$ac_ext << EOF
|
||||
|
||||
#line 1897 "configure"
|
||||
#line 1911 "configure"
|
||||
#include "confdefs.h"
|
||||
|
||||
main(){return(0);}
|
||||
EOF
|
||||
if { (eval echo configure:1902: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
ac_cv_prog_cc_works=yes
|
||||
# If we can't run a trivial program, we are probably using a cross compiler.
|
||||
if (./conftest; exit) 2>/dev/null; then
|
||||
|
@ -1924,12 +1938,12 @@ if test $ac_cv_prog_cc_works = no; then
|
|||
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
|
||||
fi
|
||||
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
|
||||
echo "configure:1928: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
|
||||
echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
|
||||
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
|
||||
cross_compiling=$ac_cv_prog_cc_cross
|
||||
|
||||
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
|
||||
echo "configure:1933: checking whether we are using GNU C" >&5
|
||||
echo "configure:1947: checking whether we are using GNU C" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -1938,7 +1952,7 @@ else
|
|||
yes;
|
||||
#endif
|
||||
EOF
|
||||
if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1942: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
|
||||
if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
|
||||
ac_cv_prog_gcc=yes
|
||||
else
|
||||
ac_cv_prog_gcc=no
|
||||
|
@ -1957,7 +1971,7 @@ ac_test_CFLAGS="${CFLAGS+set}"
|
|||
ac_save_CFLAGS="$CFLAGS"
|
||||
CFLAGS=
|
||||
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
|
||||
echo "configure:1961: checking whether ${CC-cc} accepts -g" >&5
|
||||
echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2024,7 +2038,7 @@ fi
|
|||
# Extract the first word of "${ac_tool_prefix}gnatbind", so it can be a program name with args.
|
||||
set dummy ${ac_tool_prefix}gnatbind; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2028: checking for $ac_word" >&5
|
||||
echo "configure:2042: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_GNATBIND'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2056,7 +2070,7 @@ if test -n "$ac_tool_prefix"; then
|
|||
# Extract the first word of "gnatbind", so it can be a program name with args.
|
||||
set dummy gnatbind; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2060: checking for $ac_word" >&5
|
||||
echo "configure:2074: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_GNATBIND'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2089,7 +2103,7 @@ fi
|
|||
fi
|
||||
|
||||
echo $ac_n "checking whether compiler driver understands Ada""... $ac_c" 1>&6
|
||||
echo "configure:2093: checking whether compiler driver understands Ada" >&5
|
||||
echo "configure:2107: checking whether compiler driver understands Ada" >&5
|
||||
if eval "test \"`echo '$''{'acx_cv_cc_gcc_supports_ada'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2122,7 +2136,7 @@ else
|
|||
fi
|
||||
|
||||
echo $ac_n "checking how to compare bootstrapped objects""... $ac_c" 1>&6
|
||||
echo "configure:2126: checking how to compare bootstrapped objects" >&5
|
||||
echo "configure:2140: checking how to compare bootstrapped objects" >&5
|
||||
if eval "test \"`echo '$''{'gcc_cv_prog_cmp_skip'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2195,9 +2209,9 @@ saved_CFLAGS="$CFLAGS"
|
|||
CFLAGS="$CFLAGS $gmpinc"
|
||||
# Check GMP actually works
|
||||
echo $ac_n "checking for correct version of gmp.h""... $ac_c" 1>&6
|
||||
echo "configure:2199: checking for correct version of gmp.h" >&5
|
||||
echo "configure:2213: checking for correct version of gmp.h" >&5
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 2201 "configure"
|
||||
#line 2215 "configure"
|
||||
#include "confdefs.h"
|
||||
#include "gmp.h"
|
||||
int main() {
|
||||
|
@ -2208,7 +2222,7 @@ choke me
|
|||
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:2212: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
if { (eval echo configure:2226: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
|
||||
rm -rf conftest*
|
||||
echo "$ac_t""yes" 1>&6
|
||||
else
|
||||
|
@ -2221,19 +2235,19 @@ rm -f conftest*
|
|||
|
||||
if test x"$have_gmp" = xyes; then
|
||||
echo $ac_n "checking for mpf_init in -lgmp""... $ac_c" 1>&6
|
||||
echo "configure:2225: checking for mpf_init in -lgmp" >&5
|
||||
echo "configure:2239: checking for mpf_init in -lgmp" >&5
|
||||
|
||||
saved_LIBS="$LIBS"
|
||||
LIBS="$LIBS $gmplibs"
|
||||
cat > conftest.$ac_ext <<EOF
|
||||
#line 2230 "configure"
|
||||
#line 2244 "configure"
|
||||
#include "confdefs.h"
|
||||
#include <gmp.h>
|
||||
int main() {
|
||||
mpf_t n; mpf_init(n);
|
||||
; return 0; }
|
||||
EOF
|
||||
if { (eval echo configure:2237: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
if { (eval echo configure:2251: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
rm -rf conftest*
|
||||
echo "$ac_t""yes" 1>&6
|
||||
else
|
||||
|
@ -2706,7 +2720,7 @@ do
|
|||
# Extract the first word of "$ac_prog", so it can be a program name with args.
|
||||
set dummy $ac_prog; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2710: checking for $ac_word" >&5
|
||||
echo "configure:2724: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_BISON'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2741,7 +2755,7 @@ do
|
|||
# Extract the first word of "$ac_prog", so it can be a program name with args.
|
||||
set dummy $ac_prog; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2745: checking for $ac_word" >&5
|
||||
echo "configure:2759: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_YACC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2776,7 +2790,7 @@ do
|
|||
# Extract the first word of "$ac_prog", so it can be a program name with args.
|
||||
set dummy $ac_prog; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2780: checking for $ac_word" >&5
|
||||
echo "configure:2794: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_M4'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2811,7 +2825,7 @@ do
|
|||
# Extract the first word of "$ac_prog", so it can be a program name with args.
|
||||
set dummy $ac_prog; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2815: checking for $ac_word" >&5
|
||||
echo "configure:2829: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_FLEX'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2846,7 +2860,7 @@ do
|
|||
# Extract the first word of "$ac_prog", so it can be a program name with args.
|
||||
set dummy $ac_prog; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2850: checking for $ac_word" >&5
|
||||
echo "configure:2864: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_LEX'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -2881,7 +2895,7 @@ do
|
|||
# Extract the first word of "$ac_prog", so it can be a program name with args.
|
||||
set dummy $ac_prog; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:2885: checking for $ac_word" >&5
|
||||
echo "configure:2899: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_MAKEINFO'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3479,7 +3493,7 @@ test -n "$target_alias" && ncn_target_tool_prefix=$target_alias-
|
|||
# Extract the first word of "${ncn_tool_prefix}ar", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}ar; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3483: checking for $ac_word" >&5
|
||||
echo "configure:3497: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3512,7 +3526,7 @@ if test -z "$ac_cv_prog_AR" ; then
|
|||
# Extract the first word of "ar", so it can be a program name with args.
|
||||
set dummy ar; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3516: checking for $ac_word" >&5
|
||||
echo "configure:3530: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AR'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3551,7 +3565,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}as", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}as; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3555: checking for $ac_word" >&5
|
||||
echo "configure:3569: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3584,7 +3598,7 @@ if test -z "$ac_cv_prog_AS" ; then
|
|||
# Extract the first word of "as", so it can be a program name with args.
|
||||
set dummy as; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3588: checking for $ac_word" >&5
|
||||
echo "configure:3602: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AS'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3623,7 +3637,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}dlltool", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}dlltool; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3627: checking for $ac_word" >&5
|
||||
echo "configure:3641: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3656,7 +3670,7 @@ if test -z "$ac_cv_prog_DLLTOOL" ; then
|
|||
# Extract the first word of "dlltool", so it can be a program name with args.
|
||||
set dummy dlltool; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3660: checking for $ac_word" >&5
|
||||
echo "configure:3674: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_DLLTOOL'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3695,7 +3709,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}ld", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}ld; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3699: checking for $ac_word" >&5
|
||||
echo "configure:3713: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3728,7 +3742,7 @@ if test -z "$ac_cv_prog_LD" ; then
|
|||
# Extract the first word of "ld", so it can be a program name with args.
|
||||
set dummy ld; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3732: checking for $ac_word" >&5
|
||||
echo "configure:3746: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_LD'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3767,7 +3781,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}nm", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}nm; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3771: checking for $ac_word" >&5
|
||||
echo "configure:3785: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3800,7 +3814,7 @@ if test -z "$ac_cv_prog_NM" ; then
|
|||
# Extract the first word of "nm", so it can be a program name with args.
|
||||
set dummy nm; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3804: checking for $ac_word" >&5
|
||||
echo "configure:3818: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_NM'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3839,7 +3853,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}ranlib", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}ranlib; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3843: checking for $ac_word" >&5
|
||||
echo "configure:3857: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3872,7 +3886,7 @@ if test -z "$ac_cv_prog_RANLIB" ; then
|
|||
# Extract the first word of "ranlib", so it can be a program name with args.
|
||||
set dummy ranlib; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3876: checking for $ac_word" >&5
|
||||
echo "configure:3890: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_RANLIB'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3911,7 +3925,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}windres", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}windres; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3915: checking for $ac_word" >&5
|
||||
echo "configure:3929: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3944,7 +3958,7 @@ if test -z "$ac_cv_prog_WINDRES" ; then
|
|||
# Extract the first word of "windres", so it can be a program name with args.
|
||||
set dummy windres; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3948: checking for $ac_word" >&5
|
||||
echo "configure:3962: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_WINDRES'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -3983,7 +3997,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}objcopy", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}objcopy; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:3987: checking for $ac_word" >&5
|
||||
echo "configure:4001: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4016,7 +4030,7 @@ if test -z "$ac_cv_prog_OBJCOPY" ; then
|
|||
# Extract the first word of "objcopy", so it can be a program name with args.
|
||||
set dummy objcopy; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4020: checking for $ac_word" >&5
|
||||
echo "configure:4034: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_OBJCOPY'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4055,7 +4069,7 @@ fi
|
|||
# Extract the first word of "${ncn_tool_prefix}objdump", so it can be a program name with args.
|
||||
set dummy ${ncn_tool_prefix}objdump; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4059: checking for $ac_word" >&5
|
||||
echo "configure:4073: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4088,7 +4102,7 @@ if test -z "$ac_cv_prog_OBJDUMP" ; then
|
|||
# Extract the first word of "objdump", so it can be a program name with args.
|
||||
set dummy objdump; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4092: checking for $ac_word" >&5
|
||||
echo "configure:4106: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_OBJDUMP'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4134,7 +4148,7 @@ fi
|
|||
# Extract the first word of "${ncn_target_tool_prefix}ar", so it can be a program name with args.
|
||||
set dummy ${ncn_target_tool_prefix}ar; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4138: checking for $ac_word" >&5
|
||||
echo "configure:4152: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_AR_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4167,7 +4181,7 @@ if test -z "$ac_cv_prog_CONFIGURED_AR_FOR_TARGET" ; then
|
|||
# Extract the first word of "ar", so it can be a program name with args.
|
||||
set dummy ar; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4171: checking for $ac_word" >&5
|
||||
echo "configure:4185: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_AR_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4206,7 +4220,7 @@ fi
|
|||
# Extract the first word of "${ncn_target_tool_prefix}as", so it can be a program name with args.
|
||||
set dummy ${ncn_target_tool_prefix}as; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4210: checking for $ac_word" >&5
|
||||
echo "configure:4224: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_AS_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4239,7 +4253,7 @@ if test -z "$ac_cv_prog_CONFIGURED_AS_FOR_TARGET" ; then
|
|||
# Extract the first word of "as", so it can be a program name with args.
|
||||
set dummy as; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4243: checking for $ac_word" >&5
|
||||
echo "configure:4257: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_AS_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4278,7 +4292,7 @@ fi
|
|||
# Extract the first word of "${ncn_target_tool_prefix}dlltool", so it can be a program name with args.
|
||||
set dummy ${ncn_target_tool_prefix}dlltool; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4282: checking for $ac_word" >&5
|
||||
echo "configure:4296: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4311,7 +4325,7 @@ if test -z "$ac_cv_prog_CONFIGURED_DLLTOOL_FOR_TARGET" ; then
|
|||
# Extract the first word of "dlltool", so it can be a program name with args.
|
||||
set dummy dlltool; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4315: checking for $ac_word" >&5
|
||||
echo "configure:4329: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4350,7 +4364,7 @@ fi
|
|||
# Extract the first word of "${ncn_target_tool_prefix}ld", so it can be a program name with args.
|
||||
set dummy ${ncn_target_tool_prefix}ld; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4354: checking for $ac_word" >&5
|
||||
echo "configure:4368: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_LD_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4383,7 +4397,7 @@ if test -z "$ac_cv_prog_CONFIGURED_LD_FOR_TARGET" ; then
|
|||
# Extract the first word of "ld", so it can be a program name with args.
|
||||
set dummy ld; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4387: checking for $ac_word" >&5
|
||||
echo "configure:4401: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_LD_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4422,7 +4436,7 @@ fi
|
|||
# Extract the first word of "${ncn_target_tool_prefix}nm", so it can be a program name with args.
|
||||
set dummy ${ncn_target_tool_prefix}nm; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4426: checking for $ac_word" >&5
|
||||
echo "configure:4440: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_NM_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4455,7 +4469,7 @@ if test -z "$ac_cv_prog_CONFIGURED_NM_FOR_TARGET" ; then
|
|||
# Extract the first word of "nm", so it can be a program name with args.
|
||||
set dummy nm; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4459: checking for $ac_word" >&5
|
||||
echo "configure:4473: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_NM_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4494,7 +4508,7 @@ fi
|
|||
# Extract the first word of "${ncn_target_tool_prefix}ranlib", so it can be a program name with args.
|
||||
set dummy ${ncn_target_tool_prefix}ranlib; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4498: checking for $ac_word" >&5
|
||||
echo "configure:4512: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_RANLIB_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4527,7 +4541,7 @@ if test -z "$ac_cv_prog_CONFIGURED_RANLIB_FOR_TARGET" ; then
|
|||
# Extract the first word of "ranlib", so it can be a program name with args.
|
||||
set dummy ranlib; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4531: checking for $ac_word" >&5
|
||||
echo "configure:4545: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_RANLIB_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4566,7 +4580,7 @@ fi
|
|||
# Extract the first word of "${ncn_target_tool_prefix}windres", so it can be a program name with args.
|
||||
set dummy ${ncn_target_tool_prefix}windres; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4570: checking for $ac_word" >&5
|
||||
echo "configure:4584: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_WINDRES_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4599,7 +4613,7 @@ if test -z "$ac_cv_prog_CONFIGURED_WINDRES_FOR_TARGET" ; then
|
|||
# Extract the first word of "windres", so it can be a program name with args.
|
||||
set dummy windres; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:4603: checking for $ac_word" >&5
|
||||
echo "configure:4617: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_WINDRES_FOR_TARGET'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
@ -4684,7 +4698,7 @@ RANLIB_FOR_TARGET=${RANLIB_FOR_TARGET}${extra_ranlibflags_for_target}
|
|||
NM_FOR_TARGET=${NM_FOR_TARGET}${extra_nmflags_for_target}
|
||||
|
||||
echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
|
||||
echo "configure:4688: checking whether to enable maintainer-specific portions of Makefiles" >&5
|
||||
echo "configure:4702: checking whether to enable maintainer-specific portions of Makefiles" >&5
|
||||
# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
|
||||
if test "${enable_maintainer_mode+set}" = set; then
|
||||
enableval="$enable_maintainer_mode"
|
||||
|
@ -4731,7 +4745,7 @@ esac
|
|||
# gcc for stageN-gcc and stage-prev for stage(N-1). In case this is not
|
||||
# possible, however, we can resort to mv.
|
||||
echo $ac_n "checking if symbolic links between directories work""... $ac_c" 1>&6
|
||||
echo "configure:4735: checking if symbolic links between directories work" >&5
|
||||
echo "configure:4749: checking if symbolic links between directories work" >&5
|
||||
if eval "test \"`echo '$''{'gcc_cv_prog_ln_s_dir'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
|
|
|
@ -503,6 +503,9 @@ case "${target}" in
|
|||
cris-*-*)
|
||||
noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
|
||||
;;
|
||||
crx-*-*)
|
||||
noconfigdirs="$noconfigdirs target-libgloss target-libstdc++-v3 target-libmudflap ${libgcj}"
|
||||
;;
|
||||
d10v-*-*)
|
||||
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
|
||||
;;
|
||||
|
|
|
@ -1,3 +1,18 @@
|
|||
2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* Makefile.am (CPU_TYPES): Add crx.
|
||||
(TARGET_CPU_CFILES): Add config/tc-crx.c.
|
||||
(TARGET_CPU_HFILES): Add config/tc-crx.h.
|
||||
(DEPTC_crx_elf): New target.
|
||||
(DEPOBJ_crx_elf): Likewise.
|
||||
(DEP_crx_elf): Likewise.
|
||||
* Makefile.in: Regenerate.
|
||||
* configure.in: Add crx* target.
|
||||
* configure: Regenerate.
|
||||
* config/tc-crx.c: New file.
|
||||
* config/tc-crx.h: New file.
|
||||
* NEWS: Mention new target.
|
||||
|
||||
2004-07-06 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* config.in: Undefine TARGET_SYMBIAN by default.
|
||||
|
|
|
@ -46,6 +46,7 @@ CPU_TYPES = \
|
|||
arm \
|
||||
avr \
|
||||
cris \
|
||||
crx \
|
||||
d10v \
|
||||
d30v \
|
||||
dlx \
|
||||
|
@ -242,6 +243,7 @@ TARGET_CPU_CFILES = \
|
|||
config/tc-arm.c \
|
||||
config/tc-avr.c \
|
||||
config/tc-cris.c \
|
||||
config/tc-crx.c \
|
||||
config/tc-d10v.c \
|
||||
config/tc-d30v.c \
|
||||
config/tc-dlx.c \
|
||||
|
@ -294,6 +296,7 @@ TARGET_CPU_HFILES = \
|
|||
config/tc-arm.h \
|
||||
config/tc-avr.h \
|
||||
config/tc-cris.h \
|
||||
config/tc-crx.h \
|
||||
config/tc-d10v.h \
|
||||
config/tc-d30v.h \
|
||||
config/tc-dlx.h \
|
||||
|
@ -1049,6 +1052,11 @@ DEPTC_cris_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
|
|||
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
|
||||
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
|
||||
$(INCDIR)/opcode/cris.h dwarf2dbg.h
|
||||
DEPTC_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
|
||||
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
|
||||
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
|
||||
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
|
||||
$(INCDIR)/opcode/crx.h dwarf2dbg.h
|
||||
DEPTC_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
|
||||
$(srcdir)/config/tc-d10v.h $(INCDIR)/coff/internal.h \
|
||||
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
# Makefile.in generated by automake 1.8.4 from Makefile.am.
|
||||
# Makefile.in generated by automake 1.8.5 from Makefile.am.
|
||||
# @configure_input@
|
||||
|
||||
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
|
||||
|
@ -275,6 +275,7 @@ CPU_TYPES = \
|
|||
arm \
|
||||
avr \
|
||||
cris \
|
||||
crx \
|
||||
d10v \
|
||||
d30v \
|
||||
dlx \
|
||||
|
@ -469,6 +470,7 @@ TARGET_CPU_CFILES = \
|
|||
config/tc-arm.c \
|
||||
config/tc-avr.c \
|
||||
config/tc-cris.c \
|
||||
config/tc-crx.c \
|
||||
config/tc-d10v.c \
|
||||
config/tc-d30v.c \
|
||||
config/tc-dlx.c \
|
||||
|
@ -521,6 +523,7 @@ TARGET_CPU_HFILES = \
|
|||
config/tc-arm.h \
|
||||
config/tc-avr.h \
|
||||
config/tc-cris.h \
|
||||
config/tc-crx.h \
|
||||
config/tc-d10v.h \
|
||||
config/tc-d30v.h \
|
||||
config/tc-dlx.h \
|
||||
|
@ -843,6 +846,12 @@ DEPTC_cris_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
|
|||
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
|
||||
$(INCDIR)/opcode/cris.h dwarf2dbg.h
|
||||
|
||||
DEPTC_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
|
||||
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
|
||||
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
|
||||
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
|
||||
$(INCDIR)/opcode/crx.h dwarf2dbg.h
|
||||
|
||||
DEPTC_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
|
||||
$(srcdir)/config/tc-d10v.h $(INCDIR)/coff/internal.h \
|
||||
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
|
||||
|
@ -2737,7 +2746,7 @@ TAGS: tags-recursive $(HEADERS) $(SOURCES) config.in $(TAGS_DEPENDENCIES) \
|
|||
fi; \
|
||||
list='$(SUBDIRS)'; for subdir in $$list; do \
|
||||
if test "$$subdir" = .; then :; else \
|
||||
test -f $$subdir/TAGS && \
|
||||
test ! -f $$subdir/TAGS || \
|
||||
tags="$$tags $$include_option=$$here/$$subdir/TAGS"; \
|
||||
fi; \
|
||||
done; \
|
||||
|
@ -2748,7 +2757,7 @@ TAGS: tags-recursive $(HEADERS) $(SOURCES) config.in $(TAGS_DEPENDENCIES) \
|
|||
$(AWK) ' { files[$$0] = 1; } \
|
||||
END { for (i in files) print i; }'`; \
|
||||
if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
|
||||
test -z "$$unique" && unique=$$empty_fix; \
|
||||
test -n "$$unique" || unique=$$empty_fix; \
|
||||
$(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
|
||||
$$tags $$unique; \
|
||||
fi
|
||||
|
|
4
gas/NEWS
4
gas/NEWS
|
@ -1,5 +1,9 @@
|
|||
-*- text -*-
|
||||
|
||||
* Support for the crx-elf target added.
|
||||
|
||||
* Support for the sh-symbian-elf target added.
|
||||
|
||||
* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
|
||||
on pe[i]-i386; required for this target's DWARF 2 support.
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
# generated automatically by aclocal 1.8.4 -*- Autoconf -*-
|
||||
# generated automatically by aclocal 1.8.5 -*- Autoconf -*-
|
||||
|
||||
# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
|
||||
# Free Software Foundation, Inc.
|
||||
|
@ -40,7 +40,7 @@ AC_DEFUN([AM_AUTOMAKE_VERSION], [am__api_version="1.8"])
|
|||
# Call AM_AUTOMAKE_VERSION so it can be traced.
|
||||
# This function is AC_REQUIREd by AC_INIT_AUTOMAKE.
|
||||
AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION],
|
||||
[AM_AUTOMAKE_VERSION([1.8.4])])
|
||||
[AM_AUTOMAKE_VERSION([1.8.5])])
|
||||
|
||||
# AM_AUX_DIR_EXPAND
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,68 @@
|
|||
/* tc-crx.h -- Header file for tc-crx.c, the CRX GAS port.
|
||||
Copyright 2004 Free Software Foundation, Inc.
|
||||
|
||||
Contributed by Tomer Levi, NSC, Israel.
|
||||
Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
|
||||
Updates, BFDizing, GNUifying and ELF support by Tomer Levi.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2, or (at your option)
|
||||
any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to the
|
||||
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
|
||||
MA 02111-1307, USA. */
|
||||
|
||||
#ifndef TC_CRX_H
|
||||
#define TC_CRX_H
|
||||
|
||||
#define TC_CRX 1
|
||||
|
||||
#define TARGET_BYTES_BIG_ENDIAN 0
|
||||
|
||||
#define TARGET_FORMAT "elf32-crx"
|
||||
#define TARGET_ARCH bfd_arch_crx
|
||||
#define BFD_ARCH bfd_arch_crx
|
||||
|
||||
#define WORKING_DOT_WORD
|
||||
#define NEED_FX_R_TYPE
|
||||
#define LOCAL_LABEL_PREFIX '.'
|
||||
|
||||
#define md_undefined_symbol(s) 0
|
||||
#define md_number_to_chars number_to_chars_littleendian
|
||||
|
||||
/* We do relaxing in the assembler as well as the linker. */
|
||||
extern const struct relax_type md_relax_table[];
|
||||
#define TC_GENERIC_RELAX_TABLE md_relax_table
|
||||
|
||||
/* We do not want to adjust any relocations to make implementation of
|
||||
linker relaxations easier. */
|
||||
#define tc_fix_adjustable(fixP) 0
|
||||
|
||||
/* Fixup debug sections since we will never relax them. */
|
||||
#define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC)
|
||||
|
||||
/* CRX instructions, with operands included, are a multiple
|
||||
of two bytes long. */
|
||||
#define DWARF2_LINE_MIN_INSN_LENGTH 2
|
||||
|
||||
/* This is called by emit_expr when creating a reloc for a cons.
|
||||
We could use the definition there, except that we want to handle
|
||||
the CRX reloc type specially, rather than the BFD_RELOC type. */
|
||||
#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) \
|
||||
fix_new_exp (FRAG, OFF, (int)LEN, EXP, 0, \
|
||||
LEN == 1 ? BFD_RELOC_CRX_NUM8 \
|
||||
: LEN == 2 ? BFD_RELOC_CRX_NUM16 \
|
||||
: LEN == 4 ? BFD_RELOC_CRX_NUM32 \
|
||||
: BFD_RELOC_NONE);
|
||||
|
||||
#endif /* TC_CRX_H */
|
|
@ -4202,6 +4202,7 @@ for this_target in $target $canon_targets ; do
|
|||
sparc86x*) cpu_type=sparc arch=sparc86x ;;
|
||||
sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c.
|
||||
v850*) cpu_type=v850 ;;
|
||||
crx*) cpu_type=crx endian=little ;;
|
||||
xtensa*) cpu_type=xtensa arch=xtensa ;;
|
||||
m32r) cpu_type=m32r target_cpu=m32r endian=big ;;
|
||||
m32rle) cpu_type=m32r target_cpu=m32r endian=little ;;
|
||||
|
@ -4263,6 +4264,8 @@ for this_target in $target $canon_targets ; do
|
|||
cris-*-linux-gnu*) fmt=multi bfd_gas=yes em=linux ;;
|
||||
cris-*-*) fmt=multi bfd_gas=yes ;;
|
||||
|
||||
crx-*-elf*) fmt=elf ;;
|
||||
|
||||
d10v-*-*) fmt=elf ;;
|
||||
d30v-*-*) fmt=elf ;;
|
||||
dlx-*-*) fmt=elf ;;
|
||||
|
|
|
@ -163,6 +163,7 @@ changequote([,])dnl
|
|||
sparc86x*) cpu_type=sparc arch=sparc86x ;;
|
||||
sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c.
|
||||
v850*) cpu_type=v850 ;;
|
||||
crx*) cpu_type=crx endian=little ;;
|
||||
xtensa*) cpu_type=xtensa arch=xtensa ;;
|
||||
m32r) cpu_type=m32r target_cpu=m32r endian=big ;;
|
||||
m32rle) cpu_type=m32r target_cpu=m32r endian=little ;;
|
||||
|
@ -224,6 +225,8 @@ changequote([,])dnl
|
|||
cris-*-linux-gnu*) fmt=multi bfd_gas=yes em=linux ;;
|
||||
cris-*-*) fmt=multi bfd_gas=yes ;;
|
||||
|
||||
crx-*-elf*) fmt=elf ;;
|
||||
|
||||
d10v-*-*) fmt=elf ;;
|
||||
d30v-*-*) fmt=elf ;;
|
||||
dlx-*-*) fmt=elf ;;
|
||||
|
|
|
@ -1,3 +1,7 @@
|
|||
2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* dis-asm.h (print_insn_crx): Declare.
|
||||
|
||||
2004-06-24 Alan Modra <amodra@bigpond.net.au>
|
||||
|
||||
* bfdlink.h (struct bfd_link_order): Update comment.
|
||||
|
|
|
@ -224,6 +224,7 @@ extern int print_insn_mn10200 (bfd_vma, disassemble_info *);
|
|||
extern int print_insn_mn10300 (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_msp430 (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_ns32k (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_crx (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_openrisc (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_big_or32 (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_little_or32 (bfd_vma, disassemble_info *);
|
||||
|
|
|
@ -1,3 +1,8 @@
|
|||
2004-07-06 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* common.h (EM_CRX): Define.
|
||||
* crx.h: New file.
|
||||
|
||||
2004-06-25 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
||||
|
||||
* m32r.h: Add defintions of R_M32R_GOTOFF_HI_ULO,
|
||||
|
|
|
@ -182,6 +182,7 @@
|
|||
#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
|
||||
#define EM_CR 103 /* National Semiconductor CompactRISC */
|
||||
#define EM_MSP430 105 /* TI msp430 micro controller */
|
||||
#define EM_CRX 114 /* National Semiconductor CRX */
|
||||
|
||||
/* If it is necessary to assign new unofficial EM_* values, please pick large
|
||||
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
|
||||
|
|
|
@ -0,0 +1,50 @@
|
|||
/* CRX ELF support for BFD.
|
||||
Copyright 2004 Free Software Foundation, Inc.
|
||||
Contributed by Tomer Levi, NSC, Israel.
|
||||
Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
|
||||
Updates, BFDizing, GNUifying and ELF support by Tomer Levi.
|
||||
|
||||
This file is part of BFD, the Binary File Descriptor library.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software Foundation,
|
||||
Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||
|
||||
#ifndef _ELF_CRX_H
|
||||
#define _ELF_CRX_H
|
||||
|
||||
#include "elf/reloc-macros.h"
|
||||
|
||||
/* Creating indices for reloc_map_index array. */
|
||||
START_RELOC_NUMBERS(elf_crx_reloc_type)
|
||||
RELOC_NUMBER (R_CRX_NONE, 0)
|
||||
RELOC_NUMBER (R_CRX_REL4, 1)
|
||||
RELOC_NUMBER (R_CRX_REL8, 2)
|
||||
RELOC_NUMBER (R_CRX_REL8_CMP, 3)
|
||||
RELOC_NUMBER (R_CRX_REL16, 4)
|
||||
RELOC_NUMBER (R_CRX_REL24, 5)
|
||||
RELOC_NUMBER (R_CRX_REL32, 6)
|
||||
RELOC_NUMBER (R_CRX_REGREL12, 7)
|
||||
RELOC_NUMBER (R_CRX_REGREL22, 8)
|
||||
RELOC_NUMBER (R_CRX_REGREL28, 9)
|
||||
RELOC_NUMBER (R_CRX_REGREL32, 10)
|
||||
RELOC_NUMBER (R_CRX_ABS16, 11)
|
||||
RELOC_NUMBER (R_CRX_ABS32, 12)
|
||||
RELOC_NUMBER (R_CRX_NUM8, 13)
|
||||
RELOC_NUMBER (R_CRX_NUM16, 14)
|
||||
RELOC_NUMBER (R_CRX_NUM32, 15)
|
||||
RELOC_NUMBER (R_CRX_IMM16, 16)
|
||||
RELOC_NUMBER (R_CRX_IMM32, 17)
|
||||
END_RELOC_NUMBERS(R_CRX_MAX)
|
||||
|
||||
#endif /* _ELF_CRX_H */
|
|
@ -1,3 +1,7 @@
|
|||
2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* crx.h: New file.
|
||||
|
||||
2004-06-24 Alan Modra <amodra@bigpond.net.au>
|
||||
|
||||
* i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
|
||||
|
|
|
@ -0,0 +1,395 @@
|
|||
/* crx.h -- Header file for CRX opcode and register tables.
|
||||
Copyright 2004 Free Software Foundation, Inc.
|
||||
Contributed by Tomer Levi, NSC, Israel.
|
||||
Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
|
||||
Updates, BFDizing, GNUifying and ELF support by Tomer Levi.
|
||||
|
||||
This file is part of GAS, GDB and the GNU binutils.
|
||||
|
||||
GAS, GDB, and GNU binutils is free software; you can redistribute it
|
||||
and/or modify it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation; either version 2, or (at your
|
||||
option) any later version.
|
||||
|
||||
GAS, GDB, and GNU binutils are distributed in the hope that they will be
|
||||
useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||
|
||||
#ifndef _CRX_H_
|
||||
#define _CRX_H_
|
||||
|
||||
/* CRX core/debug Registers :
|
||||
The enums are used as indices to CRX registers table (crx_regtab).
|
||||
Therefore, order MUST be preserved. */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
/* 32-bit general purpose registers. */
|
||||
r0, r1, r2, r3, r4, r5, r6, r7, r8, r9,
|
||||
r10, r11, r12, r13, r14, r15, ra, sp,
|
||||
/* 32-bit user registers. */
|
||||
u0, u1, u2, u3, u4, u5, u6, u7, u8, u9,
|
||||
u10, u11, u12, u13, u14, u15, ura, usp,
|
||||
/* hi and lo registers. */
|
||||
hi, lo,
|
||||
/* hi and lo user registers. */
|
||||
uhi, ulo,
|
||||
/* Processor Status Register. */
|
||||
psr,
|
||||
/* Configuration Register. */
|
||||
cfg,
|
||||
/* Coprocessor Configuration Register. */
|
||||
cpcfg,
|
||||
/* Cashe Configuration Register. */
|
||||
ccfg,
|
||||
/* Interrupt Base Register. */
|
||||
intbase,
|
||||
/* Interrupt Stack Pointer Register. */
|
||||
isp,
|
||||
/* Coprocessor Enable Register. */
|
||||
cen,
|
||||
/* Program Counter Register. */
|
||||
pc,
|
||||
/* Not a register. */
|
||||
nullregister,
|
||||
MAX_REG
|
||||
}
|
||||
reg;
|
||||
|
||||
/* CRX Coprocessor registers and special registers :
|
||||
The enums are used as indices to CRX coprocessor registers table
|
||||
(crx_copregtab). Therefore, order MUST be preserved. */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
/* Coprocessor registers. */
|
||||
c0 = MAX_REG, c1, c2, c3, c4, c5, c6, c7, c8,
|
||||
c9, c10, c11, c12, c13, c14, c15,
|
||||
/* Coprocessor special registers. */
|
||||
cs0, cs1 ,cs2, cs3, cs4, cs5, cs6, cs7, cs8,
|
||||
cs9, cs10, cs11, cs12, cs13, cs14, cs15,
|
||||
/* Not a Coprocessor register. */
|
||||
nullcopregister,
|
||||
MAX_COPREG
|
||||
}
|
||||
copreg;
|
||||
|
||||
/* CRX Register types. */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CRX_PC_REGTYPE, /* pc type */
|
||||
CRX_R_REGTYPE, /* r<N> */
|
||||
CRX_U_REGTYPE, /* u<N> */
|
||||
CRX_C_REGTYPE, /* c<N> */
|
||||
CRX_CS_REGTYPE, /* cs<N> */
|
||||
CRX_MTPR_REGTYPE, /* mtpr */
|
||||
CRX_CFG_REGTYPE /* *hi|lo, *cfg, psr */
|
||||
}
|
||||
reg_type;
|
||||
|
||||
/* CRX argument types :
|
||||
The argument types correspond to instructions operands
|
||||
|
||||
Argument types :
|
||||
r - register
|
||||
c - constant
|
||||
d - displacement
|
||||
ic - immediate
|
||||
icr - index register
|
||||
rbase - register base
|
||||
s - star ('*')
|
||||
copr - coprocessor register
|
||||
copsr - coprocessor special register. */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
arg_r, arg_c, arg_cr, arg_dc, arg_dcr, arg_sc,
|
||||
arg_ic, arg_icr, arg_rbase, arg_copr, arg_copsr,
|
||||
/* Not an argument. */
|
||||
nullargs
|
||||
}
|
||||
argtype;
|
||||
|
||||
/* CRX operand types :
|
||||
The operand types correspond to instructions operands
|
||||
|
||||
Operand Types :
|
||||
cst4 - 4-bit encoded constant
|
||||
iN - N-bit immediate field
|
||||
d, dispsN - N-bit immediate signed displacement
|
||||
dispuN - N-bit immediate unsigned displacement
|
||||
absN - N-bit absolute address
|
||||
rbase - 4-bit genaral-purpose register specifier
|
||||
regr - 4-bit genaral-purpose register specifier
|
||||
regr8 - 8-bit register address space
|
||||
copregr - coprocessor register
|
||||
copsregr - coprocessor special register
|
||||
scl2 - 2-bit scaling factor for memory index
|
||||
ridx - register index. */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
dummy, cst4, disps9,
|
||||
i3, i4, i5, i8, i12, i16, i32,
|
||||
d5, d9, d17, d25, d33,
|
||||
abs16, abs32,
|
||||
rbase, rbase_cst4,
|
||||
rbase_dispu8, rbase_dispu12, rbase_dispu16, rbase_dispu28, rbase_dispu32,
|
||||
rbase_ridx_scl2_dispu6, rbase_ridx_scl2_dispu22,
|
||||
regr, regr8, copregr,copregr8,copsregr,
|
||||
/* Not an operand. */
|
||||
nulloperand,
|
||||
/* Maximum supported operand. */
|
||||
MAX_OPRD
|
||||
}
|
||||
operand_type;
|
||||
|
||||
/* CRX instruction types. */
|
||||
|
||||
#define ARITH_INS 1
|
||||
#define LD_STOR_INS 2
|
||||
#define BRANCH_INS 3
|
||||
#define ARITH_BYTE_INS 4
|
||||
#define CMPBR_INS 5
|
||||
#define SHIFT_INS 6
|
||||
#define BRANCH_NEQ_INS 7
|
||||
#define LD_STOR_INS_INC 8
|
||||
#define STOR_IMM_INS 9
|
||||
#define CSTBIT_INS 10
|
||||
#define SYS_INS 11
|
||||
#define JMP_INS 12
|
||||
#define MUL_INS 13
|
||||
#define DIV_INS 14
|
||||
#define COP_BRANCH_INS 15
|
||||
#define COP_REG_INS 16
|
||||
#define DCR_BRANCH_INS 17
|
||||
#define MMC_INS 18
|
||||
#define MMU_INS 19
|
||||
|
||||
/* Maximum value supported for instruction types. */
|
||||
#define CRX_INS_MAX (1 << 5)
|
||||
/* Mask to record an instruction type. */
|
||||
#define CRX_INS_MASK (CRX_INS_MAX - 1)
|
||||
/* Return instruction type, given instruction's attributes. */
|
||||
#define CRX_INS_TYPE(attr) ((attr) & CRX_INS_MASK)
|
||||
|
||||
/* Indicates whether this instruction has a register list as parameter. */
|
||||
#define REG_LIST CRX_INS_MAX
|
||||
/* The operands in binary and assembly are placed in reverse order.
|
||||
load - (REVERSE_MATCH)/store - (! REVERSE_MATCH). */
|
||||
#define REVERSE_MATCH (REG_LIST << 1)
|
||||
|
||||
/* Kind of displacement map used DISPU[BWD]4. */
|
||||
#define DISPUB4 (REVERSE_MATCH << 1)
|
||||
#define DISPUW4 (DISPUB4 << 1)
|
||||
#define DISPUD4 (DISPUW4 << 1)
|
||||
#define CST4MAP (DISPUB4 | DISPUW4 | DISPUD4)
|
||||
|
||||
/* Printing formats, where the instruction prefix isn't consecutive. */
|
||||
#define FMT_1 (DISPUD4 << 1) /* 0xF0F00000 */
|
||||
#define FMT_2 (FMT_1 << 1) /* 0xFFF0FF00 */
|
||||
#define FMT_3 (FMT_2 << 1) /* 0xFFF00F00 */
|
||||
#define FMT_4 (FMT_3 << 1) /* 0xFFF0F000 */
|
||||
#define FMT_5 (FMT_4 << 1) /* 0xFFF0FFF0 */
|
||||
#define FMT_CRX (FMT_1 | FMT_2 | FMT_3 | FMT_4 | FMT_5)
|
||||
|
||||
#define RELAXABLE (FMT_5 << 1)
|
||||
|
||||
/* Maximum operands per instruction. */
|
||||
#define MAX_OPERANDS 5
|
||||
/* Maximum words per instruction. */
|
||||
#define MAX_WORDS 3
|
||||
/* Maximum register name length. */
|
||||
#define MAX_REGNAME_LEN 10
|
||||
/* Maximum instruction length. */
|
||||
#define MAX_INST_LEN 256
|
||||
|
||||
/* Single operand description. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Operand type. */
|
||||
operand_type op_type;
|
||||
/* Operand location within the opcode. */
|
||||
unsigned int shift;
|
||||
}
|
||||
operand_desc;
|
||||
|
||||
/* Instruction data structure used in instruction table. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Name. */
|
||||
const char *mnemonic;
|
||||
/* Size (in words). */
|
||||
unsigned int size;
|
||||
/* Constant prefix (matched by the disassembler). */
|
||||
unsigned long match;
|
||||
/* Match size (in bits). */
|
||||
int match_bits;
|
||||
/* Attributes. */
|
||||
unsigned int flags;
|
||||
/* Operands (always last, so unreferenced operands are initialized). */
|
||||
operand_desc operands[MAX_OPERANDS];
|
||||
}
|
||||
inst;
|
||||
|
||||
/* Data structure for a single instruction's arguments (Operands). */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Register or base register. */
|
||||
reg r;
|
||||
/* Index register. */
|
||||
reg i_r;
|
||||
/* Coprocessor register. */
|
||||
copreg cr;
|
||||
/* Constant/immediate/absolute value. */
|
||||
unsigned long int constant;
|
||||
/* Scaled index mode. */
|
||||
unsigned int scale;
|
||||
/* Argument type. */
|
||||
argtype type;
|
||||
/* Size of the argument (in bits) required to represent. */
|
||||
int size;
|
||||
/* Indicates whether a constant is positive or negative. */
|
||||
int signflag;
|
||||
}
|
||||
argument;
|
||||
|
||||
/* Internal structure to hold the various entities
|
||||
corresponding to the current assembling instruction. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Number of arguments. */
|
||||
int nargs;
|
||||
/* The argument data structure for storing args (operands). */
|
||||
argument arg[MAX_OPERANDS];
|
||||
/* The following fields are required only by CRX-assembler. */
|
||||
#ifdef TC_CRX
|
||||
/* Expression used for setting the fixups (if any). */
|
||||
expressionS exp;
|
||||
bfd_reloc_code_real_type rtype;
|
||||
#endif /* TC_CRX */
|
||||
/* Instruction size (in bytes). */
|
||||
int size;
|
||||
}
|
||||
ins;
|
||||
|
||||
/* Structure to hold information about predefined operands. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Size (in bits). */
|
||||
unsigned int bit_size;
|
||||
/* Argument type. */
|
||||
argtype arg_type;
|
||||
}
|
||||
operand_entry;
|
||||
|
||||
/* Structure to hold trap handler information. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Trap name. */
|
||||
char *name;
|
||||
/* Index in dispatch table. */
|
||||
unsigned int entry;
|
||||
}
|
||||
trap_entry;
|
||||
|
||||
/* Structure to hold information about predefined registers. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Name (string representation). */
|
||||
char *name;
|
||||
/* Value (enum representation). */
|
||||
union
|
||||
{
|
||||
/* Register. */
|
||||
reg reg_val;
|
||||
/* Coprocessor register. */
|
||||
copreg copreg_val;
|
||||
} value;
|
||||
/* Register image. */
|
||||
int image;
|
||||
/* Register type. */
|
||||
reg_type type;
|
||||
}
|
||||
reg_entry;
|
||||
|
||||
/* Structure to hold a cst4 operand mapping. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* The binary value which is written to the object file. */
|
||||
int binary;
|
||||
/* The value which is mapped. */
|
||||
int value;
|
||||
}
|
||||
cst4_entry;
|
||||
|
||||
/* CRX opcode table. */
|
||||
extern const inst crx_instruction[];
|
||||
extern const int crx_num_opcodes;
|
||||
#define NUMOPCODES crx_num_opcodes
|
||||
|
||||
/* CRX operands table. */
|
||||
extern const operand_entry crx_optab[];
|
||||
|
||||
/* CRX registers table. */
|
||||
extern const reg_entry crx_regtab[];
|
||||
extern const int crx_num_regs;
|
||||
#define NUMREGS crx_num_regs
|
||||
|
||||
/* CRX coprocessor registers table. */
|
||||
extern const reg_entry crx_copregtab[];
|
||||
extern const int crx_num_copregs;
|
||||
#define NUMCOPREGS crx_num_copregs
|
||||
|
||||
/* CRX trap/interrupt table. */
|
||||
extern const trap_entry crx_traps[];
|
||||
extern const int crx_num_traps;
|
||||
#define NUMTRAPS crx_num_traps
|
||||
|
||||
/* cst4 operand mapping. */
|
||||
extern const cst4_entry cst4_map[];
|
||||
extern const int cst4_maps;
|
||||
|
||||
/* Current instruction we're assembling. */
|
||||
extern const inst *instruction;
|
||||
|
||||
/* A macro for representing the instruction "constant" opcode, that is,
|
||||
the FIXED part of the instruction. The "constant" opcode is represented
|
||||
as a 32-bit unsigned long, where OPC is expanded (by a left SHIFT)
|
||||
over that range. */
|
||||
#define BIN(OPC,SHIFT) (OPC << SHIFT)
|
||||
|
||||
/* Is the current instruction type is TYPE ? */
|
||||
#define IS_INSN_TYPE(TYPE) \
|
||||
(CRX_INS_TYPE(instruction->flags) == TYPE)
|
||||
|
||||
/* Is the current instruction mnemonic is MNEMONIC ? */
|
||||
#define IS_INSN_MNEMONIC(MNEMONIC) \
|
||||
(strcmp(instruction->mnemonic,MNEMONIC) == 0)
|
||||
|
||||
/* Does the current instruction has register list ? */
|
||||
#define INST_HAS_REG_LIST \
|
||||
(instruction->flags & REG_LIST)
|
||||
|
||||
/* Long long type handling. */
|
||||
/* Replace all appearances of 'long long int' with LONGLONG. */
|
||||
typedef long long int LONGLONG;
|
||||
typedef unsigned long long ULONGLONG;
|
||||
/* A mask for the upper 31 bits of a 64 bits type. */
|
||||
#define UPPER31_MASK 0xFFFFFFFE00000000LL
|
||||
|
||||
#endif /* _CRX_H_ */
|
11
ld/ChangeLog
11
ld/ChangeLog
|
@ -1,3 +1,14 @@
|
|||
2004-07-06 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* Makefile.am (ALL_EMULATIONS): Add eelf32crx.o.
|
||||
(eelf32crx.c): New target.
|
||||
* Makefile.in: Regenerate.
|
||||
* configure.tgt: Handle crx-*-elf*.
|
||||
* emulparams/elf32crx.sh: New file.
|
||||
* emultempl/crxelf.em: New file.
|
||||
* scripttempl/elf32crx.sc: New file.
|
||||
* NEWS: Mention new target.
|
||||
|
||||
2004-07-06 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* Makefile.am: Add eshlsymbian.c.
|
||||
|
|
|
@ -153,6 +153,7 @@ ALL_EMULATIONS = \
|
|||
eelf32bmip.o \
|
||||
eelf32bmipn32.o \
|
||||
eelf32btsmip.o \
|
||||
eelf32crx.o \
|
||||
eelf32btsmipn32.o \
|
||||
eelf32ltsmip.o \
|
||||
eelf32ltsmipn32.o \
|
||||
|
@ -647,6 +648,10 @@ eelf32btsmip.c: $(srcdir)/emulparams/elf32btsmip.sh \
|
|||
$(srcdir)/emulparams/elf32bmip.sh \
|
||||
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
|
||||
${GENSCRIPTS} elf32btsmip "$(tdir_elf32btsmip)"
|
||||
eelf32crx.c: $(srcdir)/emulparams/elf32crx.sh \
|
||||
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/crxelf.em \
|
||||
$(srcdir)/scripttempl/elf32crx.sc ${GEN_DEPENDS}
|
||||
${GENSCRIPTS} elf32crx "$(tdir_elf32crx)"
|
||||
eelf32btsmipn32.c: $(srcdir)/emulparams/elf32btsmipn32.sh \
|
||||
$(srcdir)/emulparams/elf32bmip.sh \
|
||||
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
|
||||
|
|
|
@ -267,6 +267,7 @@ ALL_EMULATIONS = \
|
|||
eelf32bmip.o \
|
||||
eelf32bmipn32.o \
|
||||
eelf32btsmip.o \
|
||||
eelf32crx.o \
|
||||
eelf32btsmipn32.o \
|
||||
eelf32ltsmip.o \
|
||||
eelf32ltsmipn32.o \
|
||||
|
@ -1373,6 +1374,10 @@ eelf32btsmip.c: $(srcdir)/emulparams/elf32btsmip.sh \
|
|||
$(srcdir)/emulparams/elf32bmip.sh \
|
||||
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
|
||||
${GENSCRIPTS} elf32btsmip "$(tdir_elf32btsmip)"
|
||||
eelf32crx.c: $(srcdir)/emulparams/elf32crx.sh \
|
||||
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/crxelf.em \
|
||||
$(srcdir)/scripttempl/elf32crx.sc ${GEN_DEPENDS}
|
||||
${GENSCRIPTS} elf32crx "$(tdir_elf32crx)"
|
||||
eelf32btsmipn32.c: $(srcdir)/emulparams/elf32btsmipn32.sh \
|
||||
$(srcdir)/emulparams/elf32bmip.sh \
|
||||
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
|
||||
|
|
4
ld/NEWS
4
ld/NEWS
|
@ -1,5 +1,9 @@
|
|||
-*- text -*-
|
||||
|
||||
* Support for the crx-elf target added.
|
||||
|
||||
* Support for the sh-symbian-elf target added.
|
||||
|
||||
* A new linker command line switch has been added which allows the hash table
|
||||
size to be set to a suitable prime value near to its argument. This switch
|
||||
is --hash-size=<NUMBER>. Also if the switch --reduce-memory-overheads is
|
||||
|
|
|
@ -34,6 +34,7 @@ cris-*-linux-gnu*) targ_emul=crislinux ;;
|
|||
cris-*-*) targ_emul=criself
|
||||
targ_extra_emuls="crisaout crislinux"
|
||||
targ_extra_libpath=$targ_extra_emuls ;;
|
||||
crx-*-elf*) targ_emul=elf32crx ;;
|
||||
d10v-*-*) targ_emul=d10velf ;;
|
||||
d30v-*-*ext*) targ_emul=d30v_e; targ_extra_emuls="d30velf d30v_o" ;;
|
||||
d30v-*-*onchip*) targ_emul=d30v_o; targ_extra_emuls="d30velf d30v_e" ;;
|
||||
|
|
|
@ -0,0 +1,6 @@
|
|||
SCRIPT_NAME=elf32crx
|
||||
TEMPLATE_NAME=elf32
|
||||
OUTPUT_FORMAT="elf32-crx"
|
||||
ARCH=crx
|
||||
ENTRY=_start
|
||||
EXTRA_EM_FILE=crxelf
|
|
@ -0,0 +1,50 @@
|
|||
# This shell script emits a C file. -*- C -*-
|
||||
# Copyright 2004
|
||||
# Free Software Foundation, Inc.
|
||||
#
|
||||
# This file is part of GLD, the Gnu Linker.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
|
||||
# This file is sourced from elf32.em, and defines extra crx-elf
|
||||
# specific routines.
|
||||
#
|
||||
cat >>e${EMULATION_NAME}.c <<EOF
|
||||
|
||||
#include "ldctor.h"
|
||||
|
||||
static void crxelf_after_parse (void);
|
||||
|
||||
static void
|
||||
crxelf_after_parse (void)
|
||||
{
|
||||
/* Always behave as if called with --sort-common command line
|
||||
option.
|
||||
This is to emulate the CRTools' method of keeping variables
|
||||
of different alignment in separate sections. */
|
||||
config.sort_common = TRUE;
|
||||
|
||||
/* Don't create a demand-paged executable, since this feature isn't
|
||||
meaninful in CR16C embedded systems. Moreover, when magic_demand_paged
|
||||
is true the link sometimes fails. */
|
||||
config.magic_demand_paged = FALSE;
|
||||
}
|
||||
|
||||
EOF
|
||||
|
||||
# Put these extra crx-elf routines in ld_${EMULATION_NAME}_emulation
|
||||
#
|
||||
LDEMUL_AFTER_PARSE=crxelf_after_parse
|
|
@ -0,0 +1,56 @@
|
|||
# Linker Script for National Semiconductor's CRX-ELF32.
|
||||
|
||||
# The next line should be uncommented if it is desired to link
|
||||
# without libstart.o and directly enter main.
|
||||
|
||||
# ENTRY=_main
|
||||
|
||||
test -z "$ENTRY" && ENTRY=_start
|
||||
cat <<EOF
|
||||
|
||||
/* Example Linker Script for linking NS CRX elf32 files. */
|
||||
|
||||
/* The next line forces the entry point (${ENTRY} in this script)
|
||||
to be entered in the output file as an undefined symbol.
|
||||
It is needed in case the entry point is not called explicitly
|
||||
(which is the usual case) AND is in an archive. */
|
||||
|
||||
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
|
||||
OUTPUT_ARCH(${ARCH})
|
||||
EXTERN(${ENTRY})
|
||||
ENTRY(${ENTRY})
|
||||
|
||||
/* Define memory regions. */
|
||||
MEMORY
|
||||
{
|
||||
rom : ORIGIN = 0x2, LENGTH = 3M
|
||||
ram : ORIGIN = 4M, LENGTH = 10M
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text : { __TEXT_START = .; *(.text) *(.text.*) *(.gnu.linkonce.t.*) __TEXT_END = .; } > rom
|
||||
|
||||
.rdata : { __RDATA_START = .; *(.rdata_4) *(.rdata_2) *(.rdata_1) *(.rdata.*) *(.gnu.linkonce.r.*) __RDATA_END = .; } > rom
|
||||
|
||||
.ctor ALIGN(4) : { __CTOR_LIST = .; *(.ctors) __CTOR_END = .; } > rom
|
||||
|
||||
.dtor ALIGN(4) : { __DTOR_LIST = .; *(.dtors) __DTOR_END = .; } > rom
|
||||
|
||||
.data : { __DATA_START = .; *(.data_4) *(.data_2) *(.data_1) *(.data) *(.data.*) *(.gnu.linkonce.d.*) __DATA_END = .; } > ram AT > rom
|
||||
|
||||
.bss (NOLOAD) : { __BSS_START = .; *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) *(.bss.*) *(.gnu.linkonce.b.*) __BSS_END = .; } > ram
|
||||
|
||||
/* You may change the sizes of the following sections to fit the actual
|
||||
size your program requires.
|
||||
|
||||
The heap and stack are aligned to the bus width, as a speed optimization
|
||||
for accessing data located there. */
|
||||
|
||||
.heap : { . = ALIGN(4); __HEAP_START = .; . += 0x2000; __HEAP_MAX = .; } > ram
|
||||
.stack : { . = ALIGN(4); . += 0x6000; __STACK_START = .; } > ram
|
||||
.istack : { . = ALIGN(4); . += 0x100; __ISTACK_START = .; } > ram
|
||||
}
|
||||
|
||||
__DATA_IMAGE_START = LOADADDR(.data);
|
||||
EOF
|
|
@ -1,3 +1,17 @@
|
|||
2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
|
||||
|
||||
* Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
|
||||
(ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
|
||||
(crx-dis.lo): New target.
|
||||
(crx-opc.lo): Likewise.
|
||||
* Makefile.in: Regenerate.
|
||||
* configure.in: Handle bfd_crx_arch.
|
||||
* configure: Regenerate.
|
||||
* crx-dis.c: New file.
|
||||
* crx-opc.c: New file.
|
||||
* disassemble.c (ARCH_crx): Define.
|
||||
(disassembler): Handle ARCH_crx.
|
||||
|
||||
2004-06-29 James E Wilson <wilson@specifixinc.com>
|
||||
|
||||
* ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
|
||||
|
|
|
@ -57,6 +57,8 @@ CFILES = \
|
|||
cgen-opc.c \
|
||||
cris-dis.c \
|
||||
cris-opc.c \
|
||||
crx-dis.c \
|
||||
crx-opc.c \
|
||||
d10v-dis.c \
|
||||
d10v-opc.c \
|
||||
d30v-dis.c \
|
||||
|
@ -179,6 +181,8 @@ ALL_MACHINES = \
|
|||
cgen-opc.lo \
|
||||
cris-dis.lo \
|
||||
cris-opc.lo \
|
||||
crx-dis.lo \
|
||||
crx-opc.lo \
|
||||
d10v-dis.lo \
|
||||
d10v-opc.lo \
|
||||
d30v-dis.lo \
|
||||
|
@ -548,6 +552,9 @@ cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
|
|||
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
|
||||
$(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h
|
||||
cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h
|
||||
crx-dis.lo: crx-dis.c $(INCDIR)/opcode/crx.h \
|
||||
$(INCDIR)/dis-asm.h sysdep.h $(INCDIR)/ansidecl.h
|
||||
crx-opc.lo: crx-opc.c $(INCDIR)/opcode/crx.h
|
||||
d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
|
||||
$(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \
|
||||
$(INCDIR)/symcat.h
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
# Makefile.in generated automatically by automake 1.4 from Makefile.am
|
||||
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
|
||||
|
||||
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
|
||||
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
|
||||
# This Makefile.in is free software; the Free Software Foundation
|
||||
# gives unlimited permission to copy and/or distribute it,
|
||||
# with or without modifications, as long as this notice is preserved.
|
||||
|
@ -168,6 +168,8 @@ CFILES = \
|
|||
cgen-opc.c \
|
||||
cris-dis.c \
|
||||
cris-opc.c \
|
||||
crx-dis.c \
|
||||
crx-opc.c \
|
||||
d10v-dis.c \
|
||||
d10v-opc.c \
|
||||
d30v-dis.c \
|
||||
|
@ -291,6 +293,8 @@ ALL_MACHINES = \
|
|||
cgen-opc.lo \
|
||||
cris-dis.lo \
|
||||
cris-opc.lo \
|
||||
crx-dis.lo \
|
||||
crx-opc.lo \
|
||||
d10v-dis.lo \
|
||||
d10v-opc.lo \
|
||||
d30v-dis.lo \
|
||||
|
@ -473,7 +477,7 @@ acinclude.m4 aclocal.m4 config.in configure configure.in
|
|||
|
||||
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
|
||||
|
||||
TAR = tar
|
||||
TAR = gtar
|
||||
GZIP_ENV = --best
|
||||
SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES)
|
||||
OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS)
|
||||
|
@ -622,7 +626,7 @@ maintainer-clean-recursive:
|
|||
dot_seen=no; \
|
||||
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
|
||||
rev="$$subdir $$rev"; \
|
||||
test "$$subdir" = "." && dot_seen=yes; \
|
||||
test "$$subdir" != "." || dot_seen=yes; \
|
||||
done; \
|
||||
test "$$dot_seen" = "no" && rev=". $$rev"; \
|
||||
target=`echo $@ | sed s/-recursive//`; \
|
||||
|
@ -1044,6 +1048,9 @@ cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
|
|||
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
|
||||
$(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h
|
||||
cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h
|
||||
crx-dis.lo: crx-dis.c $(INCDIR)/opcode/crx.h \
|
||||
$(INCDIR)/dis-asm.h sysdep.h $(INCDIR)/ansidecl.h
|
||||
crx-opc.lo: crx-opc.c $(INCDIR)/opcode/crx.h
|
||||
d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
|
||||
$(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \
|
||||
$(INCDIR)/symcat.h
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -177,6 +177,7 @@ if test x${all_targets} = xfalse ; then
|
|||
bfd_avr_arch) ta="$ta avr-dis.lo" ;;
|
||||
bfd_convex_arch) ;;
|
||||
bfd_cris_arch) ta="$ta cris-dis.lo cris-opc.lo" ;;
|
||||
bfd_crx_arch) ta="$ta crx-dis.lo crx-opc.lo" ;;
|
||||
bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;;
|
||||
bfd_d30v_arch) ta="$ta d30v-dis.lo d30v-opc.lo" ;;
|
||||
bfd_dlx_arch) ta="$ta dlx-dis.lo" ;;
|
||||
|
|
|
@ -0,0 +1,700 @@
|
|||
/* Disassembler code for CRX.
|
||||
Copyright 2004 Free Software Foundation, Inc.
|
||||
Contributed by Tomer Levi, NSC, Israel.
|
||||
Written by Tomer Levi.
|
||||
|
||||
This file is part of the GNU binutils and GDB, the GNU debugger.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License as published by the Free
|
||||
Software Foundation; either version 2, or (at your option)
|
||||
any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||
|
||||
#include "dis-asm.h"
|
||||
#include "sysdep.h"
|
||||
#include "opcode/crx.h"
|
||||
|
||||
/* String to print when opcode was not matched. */
|
||||
#define ILLEGAL "illegal"
|
||||
/* Escape to 16-bit immediate. */
|
||||
#define ESCAPE_16_BIT 0xE
|
||||
|
||||
/* Extract 'n_bits' from 'a' starting from offset 'offs'. */
|
||||
#define EXTRACT(a, offs, n_bits) \
|
||||
(n_bits == 32 ? (((a) >> (offs)) & ~0L) \
|
||||
: (((a) >> (offs)) & ((1 << (n_bits)) -1)))
|
||||
|
||||
/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
|
||||
#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
|
||||
|
||||
typedef unsigned long dwordU;
|
||||
typedef unsigned short wordU;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
dwordU val;
|
||||
int nbits;
|
||||
} parameter;
|
||||
|
||||
/* Structure to hold valid 'cinv' instruction options. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Cinv printed string. */
|
||||
char *str;
|
||||
/* Value corresponding to the string. */
|
||||
unsigned int value;
|
||||
}
|
||||
cinv_entry;
|
||||
|
||||
/* CRX 'cinv' options. */
|
||||
const cinv_entry crx_cinvs[] =
|
||||
{
|
||||
{"[i]", 2}, {"[i,u]", 3}, {"[d]", 4},
|
||||
{"[d,u]", 5}, {"[d,i]", 6}, {"[d,i,u]", 7}
|
||||
};
|
||||
|
||||
/* Number of valid 'cinv' instruction options. */
|
||||
int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0]));
|
||||
/* Current opcode table entry we're disassembling. */
|
||||
const inst *instruction;
|
||||
/* Current instruction we're disassembling. */
|
||||
ins currInsn;
|
||||
/* The current instruction is read into 3 consecutive words. */
|
||||
wordU words[3];
|
||||
/* Contains all words in appropriate order. */
|
||||
ULONGLONG allWords;
|
||||
/* Holds the current processed argument number. */
|
||||
int processing_argument_number;
|
||||
/* Nonzero means a CST4 instruction. */
|
||||
int cst4flag;
|
||||
/* Nonzero means the instruction's original size is
|
||||
incremented (escape sequence is used). */
|
||||
int size_changed;
|
||||
|
||||
static int get_number_of_operands (void);
|
||||
static argtype getargtype (operand_type);
|
||||
static int getbits (operand_type);
|
||||
static char *getregname (reg);
|
||||
static char *getcopregname (copreg, reg_type);
|
||||
static char * getprocregname (int);
|
||||
static char *gettrapstring (unsigned);
|
||||
static char *getcinvstring (unsigned);
|
||||
static void getregliststring (int, char *, int);
|
||||
static wordU get_word_at_PC (bfd_vma, struct disassemble_info *);
|
||||
static void get_words_at_PC (bfd_vma, struct disassemble_info *);
|
||||
static unsigned long build_mask (void);
|
||||
static int powerof2 (int);
|
||||
static int match_opcode (void);
|
||||
static void make_instruction (void);
|
||||
static void print_arguments (ins *, struct disassemble_info *);
|
||||
static void print_arg (argument *, struct disassemble_info *);
|
||||
|
||||
/* Retrieve the number of operands for the current assembled instruction. */
|
||||
|
||||
static int
|
||||
get_number_of_operands (void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++)
|
||||
;
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
/* Return the bit size for a given operand. */
|
||||
|
||||
static int
|
||||
getbits (operand_type op)
|
||||
{
|
||||
if (op < MAX_OPRD)
|
||||
return crx_optab[op].bit_size;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Return the argument type of a given operand. */
|
||||
|
||||
static argtype
|
||||
getargtype (operand_type op)
|
||||
{
|
||||
if (op < MAX_OPRD)
|
||||
return crx_optab[op].arg_type;
|
||||
else
|
||||
return nullargs;
|
||||
}
|
||||
|
||||
/* Given the trap index in dispatch table, return its name.
|
||||
This routine is used when disassembling the 'excp' instruction. */
|
||||
|
||||
static char *
|
||||
gettrapstring (unsigned int index)
|
||||
{
|
||||
const trap_entry *trap;
|
||||
|
||||
for (trap = crx_traps; trap < crx_traps + NUMTRAPS; trap++)
|
||||
if (trap->entry == index)
|
||||
return trap->name;
|
||||
|
||||
return ILLEGAL;
|
||||
}
|
||||
|
||||
/* Given a 'cinv' instruction constant operand, return its corresponding string.
|
||||
This routine is used when disassembling the 'cinv' instruction. */
|
||||
|
||||
static char *
|
||||
getcinvstring (unsigned int num)
|
||||
{
|
||||
const cinv_entry *cinv;
|
||||
|
||||
for (cinv = crx_cinvs; cinv < (crx_cinvs + NUMCINVS); cinv++)
|
||||
if (cinv->value == num)
|
||||
return cinv->str;
|
||||
|
||||
return ILLEGAL;
|
||||
}
|
||||
|
||||
/* Given a register enum value, retrieve its name. */
|
||||
|
||||
char *
|
||||
getregname (reg r)
|
||||
{
|
||||
const reg_entry *reg = &crx_regtab[r];
|
||||
|
||||
if (reg->type != CRX_R_REGTYPE)
|
||||
return ILLEGAL;
|
||||
else
|
||||
return reg->name;
|
||||
}
|
||||
|
||||
/* Given a coprocessor register enum value, retrieve its name. */
|
||||
|
||||
char *
|
||||
getcopregname (copreg r, reg_type type)
|
||||
{
|
||||
const reg_entry *reg;
|
||||
|
||||
if (type == CRX_C_REGTYPE)
|
||||
reg = &crx_copregtab[r];
|
||||
else if (type == CRX_CS_REGTYPE)
|
||||
reg = &crx_copregtab[r+(cs0-c0)];
|
||||
else
|
||||
return ILLEGAL;
|
||||
|
||||
return reg->name;
|
||||
}
|
||||
|
||||
|
||||
/* Getting a processor register name. */
|
||||
|
||||
static char *
|
||||
getprocregname (int index)
|
||||
{
|
||||
const reg_entry *r;
|
||||
|
||||
for (r = crx_regtab; r < crx_regtab + NUMREGS; r++)
|
||||
if (r->image == index)
|
||||
return r->name;
|
||||
|
||||
return "ILLEGAL REGISTER";
|
||||
}
|
||||
|
||||
/* Get the power of two for a given integer. */
|
||||
|
||||
static int
|
||||
powerof2 (int x)
|
||||
{
|
||||
int product, i;
|
||||
|
||||
for (i = 0, product = 1; i < x; i++)
|
||||
product *= 2;
|
||||
|
||||
return product;
|
||||
}
|
||||
|
||||
/* Transform a register bit mask to a register list. */
|
||||
|
||||
void
|
||||
getregliststring (int trap, char *string, int core_cop)
|
||||
{
|
||||
char temp_string[5];
|
||||
int i;
|
||||
|
||||
string[0] = '{';
|
||||
string[1] = '\0';
|
||||
|
||||
for (i = 0; i < 16; i++)
|
||||
{
|
||||
if (trap & 0x1)
|
||||
{
|
||||
if (core_cop)
|
||||
sprintf (temp_string, "r%d", i);
|
||||
else
|
||||
sprintf (temp_string, "c%d", i);
|
||||
strcat (string, temp_string);
|
||||
if (trap & 0xfffe)
|
||||
strcat (string, ",");
|
||||
}
|
||||
trap = trap >> 1;
|
||||
}
|
||||
|
||||
strcat (string, "}");
|
||||
}
|
||||
|
||||
/* START and END are relating 'allWords' struct, which is 48 bits size.
|
||||
|
||||
START|--------|END
|
||||
+---------+---------+---------+---------+
|
||||
| | V | A | L |
|
||||
+---------+---------+---------+---------+
|
||||
0 16 32 48
|
||||
words [0] [1] [2] */
|
||||
|
||||
static parameter
|
||||
makelongparameter (ULONGLONG val, int start, int end)
|
||||
{
|
||||
parameter p;
|
||||
|
||||
p.val = (dwordU) EXTRACT(val, 48 - end, end - start);
|
||||
p.nbits = end - start;
|
||||
return p;
|
||||
}
|
||||
|
||||
/* Build a mask of the instruction's 'constant' opcode,
|
||||
based on the instruction's printing flags. */
|
||||
|
||||
static unsigned long
|
||||
build_mask (void)
|
||||
{
|
||||
unsigned int print_flags;
|
||||
unsigned long mask;
|
||||
|
||||
print_flags = instruction->flags & FMT_CRX;
|
||||
switch (print_flags)
|
||||
{
|
||||
case FMT_1:
|
||||
mask = 0xF0F00000;
|
||||
break;
|
||||
case FMT_2:
|
||||
mask = 0xFFF0FF00;
|
||||
break;
|
||||
case FMT_3:
|
||||
mask = 0xFFF00F00;
|
||||
break;
|
||||
case FMT_4:
|
||||
mask = 0xFFF0F000;
|
||||
break;
|
||||
case FMT_5:
|
||||
mask = 0xFFF0FFF0;
|
||||
break;
|
||||
default:
|
||||
mask = SBM(instruction->match_bits);
|
||||
break;
|
||||
}
|
||||
|
||||
return mask;
|
||||
}
|
||||
|
||||
/* Search for a matching opcode. Return 1 for success, 0 for failure. */
|
||||
|
||||
static int
|
||||
match_opcode (void)
|
||||
{
|
||||
unsigned long mask;
|
||||
|
||||
/* The instruction 'constant' opcode doewsn't exceed 32 bits. */
|
||||
unsigned long doubleWord = words[1] + (words[0] << 16);
|
||||
|
||||
/* Start searching from end of instruction table. */
|
||||
instruction = &crx_instruction[NUMOPCODES - 2];
|
||||
|
||||
/* Loop over instruction table until a full match is found. */
|
||||
while (instruction >= crx_instruction)
|
||||
{
|
||||
mask = build_mask ();
|
||||
if ((doubleWord & mask) == BIN(instruction->match, instruction->match_bits))
|
||||
return 1;
|
||||
else
|
||||
instruction--;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Set the proper parameter value for different type of arguments. */
|
||||
|
||||
static void
|
||||
make_argument (argument * a, int start_bits)
|
||||
{
|
||||
int inst_bit_size, total_size;
|
||||
parameter p;
|
||||
|
||||
if ((instruction->size == 3) && a->size >= 16)
|
||||
inst_bit_size = 48;
|
||||
else
|
||||
inst_bit_size = 32;
|
||||
|
||||
switch (a->type)
|
||||
{
|
||||
case arg_copr:
|
||||
case arg_copsr:
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
|
||||
inst_bit_size - start_bits);
|
||||
a->cr = p.val;
|
||||
break;
|
||||
|
||||
case arg_r:
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
|
||||
inst_bit_size - start_bits);
|
||||
a->r = p.val;
|
||||
break;
|
||||
|
||||
case arg_ic:
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
|
||||
inst_bit_size - start_bits);
|
||||
|
||||
if ((p.nbits == 4) && cst4flag)
|
||||
{
|
||||
if (IS_INSN_TYPE (CMPBR_INS) && (p.val == ESCAPE_16_BIT))
|
||||
{
|
||||
/* A special case, where the value is actually stored
|
||||
in the last 4 bits. */
|
||||
p = makelongparameter (allWords, 44, 48);
|
||||
/* The size of the instruction should be incremented. */
|
||||
size_changed = 1;
|
||||
}
|
||||
|
||||
if (p.val == 6)
|
||||
p.val = -1;
|
||||
else if (p.val == 13)
|
||||
p.val = 48;
|
||||
else if (p.val == 5)
|
||||
p.val = -4;
|
||||
else if (p.val == 10)
|
||||
p.val = 32;
|
||||
else if (p.val == 11)
|
||||
p.val = 20;
|
||||
else if (p.val == 9)
|
||||
p.val = 16;
|
||||
}
|
||||
|
||||
a->constant = p.val;
|
||||
break;
|
||||
|
||||
case arg_icr:
|
||||
a->scale = 0;
|
||||
total_size = a->size + 10; /* sizeof(rbase + ridx + scl2) = 10. */
|
||||
p = makelongparameter (allWords, inst_bit_size - total_size,
|
||||
inst_bit_size - (total_size - 4));
|
||||
a->r = p.val;
|
||||
p = makelongparameter (allWords, inst_bit_size - (total_size - 4),
|
||||
inst_bit_size - (total_size - 8));
|
||||
a->i_r = p.val;
|
||||
p = makelongparameter (allWords, inst_bit_size - (total_size - 8),
|
||||
inst_bit_size - (total_size - 10));
|
||||
a->scale = p.val;
|
||||
p = makelongparameter (allWords, inst_bit_size - (total_size - 10),
|
||||
inst_bit_size);
|
||||
a->constant = p.val;
|
||||
break;
|
||||
|
||||
case arg_rbase:
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
|
||||
inst_bit_size - start_bits);
|
||||
a->r = p.val;
|
||||
break;
|
||||
|
||||
case arg_cr:
|
||||
if (a->size <= 8)
|
||||
{
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
|
||||
inst_bit_size - start_bits);
|
||||
a->r = p.val;
|
||||
/* Case for opc4 r dispu rbase. */
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits + 8),
|
||||
inst_bit_size - (start_bits + 4));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The 'rbase' start_bits is always relative to a 32-bit data type. */
|
||||
p = makelongparameter (allWords, 32 - (start_bits + 4),
|
||||
32 - start_bits);
|
||||
a->r = p.val;
|
||||
p = makelongparameter (allWords, 32 - start_bits,
|
||||
inst_bit_size);
|
||||
}
|
||||
if ((p.nbits == 4) && cst4flag)
|
||||
{
|
||||
if (instruction->flags & DISPUW4)
|
||||
p.val *= 2;
|
||||
else if (instruction->flags & DISPUD4)
|
||||
p.val *= 4;
|
||||
}
|
||||
a->constant = p.val;
|
||||
break;
|
||||
|
||||
case arg_c:
|
||||
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
|
||||
inst_bit_size - start_bits);
|
||||
a->constant = p.val;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Print a single argument. */
|
||||
|
||||
static void
|
||||
print_arg (argument *a, struct disassemble_info *info)
|
||||
{
|
||||
LONGLONG longdisp, mask;
|
||||
char sign_flag;
|
||||
int op_index = 0;
|
||||
char string[200];
|
||||
PTR stream = info->stream;
|
||||
fprintf_ftype func = info->fprintf_func;
|
||||
|
||||
switch (a->type)
|
||||
{
|
||||
case arg_copr:
|
||||
func (stream, "%s", getcopregname (a->cr, CRX_C_REGTYPE));
|
||||
break;
|
||||
|
||||
case arg_copsr:
|
||||
func (stream, "%s", getcopregname (a->cr, CRX_CS_REGTYPE));
|
||||
break;
|
||||
|
||||
case arg_r:
|
||||
if (IS_INSN_MNEMONIC ("mtpr") || IS_INSN_MNEMONIC ("mfpr"))
|
||||
func (stream, "%s", getprocregname (a->r));
|
||||
else
|
||||
func (stream, "%s", getregname (a->r));
|
||||
break;
|
||||
|
||||
case arg_ic:
|
||||
if (IS_INSN_MNEMONIC ("excp"))
|
||||
func (stream, "%s", gettrapstring (a->constant));
|
||||
|
||||
else if (IS_INSN_MNEMONIC ("cinv"))
|
||||
func (stream, "%s", getcinvstring (a->constant));
|
||||
|
||||
else if (INST_HAS_REG_LIST)
|
||||
{
|
||||
if (!IS_INSN_TYPE (COP_REG_INS))
|
||||
{
|
||||
getregliststring (a->constant, string, 1);
|
||||
func (stream, "%s", string);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check for proper argument number. */
|
||||
if (processing_argument_number == 2)
|
||||
{
|
||||
getregliststring (a->constant, string, 0);
|
||||
func (stream, "%s", string);
|
||||
}
|
||||
else
|
||||
func (stream, "$0x%x", a->constant);
|
||||
}
|
||||
}
|
||||
else
|
||||
func (stream, "$0x%x", a->constant);
|
||||
break;
|
||||
|
||||
case arg_icr:
|
||||
func (stream, "0x%x(%s,%s,%d)", a->constant, getregname (a->r),
|
||||
getregname (a->i_r), powerof2 (a->scale));
|
||||
break;
|
||||
|
||||
case arg_rbase:
|
||||
func (stream, "(%s)", getregname (a->r));
|
||||
break;
|
||||
|
||||
case arg_cr:
|
||||
func (stream, "0x%x(%s)", a->constant, getregname (a->r));
|
||||
|
||||
if (IS_INSN_TYPE (LD_STOR_INS_INC))
|
||||
func (stream, "+");
|
||||
break;
|
||||
|
||||
case arg_c:
|
||||
/* Removed the *2 part as because implicit zeros are no more required.
|
||||
Have to fix this as this needs a bit of extension in terms of branchins.
|
||||
Have to add support for cmp and branch instructions. */
|
||||
if (IS_INSN_TYPE (BRANCH_INS) || IS_INSN_MNEMONIC ("bal")
|
||||
|| IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (DCR_BRANCH_INS)
|
||||
|| IS_INSN_TYPE (COP_BRANCH_INS))
|
||||
{
|
||||
func (stream, "%c", '*');
|
||||
longdisp = a->constant;
|
||||
longdisp <<= 1;
|
||||
sign_flag = '+';
|
||||
|
||||
switch (a->size)
|
||||
{
|
||||
case 8:
|
||||
case 16:
|
||||
case 24:
|
||||
case 32:
|
||||
mask = ((LONGLONG)1 << a->size) - 1;
|
||||
if (longdisp & ((LONGLONG)1 << a->size))
|
||||
{
|
||||
sign_flag = '-';
|
||||
longdisp = ~(longdisp) + 1;
|
||||
}
|
||||
a->constant = (unsigned long int) (longdisp & mask);
|
||||
break;
|
||||
default:
|
||||
func (stream,
|
||||
"Wrong offset used in branch/bal instruction");
|
||||
break;
|
||||
}
|
||||
|
||||
func (stream, "%c", sign_flag);
|
||||
}
|
||||
/* For branch Neq instruction it is 2*offset + 2. */
|
||||
if (IS_INSN_TYPE (BRANCH_NEQ_INS))
|
||||
a->constant = 2 * a->constant + 2;
|
||||
if (IS_INSN_TYPE (LD_STOR_INS_INC)
|
||||
|| IS_INSN_TYPE (LD_STOR_INS)
|
||||
|| IS_INSN_TYPE (STOR_IMM_INS)
|
||||
|| IS_INSN_TYPE (CSTBIT_INS))
|
||||
{
|
||||
op_index = instruction->flags & REVERSE_MATCH ? 0 : 1;
|
||||
if (instruction->operands[op_index].op_type == abs16)
|
||||
a->constant |= 0xFFFF0000;
|
||||
}
|
||||
func (stream, "0x%x", a->constant);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Print all the arguments of CURRINSN instruction. */
|
||||
|
||||
static void
|
||||
print_arguments (ins *currInsn, struct disassemble_info *info)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < currInsn->nargs; i++)
|
||||
{
|
||||
processing_argument_number = i;
|
||||
|
||||
print_arg (&currInsn->arg[i], info);
|
||||
|
||||
if (i != currInsn->nargs - 1)
|
||||
info->fprintf_func (info->stream, ", ");
|
||||
}
|
||||
}
|
||||
|
||||
/* Build the instruction's arguments. */
|
||||
|
||||
static void
|
||||
make_instruction (void)
|
||||
{
|
||||
int i;
|
||||
unsigned int temp_value, shift;
|
||||
argument a;
|
||||
|
||||
for (i = 0; i < currInsn.nargs; i++)
|
||||
{
|
||||
a.type = getargtype (instruction->operands[i].op_type);
|
||||
if (instruction->operands[i].op_type == cst4
|
||||
|| instruction->operands[i].op_type == rbase_cst4)
|
||||
cst4flag = 1;
|
||||
a.size = getbits (instruction->operands[i].op_type);
|
||||
shift = instruction->operands[i].shift;
|
||||
|
||||
make_argument (&a, shift);
|
||||
currInsn.arg[i] = a;
|
||||
}
|
||||
|
||||
/* Calculate instruction size (in bytes). */
|
||||
currInsn.size = instruction->size + (size_changed ? 1 : 0);
|
||||
currInsn.size *= 2;
|
||||
|
||||
/* Swapping first and second arguments. */
|
||||
if (IS_INSN_TYPE (COP_BRANCH_INS))
|
||||
{
|
||||
temp_value = currInsn.arg[0].constant;
|
||||
currInsn.arg[0].constant = currInsn.arg[1].constant;
|
||||
currInsn.arg[1].constant = temp_value;
|
||||
}
|
||||
}
|
||||
|
||||
/* Retrieve a single word from a given memory address. */
|
||||
|
||||
static wordU
|
||||
get_word_at_PC (bfd_vma memaddr, struct disassemble_info *info)
|
||||
{
|
||||
bfd_byte buffer[4];
|
||||
int status;
|
||||
wordU insn = 0;
|
||||
|
||||
status = info->read_memory_func (memaddr, buffer, 2, info);
|
||||
|
||||
if (status == 0)
|
||||
insn = (wordU) bfd_getl16 (buffer);
|
||||
|
||||
return insn;
|
||||
}
|
||||
|
||||
/* Retrieve multiple words (3) from a given memory address. */
|
||||
|
||||
static void
|
||||
get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
|
||||
{
|
||||
int i;
|
||||
bfd_vma mem;
|
||||
|
||||
for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
|
||||
words[i] = get_word_at_PC (mem, info);
|
||||
|
||||
allWords =
|
||||
((ULONGLONG) words[0] << 32) + ((unsigned long) words[1] << 16) + words[2];
|
||||
}
|
||||
|
||||
/* Prints the instruction by calling print_arguments after proper matching. */
|
||||
|
||||
int
|
||||
print_insn_crx (memaddr, info)
|
||||
bfd_vma memaddr;
|
||||
struct disassemble_info *info;
|
||||
{
|
||||
int is_decoded; /* Nonzero means instruction has a match. */
|
||||
|
||||
/* Initialize global variables. */
|
||||
cst4flag = 0;
|
||||
size_changed = 0;
|
||||
|
||||
/* Retrieve the encoding from current memory location. */
|
||||
get_words_at_PC (memaddr, info);
|
||||
/* Find a matching opcode in table. */
|
||||
is_decoded = match_opcode ();
|
||||
/* If found, print the instruction's mnemonic and arguments. */
|
||||
if (is_decoded > 0 && (words[0] << 16 || words[1]) != 0)
|
||||
{
|
||||
info->fprintf_func (info->stream, "%s", instruction->mnemonic);
|
||||
if ((currInsn.nargs = get_number_of_operands ()) != 0)
|
||||
info->fprintf_func (info->stream, "\t");
|
||||
make_instruction ();
|
||||
print_arguments (&currInsn, info);
|
||||
return currInsn.size;
|
||||
}
|
||||
|
||||
/* No match found. */
|
||||
info->fprintf_func (info->stream,"%s ",ILLEGAL);
|
||||
return 2;
|
||||
}
|
|
@ -0,0 +1,674 @@
|
|||
/* crx-opc.c -- Table of opcodes for the CRX processor.
|
||||
Copyright 2004 Free Software Foundation, Inc.
|
||||
Contributed by Tomer Levi NSC, Israel.
|
||||
Originally written for GAS 2.12 by Tomer Levi.
|
||||
|
||||
This file is part of GAS, GDB and the GNU binutils.
|
||||
|
||||
GAS, GDB, and GNU binutils is free software; you can redistribute it
|
||||
and/or modify it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation; either version 2, or (at your
|
||||
option) any later version.
|
||||
|
||||
GAS, GDB, and GNU binutils are distributed in the hope that they will be
|
||||
useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||
|
||||
#include <stdio.h>
|
||||
#include "libiberty.h"
|
||||
#include "symcat.h"
|
||||
#include "opcode/crx.h"
|
||||
|
||||
const inst crx_instruction[] =
|
||||
{
|
||||
/* Create an arithmetic instruction - INST[bw]. */
|
||||
#define ARITH_BYTE_INST(NAME, OPC) \
|
||||
/* opc8 cst4 r */ \
|
||||
{NAME, 1, OPC, 24, ARITH_BYTE_INS, {{cst4,20}, {regr,16}}}, \
|
||||
/* opc8 i16 r */ \
|
||||
{NAME, 2, (OPC<<4)+0xE, 20, ARITH_BYTE_INS, {{i16,0}, {regr,16}}}, \
|
||||
/* opc8 r r */ \
|
||||
{NAME, 1, OPC+0x40, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
|
||||
|
||||
ARITH_BYTE_INST ("addub", 0x0),
|
||||
ARITH_BYTE_INST ("addb", 0x1),
|
||||
ARITH_BYTE_INST ("addcb", 0x2),
|
||||
ARITH_BYTE_INST ("andb", 0x3),
|
||||
ARITH_BYTE_INST ("cmpb", 0x4),
|
||||
ARITH_BYTE_INST ("movb", 0x5),
|
||||
ARITH_BYTE_INST ("orb", 0x6),
|
||||
ARITH_BYTE_INST ("subb", 0x7),
|
||||
ARITH_BYTE_INST ("subcb", 0x8),
|
||||
ARITH_BYTE_INST ("xorb", 0x9),
|
||||
ARITH_BYTE_INST ("mulb", 0xA),
|
||||
|
||||
ARITH_BYTE_INST ("adduw", 0x10),
|
||||
ARITH_BYTE_INST ("addw", 0x11),
|
||||
ARITH_BYTE_INST ("addcw", 0x12),
|
||||
ARITH_BYTE_INST ("andw", 0x13),
|
||||
ARITH_BYTE_INST ("cmpw", 0x14),
|
||||
ARITH_BYTE_INST ("movw", 0x15),
|
||||
ARITH_BYTE_INST ("orw", 0x16),
|
||||
ARITH_BYTE_INST ("subw", 0x17),
|
||||
ARITH_BYTE_INST ("subcw", 0x18),
|
||||
ARITH_BYTE_INST ("xorw", 0x19),
|
||||
ARITH_BYTE_INST ("mulw", 0x1A),
|
||||
|
||||
/* Create an arithmetic instruction - INST[d]. */
|
||||
#define ARITH_INST(NAME, OPC) \
|
||||
/* opc8 cst4 r */ \
|
||||
{NAME, 1, OPC, 24, ARITH_INS, {{cst4,20}, {regr,16}}}, \
|
||||
/* opc8 i16 r */ \
|
||||
{NAME, 2, (OPC<<4)+0xE, 20, ARITH_INS, {{i16,0}, {regr,16}}}, \
|
||||
/* opc8 i32 r */ \
|
||||
{NAME, 3, (OPC<<4)+0xF, 20, ARITH_INS, {{i32,0}, {regr,16}}}, \
|
||||
/* opc8 r r */ \
|
||||
{NAME, 1, OPC+0x40, 24, ARITH_INS, {{regr,20}, {regr,16}}}
|
||||
|
||||
ARITH_INST ("addud", 0x20),
|
||||
ARITH_INST ("addd", 0x21),
|
||||
ARITH_INST ("addcd", 0x22),
|
||||
ARITH_INST ("andd", 0x23),
|
||||
ARITH_INST ("cmpd", 0x24),
|
||||
ARITH_INST ("movd", 0x25),
|
||||
ARITH_INST ("ord", 0x26),
|
||||
ARITH_INST ("subd", 0x27),
|
||||
ARITH_INST ("subcd", 0x28),
|
||||
ARITH_INST ("xord", 0x29),
|
||||
ARITH_INST ("muld", 0x2A),
|
||||
|
||||
/* Create a shift instruction. */
|
||||
#define SHIFT_INST(NAME, OPRD, OPC1, SHIFT1, OPC2) \
|
||||
/* OPRD=i3 -->> opc9 i3 r */ \
|
||||
/* OPRD=i4 -->> opc8 i4 r */ \
|
||||
/* OPRD=i5 -->> opc7 i5 r */ \
|
||||
{NAME, 1, OPC1, SHIFT1, SHIFT_INS, {{OPRD,20}, {regr,16}}}, \
|
||||
/* opc8 r r */ \
|
||||
{NAME, 1, OPC2, 24, SHIFT_INS, {{regr,20}, {regr,16}}}
|
||||
|
||||
SHIFT_INST ("sllb", i3, 0x1F8, 23, 0x4D),
|
||||
SHIFT_INST ("srlb", i3, 0x1F9, 23, 0x4E),
|
||||
SHIFT_INST ("srab", i3, 0x1FA, 23, 0x4F),
|
||||
|
||||
SHIFT_INST ("sllw", i4, 0xB6, 24, 0x5D),
|
||||
SHIFT_INST ("srlw", i4, 0xB7, 24, 0x5E),
|
||||
SHIFT_INST ("sraw", i4, 0xB8, 24, 0x5F),
|
||||
|
||||
SHIFT_INST ("slld", i5, 0x78, 25, 0x6D),
|
||||
SHIFT_INST ("srld", i5, 0x79, 25, 0x6E),
|
||||
SHIFT_INST ("srad", i5, 0x7A, 25, 0x6F),
|
||||
|
||||
/* Create a conditional branch instruction. */
|
||||
#define BRANCH_INST(NAME, OPC) \
|
||||
/* opc4 c4 dispe9 */ \
|
||||
{NAME, 1, OPC, 24, BRANCH_INS | RELAXABLE, {{d9,16}}}, \
|
||||
/* opc4 c4 disps17 */ \
|
||||
{NAME, 2, (OPC<<8)+0x7E, 16, BRANCH_INS | RELAXABLE, {{d17,0}}}, \
|
||||
/* opc4 c4 disps33 */ \
|
||||
{NAME, 3, (OPC<<8)+0x7F, 16, BRANCH_INS | RELAXABLE, {{d33,0}}}
|
||||
|
||||
BRANCH_INST ("beq", 0x70),
|
||||
BRANCH_INST ("bne", 0x71),
|
||||
BRANCH_INST ("bcs", 0x72),
|
||||
BRANCH_INST ("bcc", 0x73),
|
||||
BRANCH_INST ("bhi", 0x74),
|
||||
BRANCH_INST ("bls", 0x75),
|
||||
BRANCH_INST ("bgt", 0x76),
|
||||
BRANCH_INST ("ble", 0x77),
|
||||
BRANCH_INST ("bfs", 0x78),
|
||||
BRANCH_INST ("bfc", 0x79),
|
||||
BRANCH_INST ("blo", 0x7A),
|
||||
BRANCH_INST ("bhs", 0x7B),
|
||||
BRANCH_INST ("blt", 0x7C),
|
||||
BRANCH_INST ("bge", 0x7D),
|
||||
BRANCH_INST ("br", 0x7E),
|
||||
|
||||
/* Create a 'Branch if Equal to 0' instruction. */
|
||||
#define BRANCH_NEQ_INST(NAME, OPC) \
|
||||
/* opc8 dispu5 r */ \
|
||||
{NAME, 1, OPC, 24, BRANCH_NEQ_INS, {{regr,16}, {d5,20}}}
|
||||
|
||||
BRANCH_NEQ_INST ("beq0b", 0xB0),
|
||||
BRANCH_NEQ_INST ("bne0b", 0xB1),
|
||||
BRANCH_NEQ_INST ("beq0w", 0xB2),
|
||||
BRANCH_NEQ_INST ("bne0w", 0xB3),
|
||||
BRANCH_NEQ_INST ("beq0d", 0xB4),
|
||||
BRANCH_NEQ_INST ("bne0d", 0xB5),
|
||||
|
||||
/* Create instruction with no operands. */
|
||||
#define NO_OP_INST(NAME, OPC) \
|
||||
/* opc16 */ \
|
||||
{NAME, 1, OPC, 16, 0, {{0, 0}}}
|
||||
|
||||
NO_OP_INST ("nop", 0x3002),
|
||||
NO_OP_INST ("retx", 0x3003),
|
||||
NO_OP_INST ("di", 0x3004),
|
||||
NO_OP_INST ("ei", 0x3005),
|
||||
NO_OP_INST ("wait", 0x3006),
|
||||
NO_OP_INST ("eiwait", 0x3007),
|
||||
|
||||
/* Create a 'Compare & Branch' instruction. */
|
||||
#define CMPBR_INST(NAME, OPC1, OPC2, C4) \
|
||||
/* opc12 r r c4 disps9 */ \
|
||||
{NAME, 2, ((0x300+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d9,0}}}, \
|
||||
/* opc12 r r c4 disps25 */ \
|
||||
{NAME, 3, ((0x310+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d25,0}}}, \
|
||||
/* opc12 i4cst4 r c4 disps9 */ \
|
||||
{NAME, 2, ((0x300+OPC2)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{cst4,16}, {regr,12}, {d9,0}}}, \
|
||||
/* opc12 i4cst4 r c4 disps25 */ \
|
||||
{NAME, 3, ((0x310+OPC2)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{cst4,16}, {regr,12}, {d25,0}}}
|
||||
|
||||
CMPBR_INST ("cmpbeqb", 0x8, 0xC, 0x0),
|
||||
CMPBR_INST ("cmpbneb", 0x8, 0xC, 0x1),
|
||||
CMPBR_INST ("cmpbhib", 0x8, 0xC, 0x4),
|
||||
CMPBR_INST ("cmpblsb", 0x8, 0xC, 0x5),
|
||||
CMPBR_INST ("cmpbgtb", 0x8, 0xC, 0x6),
|
||||
CMPBR_INST ("cmpbleb", 0x8, 0xC, 0x7),
|
||||
CMPBR_INST ("cmpblob", 0x8, 0xC, 0xA),
|
||||
CMPBR_INST ("cmpbhsb", 0x8, 0xC, 0xB),
|
||||
CMPBR_INST ("cmpbltb", 0x8, 0xC, 0xC),
|
||||
CMPBR_INST ("cmpbgeb", 0x8, 0xC, 0xD),
|
||||
|
||||
CMPBR_INST ("cmpbeqw", 0x9, 0xD, 0x0),
|
||||
CMPBR_INST ("cmpbnew", 0x9, 0xD, 0x1),
|
||||
CMPBR_INST ("cmpbhiw", 0x9, 0xD, 0x4),
|
||||
CMPBR_INST ("cmpblsw", 0x9, 0xD, 0x5),
|
||||
CMPBR_INST ("cmpbgtw", 0x9, 0xD, 0x6),
|
||||
CMPBR_INST ("cmpblew", 0x9, 0xD, 0x7),
|
||||
CMPBR_INST ("cmpblow", 0x9, 0xD, 0xA),
|
||||
CMPBR_INST ("cmpbhsw", 0x9, 0xD, 0xB),
|
||||
CMPBR_INST ("cmpbltw", 0x9, 0xD, 0xC),
|
||||
CMPBR_INST ("cmpbgew", 0x9, 0xD, 0xD),
|
||||
|
||||
CMPBR_INST ("cmpbeqd", 0xA, 0xE, 0x0),
|
||||
CMPBR_INST ("cmpbned", 0xA, 0xE, 0x1),
|
||||
CMPBR_INST ("cmpbhid", 0xA, 0xE, 0x4),
|
||||
CMPBR_INST ("cmpblsd", 0xA, 0xE, 0x5),
|
||||
CMPBR_INST ("cmpbgtd", 0xA, 0xE, 0x6),
|
||||
CMPBR_INST ("cmpbled", 0xA, 0xE, 0x7),
|
||||
CMPBR_INST ("cmpblod", 0xA, 0xE, 0xA),
|
||||
CMPBR_INST ("cmpbhsd", 0xA, 0xE, 0xB),
|
||||
CMPBR_INST ("cmpbltd", 0xA, 0xE, 0xC),
|
||||
CMPBR_INST ("cmpbged", 0xA, 0xE, 0xD),
|
||||
|
||||
/* Create an instruction using a single register operand. */
|
||||
#define REG1_INST(NAME, OPC) \
|
||||
/* opc8 c4 r */ \
|
||||
{NAME, 1, OPC, 20, 0, {{regr,16}}}
|
||||
|
||||
/* JCond instructions */
|
||||
REG1_INST ("jeq", 0xBA0),
|
||||
REG1_INST ("jne", 0xBA1),
|
||||
REG1_INST ("jcs", 0xBA2),
|
||||
REG1_INST ("jcc", 0xBA3),
|
||||
REG1_INST ("jhi", 0xBA4),
|
||||
REG1_INST ("jls", 0xBA5),
|
||||
REG1_INST ("jgt", 0xBA6),
|
||||
REG1_INST ("jle", 0xBA7),
|
||||
REG1_INST ("jfs", 0xBA8),
|
||||
REG1_INST ("jfc", 0xBA9),
|
||||
REG1_INST ("jlo", 0xBAA),
|
||||
REG1_INST ("jhs", 0xBAB),
|
||||
REG1_INST ("jlt", 0xBAC),
|
||||
REG1_INST ("jge", 0xBAD),
|
||||
REG1_INST ("jump", 0xBAE),
|
||||
|
||||
/* SCond instructions */
|
||||
REG1_INST ("seq", 0xBB0),
|
||||
REG1_INST ("sne", 0xBB1),
|
||||
REG1_INST ("scs", 0xBB2),
|
||||
REG1_INST ("scc", 0xBB3),
|
||||
REG1_INST ("shi", 0xBB4),
|
||||
REG1_INST ("sls", 0xBB5),
|
||||
REG1_INST ("sgt", 0xBB6),
|
||||
REG1_INST ("sle", 0xBB7),
|
||||
REG1_INST ("sfs", 0xBB8),
|
||||
REG1_INST ("sfc", 0xBB9),
|
||||
REG1_INST ("slo", 0xBBA),
|
||||
REG1_INST ("shs", 0xBBB),
|
||||
REG1_INST ("slt", 0xBBC),
|
||||
REG1_INST ("sge", 0xBBD),
|
||||
|
||||
/* Create an instruction using two register operands. */
|
||||
#define REG2_INST(NAME, OPC) \
|
||||
/* opc24 r r OR opc20 c4 r r */ \
|
||||
{NAME, 2, 0x300800+OPC, 8, 0, {{regr,4}, {regr,0}}}
|
||||
|
||||
/* MULTIPLY INSTRUCTIONS */
|
||||
REG2_INST ("macsb", 0x40),
|
||||
REG2_INST ("macub", 0x41),
|
||||
REG2_INST ("macqb", 0x42),
|
||||
|
||||
REG2_INST ("macsw", 0x50),
|
||||
REG2_INST ("macuw", 0x51),
|
||||
REG2_INST ("macqw", 0x52),
|
||||
|
||||
REG2_INST ("macsd", 0x60),
|
||||
REG2_INST ("macud", 0x61),
|
||||
REG2_INST ("macqd", 0x62),
|
||||
|
||||
REG2_INST ("mullsd", 0x65),
|
||||
REG2_INST ("mullud", 0x66),
|
||||
|
||||
REG2_INST ("mulsbw", 0x3B),
|
||||
REG2_INST ("mulubw", 0x3C),
|
||||
REG2_INST ("mulswd", 0x3D),
|
||||
REG2_INST ("muluwd", 0x3E),
|
||||
|
||||
/* SIGNEXTEND STUFF */
|
||||
REG2_INST ("sextbw", 0x30),
|
||||
REG2_INST ("sextbd", 0x31),
|
||||
REG2_INST ("sextwd", 0x32),
|
||||
REG2_INST ("zextbw", 0x34),
|
||||
REG2_INST ("zextbd", 0x35),
|
||||
REG2_INST ("zextwd", 0x36),
|
||||
|
||||
REG2_INST ("bswap", 0x3F),
|
||||
|
||||
REG2_INST ("maxsb", 0x80),
|
||||
REG2_INST ("minsb", 0x81),
|
||||
REG2_INST ("maxub", 0x82),
|
||||
REG2_INST ("minub", 0x83),
|
||||
REG2_INST ("absb", 0x84),
|
||||
REG2_INST ("negb", 0x85),
|
||||
REG2_INST ("cntl0b", 0x86),
|
||||
REG2_INST ("cntl1b", 0x87),
|
||||
REG2_INST ("popcntb",0x88),
|
||||
REG2_INST ("rotlb", 0x89),
|
||||
REG2_INST ("rotrb", 0x8A),
|
||||
REG2_INST ("mulqb", 0x8B),
|
||||
REG2_INST ("addqb", 0x8C),
|
||||
REG2_INST ("subqb", 0x8D),
|
||||
REG2_INST ("cntlsb", 0x8E),
|
||||
|
||||
REG2_INST ("maxsw", 0x90),
|
||||
REG2_INST ("minsw", 0x91),
|
||||
REG2_INST ("maxuw", 0x92),
|
||||
REG2_INST ("minuw", 0x93),
|
||||
REG2_INST ("absw", 0x94),
|
||||
REG2_INST ("negw", 0x95),
|
||||
REG2_INST ("cntl0w", 0x96),
|
||||
REG2_INST ("cntl1w", 0x97),
|
||||
REG2_INST ("popcntw",0x98),
|
||||
REG2_INST ("rotlw", 0x99),
|
||||
REG2_INST ("rotrw", 0x9A),
|
||||
REG2_INST ("mulqw", 0x9B),
|
||||
REG2_INST ("addqw", 0x9C),
|
||||
REG2_INST ("subqw", 0x9D),
|
||||
REG2_INST ("cntlsw", 0x9E),
|
||||
|
||||
REG2_INST ("maxsd", 0xA0),
|
||||
REG2_INST ("minsd", 0xA1),
|
||||
REG2_INST ("maxud", 0xA2),
|
||||
REG2_INST ("minud", 0xA3),
|
||||
REG2_INST ("absd", 0xA4),
|
||||
REG2_INST ("negd", 0xA5),
|
||||
REG2_INST ("cntl0d", 0xA6),
|
||||
REG2_INST ("cntl1d", 0xA7),
|
||||
REG2_INST ("popcntd",0xA8),
|
||||
REG2_INST ("rotld", 0xA9),
|
||||
REG2_INST ("rotrd", 0xAA),
|
||||
REG2_INST ("mulqd", 0xAB),
|
||||
REG2_INST ("addqd", 0xAC),
|
||||
REG2_INST ("subqd", 0xAD),
|
||||
REG2_INST ("cntlsd", 0xAE),
|
||||
|
||||
/* Conditional move instructions */
|
||||
REG2_INST ("cmoveqd", 0x70),
|
||||
REG2_INST ("cmovned", 0x71),
|
||||
REG2_INST ("cmovcsd", 0x72),
|
||||
REG2_INST ("cmovccd", 0x73),
|
||||
REG2_INST ("cmovhid", 0x74),
|
||||
REG2_INST ("cmovlsd", 0x75),
|
||||
REG2_INST ("cmovgtd", 0x76),
|
||||
REG2_INST ("cmovled", 0x77),
|
||||
REG2_INST ("cmovfsd", 0x78),
|
||||
REG2_INST ("cmovfcd", 0x79),
|
||||
REG2_INST ("cmovlod", 0x7A),
|
||||
REG2_INST ("cmovhsd", 0x7B),
|
||||
REG2_INST ("cmovltd", 0x7C),
|
||||
REG2_INST ("cmovged", 0x7D),
|
||||
|
||||
/* Load instructions (from memory to register). */
|
||||
#define LD_REG_INST(NAME, OPC1, OPC2, DISP) \
|
||||
/* opc12 r abs16 */ \
|
||||
{NAME, 2, 0x320+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{abs16,0}, {regr,16}}}, \
|
||||
/* opc12 r abs32 */ \
|
||||
{NAME, 3, 0x330+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{abs32,0}, {regr,16}}}, \
|
||||
/* opc4 r c4 rbase */ \
|
||||
{NAME, 1, ((0x8+OPC2)<<8), 20, LD_STOR_INS | DISP | FMT_1 | REVERSE_MATCH, {{rbase,20}, {regr,24}}},\
|
||||
/* opc4 r rbase dispu[bwd]4 */ \
|
||||
{NAME, 1, 0x8+OPC2, 28, LD_STOR_INS | DISP | REVERSE_MATCH, {{rbase_cst4,16}, {regr,24}}}, \
|
||||
/* opc4 r rbase disps16 */ \
|
||||
{NAME, 2, ((0x8+OPC2)<<8)+0xE, 20, LD_STOR_INS | DISP | FMT_1 | REVERSE_MATCH, {{rbase_dispu16,16}, {regr,24}}}, \
|
||||
/* opc4 r rbase disps32 */ \
|
||||
{NAME, 3, ((0x8+OPC2)<<8)+0xF, 20, LD_STOR_INS | FMT_1 | REVERSE_MATCH, {{rbase_dispu32,16}, {regr,24}}}, \
|
||||
/* opc12 r rbase */ \
|
||||
{NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC | REVERSE_MATCH, {{rbase,12}, {regr,16}}}, \
|
||||
/* opc12 r rbase disps12 */ \
|
||||
{NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC | REVERSE_MATCH, {{rbase_dispu12,12}, {regr,16}}}, \
|
||||
/* opc12 r rbase ridx scl2 disps6 */ \
|
||||
{NAME, 2, 0x32C+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{rbase_ridx_scl2_dispu6,0}, {regr,16}}}, \
|
||||
/* opc12 r rbase ridx scl2 disps22 */ \
|
||||
{NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{rbase_ridx_scl2_dispu22,0}, {regr,16}}}
|
||||
|
||||
LD_REG_INST ("loadb", 0x0, 0x0, DISPUB4),
|
||||
LD_REG_INST ("loadw", 0x1, 0x1, DISPUW4),
|
||||
LD_REG_INST ("loadd", 0x2, 0x2, DISPUD4),
|
||||
|
||||
/* Store instructions (from Register to Memory). */
|
||||
#define ST_REG_INST(NAME, OPC1, OPC2, DISP) \
|
||||
/* opc12 r abs16 */ \
|
||||
{NAME, 2, 0x320+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs16,0}}}, \
|
||||
/* opc12 r abs32 */ \
|
||||
{NAME, 3, 0x330+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs32,0}}}, \
|
||||
/* opc4 r c4 rbase */ \
|
||||
{NAME, 1, ((0x8+OPC2)<<8), 20, LD_STOR_INS | DISP | FMT_1, {{regr,24}, {rbase,20}}},\
|
||||
/* opc4 r rbase dispu[bwd]4 */ \
|
||||
{NAME, 1, 0x8+OPC2, 28, LD_STOR_INS | DISP, {{regr,24}, {rbase_cst4,16}}}, \
|
||||
/* opc4 r rbase disps16 */ \
|
||||
{NAME, 2, ((0x8+OPC2)<<8)+0xE, 20, LD_STOR_INS | DISP | FMT_1, {{regr,24}, {rbase_dispu16,16}}}, \
|
||||
/* opc4 r rbase disps32 */ \
|
||||
{NAME, 3, ((0x8+OPC2)<<8)+0xF, 20, LD_STOR_INS | FMT_1, {{regr,24}, {rbase_dispu32,16}}}, \
|
||||
/* opc12 r rbase */ \
|
||||
{NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC, {{regr,16}, {rbase,12}}}, \
|
||||
/* opc12 r rbase disps12 */ \
|
||||
{NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC, {{regr,16}, {rbase_dispu12,12}}}, \
|
||||
/* opc12 r rbase ridx scl2 disps6 */ \
|
||||
{NAME, 2, 0x32C+OPC1, 20, LD_STOR_INS, {{regr,16}, {rbase_ridx_scl2_dispu6,0}}}, \
|
||||
/* opc12 r rbase ridx scl2 disps22 */ \
|
||||
{NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS, {{regr,16}, {rbase_ridx_scl2_dispu22,0}}}
|
||||
|
||||
/* Store instructions (Immediate to Memory). */
|
||||
#define ST_I_INST(NAME, OPC) \
|
||||
/* opc12 i4 abs16 */ \
|
||||
{NAME, 2, 0x360+OPC, 20, STOR_IMM_INS, {{i4,16}, {abs16,0}}}, \
|
||||
/* opc12 i4 abs32 */ \
|
||||
{NAME, 3, 0x370+OPC, 20, STOR_IMM_INS, {{i4,16}, {abs32,0}}}, \
|
||||
/* opc12 i4 c4 rbase */ \
|
||||
{NAME, 1, 0x368+OPC, 20, LD_STOR_INS_INC, {{i4,16}, {rbase,12}}}, \
|
||||
/* opc12 i4 rbase disps12 */ \
|
||||
{NAME, 2, 0x368+OPC, 20, LD_STOR_INS_INC, {{i4,16}, {rbase_dispu12,12}}}, \
|
||||
/* opc4 i4 c4 rbase */ \
|
||||
{NAME, 1, 0x364+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase,12}}}, \
|
||||
/* opc12 i4 rbase disps12 */ \
|
||||
{NAME, 2, 0x364+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_dispu12,12}}}, \
|
||||
/* opc12 i4 rbase disps28 */ \
|
||||
{NAME, 3, 0x374+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_dispu28,12}}}, \
|
||||
/* opc12 i4 rbase ridx scl2 disps6 */ \
|
||||
{NAME, 2, 0x36C+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_ridx_scl2_dispu6,0}}},\
|
||||
/* opc12 i4 rbase ridx scl2 disps22 */ \
|
||||
{NAME, 3, 0x37C+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_ridx_scl2_dispu22,0}}}
|
||||
|
||||
ST_REG_INST ("storb", 0x20, 0x4, DISPUB4),
|
||||
ST_I_INST ("storb", 0x0),
|
||||
|
||||
ST_REG_INST ("storw", 0x21, 0x5, DISPUW4),
|
||||
ST_I_INST ("storw", 0x1),
|
||||
|
||||
ST_REG_INST ("stord", 0x22, 0x6, DISPUD4),
|
||||
ST_I_INST ("stord", 0x2),
|
||||
|
||||
/* Create a bit instruction. */
|
||||
#define CSTBIT_INST(NAME, OP, OPC1, DIFF, SHIFT, OPC2) \
|
||||
/* OP=i3 -->> opc13 i3 */ \
|
||||
/* OP=i4 -->> opc12 i4 */ \
|
||||
/* OP=i5 -->> opc11 i5 */ \
|
||||
\
|
||||
/* opcNN iN abs16 */ \
|
||||
{NAME, 2, OPC1+0*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs16,0}}}, \
|
||||
/* opcNN iN abs32 */ \
|
||||
{NAME, 3, OPC1+1*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs32,0}}}, \
|
||||
/* opcNN iN rbase */ \
|
||||
{NAME, 1, OPC2, SHIFT+4, CSTBIT_INS, {{OP,20}, {rbase,16}}}, \
|
||||
/* opcNN iN rbase disps12 */ \
|
||||
{NAME, 2, OPC1+2*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_dispu12,12}}}, \
|
||||
/* opcNN iN rbase disps28 */ \
|
||||
{NAME, 3, OPC1+3*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_dispu28,12}}}, \
|
||||
/* opcNN iN rbase ridx scl2 disps6 */ \
|
||||
{NAME, 2, OPC1+4*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_ridx_scl2_dispu6,0}}}, \
|
||||
/* opcNN iN rbase ridx scl2 disps22 */ \
|
||||
{NAME, 3, OPC1+5*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_ridx_scl2_dispu22,0}}}
|
||||
|
||||
CSTBIT_INST ("cbitb", i3, 0x700, 0x20, 19, 0x1FC),
|
||||
CSTBIT_INST ("cbitw", i4, 0x382, 0x10, 20, 0xBD),
|
||||
CSTBIT_INST ("cbitd", i5, 0x1C3, 0x8, 21, 0x7B),
|
||||
{"cbitd", 2, 0x300838, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
|
||||
{"cbitd", 2, 0x18047B, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
|
||||
CSTBIT_INST ("sbitb", i3, 0x701, 0x20, 19, 0x1FD),
|
||||
CSTBIT_INST ("sbitw", i4, 0x383, 0x10, 20, 0xBE),
|
||||
CSTBIT_INST ("sbitd", i5, 0x1C4, 0x8, 21, 0x7C),
|
||||
{"sbitd", 2, 0x300839, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
|
||||
{"sbitd", 2, 0x18047C, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
|
||||
CSTBIT_INST ("tbitb", i3, 0x702, 0x20, 19, 0x1FE),
|
||||
CSTBIT_INST ("tbitw", i4, 0x384, 0x10, 20, 0xBF),
|
||||
CSTBIT_INST ("tbitd", i5, 0x1C5, 0x8, 21, 0x7D),
|
||||
{"tbitd", 2, 0x30083A, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
|
||||
{"tbitd", 2, 0x18047D, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
|
||||
/* Instructions including a register list (opcode is represented as a mask). */
|
||||
#define REGLIST_INST(NAME, OPC) \
|
||||
/* opc12 r mask16 */ \
|
||||
{NAME, 2, OPC, 20, REG_LIST, {{regr,16}, {i16,0}}}
|
||||
|
||||
REG1_INST ("getrfid", 0xFF9),
|
||||
REG1_INST ("setrfid", 0xFFA),
|
||||
|
||||
REGLIST_INST ("push", 0x346),
|
||||
REG1_INST ("push", 0xFFB),
|
||||
|
||||
REGLIST_INST ("pop", 0x324),
|
||||
REG1_INST ("pop", 0xFFC),
|
||||
|
||||
REGLIST_INST ("popret", 0x326),
|
||||
REG1_INST ("popret", 0xFFD),
|
||||
|
||||
REGLIST_INST ("loadm", 0x324),
|
||||
REGLIST_INST ("loadma", 0x325),
|
||||
REGLIST_INST ("popma", 0x325),
|
||||
|
||||
REGLIST_INST ("storm", 0x344),
|
||||
REGLIST_INST ("storma", 0x345),
|
||||
REGLIST_INST ("pushma", 0x345),
|
||||
|
||||
/* Create a branch instruction. */
|
||||
#define BR_INST(NAME, OPC1, OPC2, INS_TYPE) \
|
||||
/* opc12 r disps17 */ \
|
||||
{NAME, 2, OPC1, 20, INS_TYPE | RELAXABLE, {{regr,16}, {d17,0}}}, \
|
||||
/* opc12 r disps33 */ \
|
||||
{NAME, 3, OPC2, 20, INS_TYPE | RELAXABLE, {{regr,16}, {d33,0}}}
|
||||
|
||||
BR_INST ("bal", 0x307, 0x317, 0),
|
||||
|
||||
/* Decrement and Branch instructions */
|
||||
BR_INST ("dbnzb", 0x304, 0x314, DCR_BRANCH_INS),
|
||||
BR_INST ("dbnzw", 0x305, 0x315, DCR_BRANCH_INS),
|
||||
BR_INST ("dbnzd", 0x306, 0x316, DCR_BRANCH_INS),
|
||||
|
||||
/* Jump and link instructions */
|
||||
REG1_INST ("jal", 0xFF8),
|
||||
REG2_INST ("jal", 0x37),
|
||||
REG2_INST ("jalid", 0x33),
|
||||
|
||||
/* opc12 c4 opc12 r mask16 */
|
||||
{"loadmcr", 3, 0x3110300, 4, COP_REG_INS | REG_LIST | FMT_5, {{i4,16}, {regr,0}, {i16,0}}},
|
||||
{"stormcr", 3, 0x3110301, 4, COP_REG_INS | REG_LIST | FMT_5, {{i4,16}, {regr,0}, {i16,0}}},
|
||||
|
||||
/* esc16 r procreg */
|
||||
{"mtpr", 2, 0x3009, 16, 0, {{regr8,8}, {regr8,0}}},
|
||||
/* esc16 procreg r */
|
||||
{"mfpr", 2, 0x300A, 16, 0, {{regr8,8}, {regr8,0}}},
|
||||
/* opc12 c4 opc8 r copreg */
|
||||
{"mtcr", 2, 0x301030, 8, COP_REG_INS | FMT_2, {{i4,16}, {regr,4}, {copregr,0}}},
|
||||
/* opc12 c4 opc8 copreg r */
|
||||
{"mfcr", 2, 0x301031, 8, COP_REG_INS | FMT_2, {{i4,16}, {copregr,4}, {regr,0}}},
|
||||
/* opc12 c4 opc8 r copsreg */
|
||||
{"mtcsr", 2, 0x301032, 8, COP_REG_INS | FMT_2, {{i4,16}, {regr,4}, {copregr,0}}},
|
||||
/* opc12 c4 opc8 copsreg r */
|
||||
{"mfcsr", 2, 0x301033, 8, COP_REG_INS | FMT_2, {{i4,16}, {copregr,4}, {regr,0}}},
|
||||
|
||||
/* CO-processor extensions */
|
||||
/* opc12 c4 opc4 i4 disps9 */
|
||||
{"bcop", 2, 0x30107, 12, COP_BRANCH_INS | FMT_4, {{i4,16}, {i4,8}, {d9,0}}},
|
||||
/* opc12 c4 opc4 i4 disps25 */
|
||||
{"bcop", 3, 0x31107, 12, COP_BRANCH_INS | FMT_4, {{i4,16}, {i4,8}, {d25,0}}},
|
||||
|
||||
/* opc12 i4 */
|
||||
{"excp", 1, 0xFFF, 20, 0, {{i4,16}}},
|
||||
/* opc28 i4 */
|
||||
{"cinv", 2, 0x3010000, 4, 0, {{i4,0}}},
|
||||
|
||||
/* opc9 i5 i5 i5 r r */
|
||||
{"ram", 2, 0x7C, 23, 0, {{i5,18}, {i5,13}, {i5,8}, {regr,4}, {regr,0}}},
|
||||
{"rim", 2, 0x7D, 23, 0, {{i5,18}, {i5,13}, {i5,8}, {regr,4}, {regr,0}}},
|
||||
|
||||
/* opc9 i3 r */
|
||||
{"rotb", 1, 0x1FB, 23, 0, {{i3,20}, {regr,16}}},
|
||||
/* opc8 i4 r */
|
||||
{"rotw", 1, 0xB9, 24, 0, {{i4,20}, {regr,16}}},
|
||||
/* opc23 i5 r */
|
||||
{"rotd", 2, 0x180478, 9, 0, {{i5,4}, {regr,0}}},
|
||||
|
||||
{NULL, 0, 0, 0, 0, {{0, 0}}}
|
||||
};
|
||||
|
||||
const int crx_num_opcodes = ARRAY_SIZE (crx_instruction);
|
||||
|
||||
/* Macro to build a reg_entry, which have an opcode image :
|
||||
For example :
|
||||
REG(u4, 0x84, CRX_U_REGTYPE)
|
||||
is interpreted as :
|
||||
{"u4", u4, 0x84, CRX_U_REGTYPE} */
|
||||
#define REG(NAME, N, TYPE) {STRINGX(NAME), {NAME}, N, TYPE}
|
||||
|
||||
const reg_entry crx_regtab[] =
|
||||
{
|
||||
/* Build a general purpose register r<N>. */
|
||||
#define REG_R(N) REG(CONCAT2(r,N), N, CRX_R_REGTYPE)
|
||||
|
||||
REG_R(0), REG_R(1), REG_R(2), REG_R(3),
|
||||
REG_R(4), REG_R(5), REG_R(6), REG_R(7),
|
||||
REG_R(8), REG_R(9), REG_R(10), REG_R(11),
|
||||
REG_R(12), REG_R(13), REG_R(14), REG_R(15),
|
||||
REG(ra, 0xe, CRX_R_REGTYPE),
|
||||
REG(sp, 0xf, CRX_R_REGTYPE),
|
||||
|
||||
/* Build a user register ur<N>. */
|
||||
#define REG_U(N) REG(CONCAT2(u,N), 0x80 + N, CRX_U_REGTYPE)
|
||||
|
||||
REG_U(0), REG_U(1), REG_U(2), REG_U(3),
|
||||
REG_U(4), REG_U(5), REG_U(6), REG_U(7),
|
||||
REG_U(8), REG_U(9), REG_U(10), REG_U(11),
|
||||
REG_U(12), REG_U(13), REG_U(14), REG_U(15),
|
||||
REG(ura, 0x8e, CRX_U_REGTYPE),
|
||||
REG(usp, 0x8f, CRX_U_REGTYPE),
|
||||
|
||||
/* Build a configuration register. */
|
||||
#define REG_CFG(NAME, N) REG(NAME, N, CRX_CFG_REGTYPE)
|
||||
|
||||
REG_CFG(hi, 0x10),
|
||||
REG_CFG(lo, 0x11),
|
||||
REG_CFG(uhi, 0x90),
|
||||
REG_CFG(ulo, 0x91),
|
||||
REG_CFG(psr, 0x12),
|
||||
REG_CFG(cfg, 0x15),
|
||||
REG_CFG(cpcfg, 0x16),
|
||||
REG_CFG(ccfg, 0x1b),
|
||||
|
||||
/* Build a mptr register. */
|
||||
#define REG_MPTR(NAME, N) REG(NAME, N, CRX_MTPR_REGTYPE)
|
||||
|
||||
REG_MPTR(intbase, 0x13),
|
||||
REG_MPTR(isp, 0x14),
|
||||
REG_MPTR(cen, 0x17),
|
||||
|
||||
/* Build a pc register. */
|
||||
#define REG_PC(NAME, N) REG(NAME, N, CRX_PC_REGTYPE)
|
||||
|
||||
REG_PC(pc, 0x0)
|
||||
};
|
||||
|
||||
const int crx_num_regs = ARRAY_SIZE (crx_regtab);
|
||||
|
||||
const reg_entry crx_copregtab[] =
|
||||
{
|
||||
/* Build a Coprocessor register c<N>. */
|
||||
#define REG_C(N) REG(CONCAT2(c,N), N, CRX_C_REGTYPE)
|
||||
|
||||
REG_C(0), REG_C(1), REG_C(2), REG_C(3),
|
||||
REG_C(4), REG_C(5), REG_C(6), REG_C(7),
|
||||
REG_C(8), REG_C(9), REG_C(10), REG_C(11),
|
||||
REG_C(12), REG_C(13), REG_C(14), REG_C(15),
|
||||
|
||||
/* Build a Coprocessor Special register c<N>. */
|
||||
#define REG_CS(N) REG(CONCAT2(cs,N), N, CRX_CS_REGTYPE)
|
||||
|
||||
REG_CS(0), REG_CS(1), REG_CS(2), REG_CS(3),
|
||||
REG_CS(4), REG_CS(5), REG_CS(6), REG_CS(7),
|
||||
REG_CS(8), REG_CS(9), REG_CS(10), REG_CS(11),
|
||||
REG_CS(12), REG_CS(13), REG_CS(14), REG_CS(15)
|
||||
};
|
||||
|
||||
const int crx_num_copregs = ARRAY_SIZE (crx_copregtab);
|
||||
|
||||
/* CRX operands table. */
|
||||
const operand_entry crx_optab[] =
|
||||
{
|
||||
/* Index 0 is dummy, so we can count the instruction's operands. */
|
||||
{0, nullargs}, /* dummy */
|
||||
{4, arg_ic}, /* cst4 */
|
||||
{8, arg_c}, /* disps9 */
|
||||
{3, arg_ic}, /* i3 */
|
||||
{4, arg_ic}, /* i4 */
|
||||
{5, arg_ic}, /* i5 */
|
||||
{8, arg_ic}, /* i8 */
|
||||
{12, arg_ic}, /* i12 */
|
||||
{16, arg_ic}, /* i16 */
|
||||
{32, arg_ic}, /* i32 */
|
||||
{4, arg_c}, /* d5 */
|
||||
{8, arg_c}, /* d9 */
|
||||
{16, arg_c}, /* d17 */
|
||||
{24, arg_c}, /* d25 */
|
||||
{32, arg_c}, /* d33 */
|
||||
{16, arg_c}, /* abs16 */
|
||||
{32, arg_c}, /* abs32 */
|
||||
{4, arg_rbase}, /* rbase */
|
||||
{4, arg_cr}, /* rbase_cst4 */
|
||||
{8, arg_cr}, /* rbase_dispu8 */
|
||||
{12, arg_cr}, /* rbase_dispu12 */
|
||||
{16, arg_cr}, /* rbase_dispu16 */
|
||||
{28, arg_cr}, /* rbase_dispu28 */
|
||||
{32, arg_cr}, /* rbase_dispu32 */
|
||||
{6, arg_icr}, /* rbase_ridx_scl2_dispu6 */
|
||||
{22, arg_icr}, /* rbase_ridx_scl2_dispu22 */
|
||||
{4, arg_r}, /* regr */
|
||||
{8, arg_r}, /* regr8 */
|
||||
{4, arg_copr}, /* copregr */
|
||||
{8, arg_copr}, /* copregr8 */
|
||||
{4, arg_copsr} /* copsregr */
|
||||
};
|
||||
|
||||
/* CRX traps/interrupts. */
|
||||
const trap_entry crx_traps[] =
|
||||
{
|
||||
{"nmi", 1}, {"svc", 5}, {"dvz", 6}, {"flg", 7},
|
||||
{"bpt", 8}, {"und", 10}, {"prv", 11}, {"iberr", 12}
|
||||
};
|
||||
|
||||
const int crx_num_traps = ARRAY_SIZE (crx_traps);
|
||||
|
||||
/* cst4 operand mapping. */
|
||||
const cst4_entry cst4_map[] =
|
||||
{
|
||||
{0,0}, {1,1}, {2,2}, {3,3}, {4,4}, {5,-4}, {6,-1},
|
||||
{7,7}, {8,8}, {9,16}, {10,32}, {11,20}, {12,12}, {13,48}
|
||||
};
|
||||
|
||||
const int cst4_maps = ARRAY_SIZE (cst4_map);
|
|
@ -26,6 +26,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
|||
#define ARCH_arm
|
||||
#define ARCH_avr
|
||||
#define ARCH_cris
|
||||
#define ARCH_crx
|
||||
#define ARCH_d10v
|
||||
#define ARCH_d30v
|
||||
#define ARCH_dlx
|
||||
|
@ -123,6 +124,11 @@ disassembler (abfd)
|
|||
disassemble = cris_get_disassembler (abfd);
|
||||
break;
|
||||
#endif
|
||||
#ifdef ARCH_crx
|
||||
case bfd_arch_crx:
|
||||
disassemble = print_insn_crx;
|
||||
break;
|
||||
#endif
|
||||
#ifdef ARCH_d10v
|
||||
case bfd_arch_d10v:
|
||||
disassemble = print_insn_d10v;
|
||||
|
|
Loading…
Reference in New Issue