CARP/vr4xxx:
Rewrite ``set mipsfpu'' command so that it works with the multi-arch framework. For vr4111 and vr4121 disable the FPU.
This commit is contained in:
Andrew Cagney
parent
2e64ee9aae
commit
1fe2e66a01
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@ -1,3 +1,26 @@
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Fri Dec 18 14:23:34 1998 Andrew Cagney <cagney@chook>
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* config/mips/tm-mips.h (enum mips_fpu_type, mips_fpu): Move to
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mips-tdep.c.
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* mips-tdep.c (mips_fpu_string): Delete variable.
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(mips_fpu_type_auto): New variable.
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(mips_fpu_type): Rename mips_fpu.
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(_initialize_mips_tdep): Delete initialization of mips_fpu et.al.
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Rewrite ``set mipsfpu'' command set.
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(set_mipsfpu_command, show_mipsfpu_command,
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set_mipsfpu_single_command, set_mipsfpu_double_command,
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set_mipsfpu_none_command, set_mipsfpu_auto_command): New
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functions, handle commands.
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(mips_push_arguments, mips_push_dummy_frame, mips_pop_frame,
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mips_extract_return_value): Update.
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(start-sanitize-carp start-sanitize-vr4xxx);
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(_initialize_mips_tdep): Set mips_fpu_type according to current
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processor.
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(_initialize_mips_tdep): Only define ``set processor'' command
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when not multi-sim.
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(end-sanitize-carp end-sanitize-vr4xxx)
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start-sanitize-carp start-sanitize-vr4xxx
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Fri Dec 18 12:56:56 1998 Andrew Cagney <cagney@chook>
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267
gdb/mips-tdep.c
267
gdb/mips-tdep.c
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@ -39,15 +39,35 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "elf/mips.h"
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#include "elf-bfd.h"
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/* end-sanitize-carp end-sanitize-vr4xxx */
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/* Some MIPS boards don't support floating point, so we permit the
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user to turn it off. */
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enum mips_fpu_type
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{
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MIPS_FPU_DOUBLE, /* Full double precision floating point. */
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MIPS_FPU_SINGLE, /* Single precision floating point (R4650). */
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MIPS_FPU_NONE /* No floating point. */
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};
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static int mips_fpu_type_auto = 1;
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#ifdef MIPS_DEFAULT_FPU_TYPE
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static enum mips_fpu_type mips_fpu_type = MIPS_DEFAULT_FPU_TYPE;
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#else
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static enum mips_fpu_type mips_fpu = MIPS_FPU_DOUBLE;
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#endif
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#define MIPS_FPU_TYPE mips_fpu_type
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/* start-sanitize-carp start-sanitize-vr4xxx */
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/* MIPS specific per-architecture information */
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struct gdbarch_tdep
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{
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int elf_abi;
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/* mips options */
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int mips_eabi;
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/* int mips_default_fpu_type;
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Not yet. The MIPS_DEFAULT_FPU_TYPE is set independant of the
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current mips architecture. */
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enum mips_fpu_type mips_fpu_type;
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int mips_last_arg_regnum;
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int mips_last_fp_arg_regnum;
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};
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@ -67,6 +87,11 @@ struct gdbarch_tdep
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#define MIPS_LAST_ARG_REGNUM (gdbarch_tdep (current_gdbarch)->mips_last_arg_regnum)
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#endif
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#if GDB_MULTI_ARCH
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#undef MIPS_FPU_TYPE
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#define MIPS_FPU_TYPE (gdbarch_tdep (current_gdbarch)->mips_fpu_type)
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#endif
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/* end-sanitize-carp end-sanitize-vr4xxx */
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#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
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@ -89,12 +114,6 @@ static CORE_ADDR heuristic_proc_start PARAMS ((CORE_ADDR));
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static CORE_ADDR read_next_frame_reg PARAMS ((struct frame_info *, int));
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static void mips_set_fpu_command PARAMS ((char *, int,
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struct cmd_list_element *));
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static void mips_show_fpu_command PARAMS ((char *, int,
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struct cmd_list_element *));
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void mips_set_processor_type_command PARAMS ((char *, int));
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int mips_set_processor_type PARAMS ((char *));
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@ -117,13 +136,6 @@ char *mips_processor_type;
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char *tmp_mips_processor_type;
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/* Some MIPS boards don't support floating point, so we permit the
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user to turn it off. */
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enum mips_fpu_type mips_fpu;
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static char *mips_fpu_string;
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/* A set of original names, to be used when restoring back to generic
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registers from a specific set. */
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@ -1889,7 +1901,7 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
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because those registers are normally skipped. */
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if (typecode == TYPE_CODE_FLT
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM
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&& mips_fpu != MIPS_FPU_NONE)
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&& MIPS_FPU_TYPE != MIPS_FPU_NONE)
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{
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if (!FP_REGISTER_DOUBLE && len == 8)
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{
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@ -2087,7 +2099,7 @@ mips_push_dummy_frame()
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mips_push_register (&sp, PC_REGNUM);
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mips_push_register (&sp, HI_REGNUM);
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mips_push_register (&sp, LO_REGNUM);
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mips_push_register (&sp, mips_fpu == MIPS_FPU_NONE ? 0 : FCRCS_REGNUM);
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mips_push_register (&sp, MIPS_FPU_TYPE == MIPS_FPU_NONE ? 0 : FCRCS_REGNUM);
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/* Save general CPU registers */
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PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
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@ -2099,8 +2111,8 @@ mips_push_dummy_frame()
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/* Save floating point registers starting with high order word */
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PROC_FREG_MASK(proc_desc) =
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mips_fpu == MIPS_FPU_DOUBLE ? FLOAT_REG_SAVE_MASK
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: mips_fpu == MIPS_FPU_SINGLE ? FLOAT_SINGLE_REG_SAVE_MASK : 0;
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MIPS_FPU_TYPE == MIPS_FPU_DOUBLE ? FLOAT_REG_SAVE_MASK
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: MIPS_FPU_TYPE == MIPS_FPU_SINGLE ? FLOAT_SINGLE_REG_SAVE_MASK : 0;
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/* PROC_FREG_OFFSET is the offset of the first saved *double* register
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from FP. */
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PROC_FREG_OFFSET(proc_desc) = sp - old_sp - 8;
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@ -2168,7 +2180,7 @@ mips_pop_frame()
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read_memory_integer (new_sp - 2*MIPS_REGSIZE, MIPS_REGSIZE));
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write_register (LO_REGNUM,
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read_memory_integer (new_sp - 3*MIPS_REGSIZE, MIPS_REGSIZE));
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if (mips_fpu != MIPS_FPU_NONE)
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if (MIPS_FPU_TYPE != MIPS_FPU_NONE)
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write_register (FCRCS_REGNUM,
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read_memory_integer (new_sp - 4*MIPS_REGSIZE, MIPS_REGSIZE));
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}
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@ -2690,8 +2702,9 @@ mips_extract_return_value (valtype, regbuf, valbuf)
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regnum = 2;
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if (TYPE_CODE (valtype) == TYPE_CODE_FLT
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&& (mips_fpu == MIPS_FPU_DOUBLE
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|| (mips_fpu == MIPS_FPU_SINGLE && len <= MIPS_FPU_SINGLE_REGSIZE)))
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&& (MIPS_FPU_TYPE == MIPS_FPU_DOUBLE
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|| (MIPS_FPU_TYPE == MIPS_FPU_SINGLE
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&& len <= MIPS_FPU_SINGLE_REGSIZE)))
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regnum = FP0_REGNUM;
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if (TARGET_BYTE_ORDER == BIG_ENDIAN)
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@ -2722,8 +2735,9 @@ mips_store_return_value (valtype, valbuf)
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regnum = 2;
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if (TYPE_CODE (valtype) == TYPE_CODE_FLT
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&& (mips_fpu == MIPS_FPU_DOUBLE
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|| (mips_fpu == MIPS_FPU_SINGLE && len <= MIPS_REGSIZE)))
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&& (MIPS_FPU_TYPE == MIPS_FPU_DOUBLE
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|| (MIPS_FPU_TYPE == MIPS_FPU_SINGLE
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&& len <= MIPS_REGSIZE)))
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regnum = FP0_REGNUM;
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if (TARGET_BYTE_ORDER == BIG_ENDIAN)
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@ -2755,67 +2769,102 @@ in_sigtramp (pc, ignore)
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return (pc >= sigtramp_address && pc < sigtramp_end);
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}
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/* Command to set FPU type. mips_fpu_string will have been set to the
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user's argument. Set mips_fpu based on mips_fpu_string, and then
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canonicalize mips_fpu_string. */
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/* Commands to show/set the MIPS FPU type. */
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/*ARGSUSED*/
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static void show_mipsfpu_command PARAMS ((char *, int));
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static void
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mips_set_fpu_command (args, from_tty, c)
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show_mipsfpu_command (args, from_tty)
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char *args;
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int from_tty;
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struct cmd_list_element *c;
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{
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char *err = NULL;
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if (mips_fpu_string == NULL || *mips_fpu_string == '\0')
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mips_fpu = MIPS_FPU_DOUBLE;
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else if (strcasecmp (mips_fpu_string, "double") == 0
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|| strcasecmp (mips_fpu_string, "on") == 0
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|| strcasecmp (mips_fpu_string, "1") == 0
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|| strcasecmp (mips_fpu_string, "yes") == 0)
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mips_fpu = MIPS_FPU_DOUBLE;
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else if (strcasecmp (mips_fpu_string, "none") == 0
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|| strcasecmp (mips_fpu_string, "off") == 0
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|| strcasecmp (mips_fpu_string, "0") == 0
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|| strcasecmp (mips_fpu_string, "no") == 0)
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mips_fpu = MIPS_FPU_NONE;
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else if (strcasecmp (mips_fpu_string, "single") == 0)
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mips_fpu = MIPS_FPU_SINGLE;
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else
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err = strsave (mips_fpu_string);
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if (mips_fpu_string != NULL)
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free (mips_fpu_string);
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switch (mips_fpu)
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char *msg;
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char *fpu;
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switch (MIPS_FPU_TYPE)
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{
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case MIPS_FPU_DOUBLE:
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mips_fpu_string = strsave ("double");
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break;
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case MIPS_FPU_SINGLE:
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mips_fpu_string = strsave ("single");
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fpu = "single-precision";
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break;
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case MIPS_FPU_DOUBLE:
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fpu = "double-precision";
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break;
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case MIPS_FPU_NONE:
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mips_fpu_string = strsave ("none");
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fpu = "absent (none)";
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break;
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}
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if (err != NULL)
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{
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struct cleanup *cleanups = make_cleanup (free, err);
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error ("Unknown FPU type `%s'. Use `double', `none', or `single'.",
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err);
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do_cleanups (cleanups);
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}
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if (mips_fpu_type_auto)
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printf_unfiltered ("The MIPS floating-point coprocessor is set automatically (currently %s)\n",
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fpu);
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else
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printf_unfiltered ("The MIPS floating-point coprocessor is assumed to be %s\n",
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fpu);
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}
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static void set_mipsfpu_command PARAMS ((char *, int));
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static void
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mips_show_fpu_command (args, from_tty, c)
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set_mipsfpu_command (args, from_tty)
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char *args;
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int from_tty;
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struct cmd_list_element *c;
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{
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printf_unfiltered ("\"set mipsfpu\" must be followed by \"double\", \"single\",\"none\" or \"auto\".\n");
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show_mipsfpu_command (args, from_tty);
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}
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static void set_mipsfpu_single_command PARAMS ((char *, int));
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static void
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set_mipsfpu_single_command (args, from_tty)
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char *args;
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int from_tty;
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{
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mips_fpu_type = MIPS_FPU_SINGLE;
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mips_fpu_type_auto = 0;
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/* start-sanitize-carp start-sanitize-vr4xxx */
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if (GDB_MULTI_ARCH)
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{
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gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_SINGLE;
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}
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/* end-sanitize-carp end-sanitize-vr4xxx */
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}
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static void set_mipsfpu_double_command PARAMS ((char *, int));
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static void
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set_mipsfpu_double_command (args, from_tty)
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char *args;
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int from_tty;
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{
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mips_fpu_type = MIPS_FPU_DOUBLE;
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mips_fpu_type_auto = 0;
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/* start-sanitize-carp start-sanitize-vr4xxx */
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if (GDB_MULTI_ARCH)
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{
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gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_DOUBLE;
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}
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/* end-sanitize-carp end-sanitize-vr4xxx */
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}
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static void set_mipsfpu_none_command PARAMS ((char *, int));
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static void
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set_mipsfpu_none_command (args, from_tty)
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char *args;
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int from_tty;
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{
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mips_fpu_type = MIPS_FPU_NONE;
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mips_fpu_type_auto = 0;
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/* start-sanitize-carp start-sanitize-vr4xxx */
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if (GDB_MULTI_ARCH)
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{
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gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_NONE;
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}
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/* end-sanitize-carp end-sanitize-vr4xxx */
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}
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static void set_mipsfpu_auto_command PARAMS ((char *, int));
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static void
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set_mipsfpu_auto_command (args, from_tty)
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char *args;
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int from_tty;
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{
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mips_fpu_type_auto = 1;
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}
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/* Command to set the processor type. */
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@ -3310,6 +3359,24 @@ mips_gdbarch_init (info, arches)
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}
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set_gdbarch_long_long_bit (gdbarch, 64);
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/* enable/disable the MIPS FPU */
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if (!mips_fpu_type_auto)
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tdep->mips_fpu_type = mips_fpu_type;
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else if (info.bfd_arch_info != NULL
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&& info.bfd_arch_info->arch == bfd_arch_mips)
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switch (info.bfd_arch_info->mach)
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{
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case bfd_mach_mips4111:
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case bfd_mach_mips4121:
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tdep->mips_fpu_type = MIPS_FPU_NONE;
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break;
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default:
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tdep->mips_fpu_type = MIPS_FPU_DOUBLE;
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break;
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}
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else
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tdep->mips_fpu_type = MIPS_FPU_DOUBLE;
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if (gdbarch_debug)
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{
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fprintf_unfiltered (stderr,
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@ -3325,6 +3392,13 @@ mips_gdbarch_init (info, arches)
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"mips_gdbarch_init: MIPS_LAST_FP_ARG_REGNUM = %d (%d)\n",
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tdep->mips_last_fp_arg_regnum,
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tdep->mips_last_fp_arg_regnum - FP0_REGNUM);
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fprintf_unfiltered (stderr,
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"mips_gdbarch_init: tdep->mips_fpu_type = %d (%s)\n",
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tdep->mips_fpu_type,
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(tdep->mips_fpu_type == MIPS_FPU_NONE ? "none"
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: tdep->mips_fpu_type == MIPS_FPU_SINGLE ? "single"
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: tdep->mips_fpu_type == MIPS_FPU_DOUBLE ? "double"
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: "???"));
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}
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return gdbarch;
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@ -3335,6 +3409,7 @@ mips_gdbarch_init (info, arches)
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void
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_initialize_mips_tdep ()
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{
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static struct cmd_list_element *mipsfpulist = NULL;
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struct cmd_list_element *c;
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/* start-sanitize-carp start-sanitize-vr4xxx */
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@ -3347,31 +3422,34 @@ _initialize_mips_tdep ()
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/* Let the user turn off floating point and set the fence post for
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heuristic_proc_start. */
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c = add_set_cmd ("mipsfpu", class_support, var_string_noescape,
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(char *) &mips_fpu_string,
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"Set use of floating point coprocessor.\n\
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Set to `none' to avoid using floating point instructions when calling\n\
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functions or dealing with return values. Set to `single' to use only\n\
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single precision floating point as on the R4650. Set to `double' for\n\
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normal floating point support.",
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&setlist);
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c->function.sfunc = mips_set_fpu_command;
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c = add_show_from_set (c, &showlist);
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c->function.sfunc = mips_show_fpu_command;
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#ifndef MIPS_DEFAULT_FPU_TYPE
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mips_fpu = MIPS_FPU_DOUBLE;
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mips_fpu_string = strsave ("double");
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#else
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mips_fpu = MIPS_DEFAULT_FPU_TYPE;
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switch (mips_fpu)
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{
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case MIPS_FPU_DOUBLE: mips_fpu_string = strsave ("double"); break;
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case MIPS_FPU_SINGLE: mips_fpu_string = strsave ("single"); break;
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case MIPS_FPU_NONE: mips_fpu_string = strsave ("none"); break;
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}
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#endif
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add_prefix_cmd ("mipsfpu", class_support, set_mipsfpu_command,
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"Set use of MIPS floating-point coprocessor.",
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&mipsfpulist, "set mipsfpu ", 0, &setlist);
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add_cmd ("single", class_support, set_mipsfpu_single_command,
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"Select single-precision MIPS floating-point coprocessor.",
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&mipsfpulist);
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add_cmd ("double", class_support, set_mipsfpu_double_command,
|
||||
"Select double-precision MIPS floating-point coprocessor .",
|
||||
&mipsfpulist);
|
||||
add_alias_cmd ("on", "double", class_support, 1, &mipsfpulist);
|
||||
add_alias_cmd ("yes", "double", class_support, 1, &mipsfpulist);
|
||||
add_alias_cmd ("1", "double", class_support, 1, &mipsfpulist);
|
||||
add_cmd ("none", class_support, set_mipsfpu_none_command,
|
||||
"Select no MIPS floating-point coprocessor.",
|
||||
&mipsfpulist);
|
||||
add_alias_cmd ("off", "none", class_support, 1, &mipsfpulist);
|
||||
add_alias_cmd ("no", "none", class_support, 1, &mipsfpulist);
|
||||
add_alias_cmd ("0", "none", class_support, 1, &mipsfpulist);
|
||||
add_cmd ("auto", class_support, set_mipsfpu_auto_command,
|
||||
"Select MIPS floating-point coprocessor automatically.",
|
||||
&mipsfpulist);
|
||||
add_cmd ("mipsfpu", class_support, show_mipsfpu_command,
|
||||
"Show current use of MIPS floating-point coprocessor target.",
|
||||
&showlist);
|
||||
|
||||
/* start-sanitize-carp start-sanitize-vr4xxx */
|
||||
#if !GDB_MULTI_ARCH
|
||||
/* end-sanitize-carp end-sanitize-vr4xxx */
|
||||
c = add_set_cmd ("processor", class_support, var_string_noescape,
|
||||
(char *) &tmp_mips_processor_type,
|
||||
"Set the type of MIPS processor in use.\n\
|
||||
|
|
@ -3384,6 +3462,9 @@ Set this to be able to access processor-type-specific registers.\n\
|
|||
|
||||
tmp_mips_processor_type = strsave (DEFAULT_MIPS_TYPE);
|
||||
mips_set_processor_type_command (strsave (DEFAULT_MIPS_TYPE), 0);
|
||||
/* start-sanitize-carp start-sanitize-vr4xxx */
|
||||
#endif
|
||||
/* end-sanitize-carp end-sanitize-vr4xxx */
|
||||
|
||||
/* We really would like to have both "0" and "unlimited" work, but
|
||||
command.c doesn't deal with that. So make it a var_zinteger
|
||||
|
|
|
|||
Loading…
Reference in New Issue