PR target/14758
bfd/ * elf32-ppc.c (ppc_elf_reloc_type_lookup): Decode ppc64 _DS bfd_reloc values. Map to corresponding D-form relocs. (is_insn_ds_form, is_insn_qs_form): New functions. (ppc_elf_relocate_section): Validate insn with DS-form or DQ-form fields using D-form reloc. gas/ * config/tc-ppc.c (ppc_setup_opcodes): Fix comment. (md_assemble): Translate to _DS relocs for ppc32 as well as ppc64. (tc_gen_reloc): Handle _DS relocs in ppc32 mode.
This commit is contained in:
Alan Modra
parent
e3b0b0abf9
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1fe532cf60
@ -1,3 +1,12 @@
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2012-10-26 Alan Modra <amodra@gmail.com>
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PR target/14758
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* elf32-ppc.c (ppc_elf_reloc_type_lookup): Decode ppc64 _DS
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bfd_reloc values. Map to corresponding D-form relocs.
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(is_insn_ds_form, is_insn_qs_form): New functions.
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(ppc_elf_relocate_section): Validate insn with DS-form or DQ-form
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fields using D-form reloc.
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2012-10-25 H.J. Lu <hongjiu.lu@intel.com>
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* elf32-i386.c (elf_i386_size_dynamic_sections): Replace
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@ -1815,7 +1815,9 @@ ppc_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
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case BFD_RELOC_NONE: r = R_PPC_NONE; break;
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case BFD_RELOC_32: r = R_PPC_ADDR32; break;
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case BFD_RELOC_PPC_BA26: r = R_PPC_ADDR24; break;
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case BFD_RELOC_PPC64_ADDR16_DS:
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case BFD_RELOC_16: r = R_PPC_ADDR16; break;
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case BFD_RELOC_PPC64_ADDR16_LO_DS:
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case BFD_RELOC_LO16: r = R_PPC_ADDR16_LO; break;
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case BFD_RELOC_HI16: r = R_PPC_ADDR16_HI; break;
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case BFD_RELOC_HI16_S: r = R_PPC_ADDR16_HA; break;
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@ -1826,7 +1828,9 @@ ppc_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
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case BFD_RELOC_PPC_B16: r = R_PPC_REL14; break;
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case BFD_RELOC_PPC_B16_BRTAKEN: r = R_PPC_REL14_BRTAKEN; break;
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case BFD_RELOC_PPC_B16_BRNTAKEN: r = R_PPC_REL14_BRNTAKEN; break;
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case BFD_RELOC_PPC64_GOT16_DS:
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case BFD_RELOC_16_GOTOFF: r = R_PPC_GOT16; break;
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case BFD_RELOC_PPC64_GOT16_LO_DS:
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case BFD_RELOC_LO16_GOTOFF: r = R_PPC_GOT16_LO; break;
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case BFD_RELOC_HI16_GOTOFF: r = R_PPC_GOT16_HI; break;
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case BFD_RELOC_HI16_S_GOTOFF: r = R_PPC_GOT16_HA; break;
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@ -1837,26 +1841,34 @@ ppc_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
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case BFD_RELOC_32_PCREL: r = R_PPC_REL32; break;
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case BFD_RELOC_32_PLTOFF: r = R_PPC_PLT32; break;
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case BFD_RELOC_32_PLT_PCREL: r = R_PPC_PLTREL32; break;
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case BFD_RELOC_PPC64_PLT16_LO_DS:
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case BFD_RELOC_LO16_PLTOFF: r = R_PPC_PLT16_LO; break;
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case BFD_RELOC_HI16_PLTOFF: r = R_PPC_PLT16_HI; break;
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case BFD_RELOC_HI16_S_PLTOFF: r = R_PPC_PLT16_HA; break;
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case BFD_RELOC_GPREL16: r = R_PPC_SDAREL16; break;
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case BFD_RELOC_PPC64_SECTOFF_DS:
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case BFD_RELOC_16_BASEREL: r = R_PPC_SECTOFF; break;
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case BFD_RELOC_PPC64_SECTOFF_LO_DS:
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case BFD_RELOC_LO16_BASEREL: r = R_PPC_SECTOFF_LO; break;
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case BFD_RELOC_HI16_BASEREL: r = R_PPC_SECTOFF_HI; break;
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case BFD_RELOC_HI16_S_BASEREL: r = R_PPC_SECTOFF_HA; break;
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case BFD_RELOC_CTOR: r = R_PPC_ADDR32; break;
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case BFD_RELOC_PPC64_TOC16_DS:
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case BFD_RELOC_PPC_TOC16: r = R_PPC_TOC16; break;
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case BFD_RELOC_PPC_TLS: r = R_PPC_TLS; break;
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case BFD_RELOC_PPC_TLSGD: r = R_PPC_TLSGD; break;
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case BFD_RELOC_PPC_TLSLD: r = R_PPC_TLSLD; break;
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case BFD_RELOC_PPC_DTPMOD: r = R_PPC_DTPMOD32; break;
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case BFD_RELOC_PPC64_TPREL16_DS:
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case BFD_RELOC_PPC_TPREL16: r = R_PPC_TPREL16; break;
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case BFD_RELOC_PPC64_TPREL16_LO_DS:
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case BFD_RELOC_PPC_TPREL16_LO: r = R_PPC_TPREL16_LO; break;
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case BFD_RELOC_PPC_TPREL16_HI: r = R_PPC_TPREL16_HI; break;
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case BFD_RELOC_PPC_TPREL16_HA: r = R_PPC_TPREL16_HA; break;
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case BFD_RELOC_PPC_TPREL: r = R_PPC_TPREL32; break;
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case BFD_RELOC_PPC64_DTPREL16_DS:
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case BFD_RELOC_PPC_DTPREL16: r = R_PPC_DTPREL16; break;
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case BFD_RELOC_PPC64_DTPREL16_LO_DS:
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case BFD_RELOC_PPC_DTPREL16_LO: r = R_PPC_DTPREL16_LO; break;
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case BFD_RELOC_PPC_DTPREL16_HI: r = R_PPC_DTPREL16_HI; break;
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case BFD_RELOC_PPC_DTPREL16_HA: r = R_PPC_DTPREL16_HA; break;
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@ -7243,6 +7255,21 @@ _bfd_elf_ppc_at_tprel_transform (unsigned int insn, unsigned int reg)
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return insn;
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}
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static bfd_boolean
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is_insn_ds_form (unsigned int insn)
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{
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return ((insn & (0x3f << 26)) == 58u << 26 /* ld,ldu,lwa */
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|| (insn & (0x3f << 26)) == 62u << 26 /* std,stdu,stq */
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|| (insn & (0x3f << 26)) == 57u << 26 /* lfdp */
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|| (insn & (0x3f << 26)) == 61u << 26 /* stfdp */);
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}
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static bfd_boolean
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is_insn_dq_form (unsigned int insn)
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{
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return (insn & (0x3f << 26)) == 56u << 26; /* lq */
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}
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/* The RELOCATE_SECTION function is called by the ELF backend linker
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to handle the relocations for a section.
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@ -8788,6 +8815,54 @@ ppc_elf_relocate_section (bfd *output_bfd,
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Bits 0:15 are not used. */
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addend += 0x8000;
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break;
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case R_PPC_ADDR16:
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case R_PPC_ADDR16_LO:
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case R_PPC_GOT16:
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case R_PPC_GOT16_LO:
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case R_PPC_SDAREL16:
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case R_PPC_SECTOFF:
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case R_PPC_SECTOFF_LO:
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case R_PPC_DTPREL16:
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case R_PPC_DTPREL16_LO:
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case R_PPC_TPREL16:
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case R_PPC_TPREL16_LO:
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case R_PPC_GOT_TLSGD16:
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case R_PPC_GOT_TLSGD16_LO:
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case R_PPC_GOT_TLSLD16:
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case R_PPC_GOT_TLSLD16_LO:
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case R_PPC_GOT_DTPREL16:
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case R_PPC_GOT_DTPREL16_LO:
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case R_PPC_GOT_TPREL16:
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case R_PPC_GOT_TPREL16_LO:
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{
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/* The 32-bit ABI lacks proper relocations to deal with
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certain 64-bit instructions. Prevent damage to bits
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that make up part of the insn opcode. */
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unsigned int insn, mask, lobit;
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insn = bfd_get_32 (output_bfd, contents + rel->r_offset - d_offset);
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mask = 0;
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if (is_insn_ds_form (insn))
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mask = 3;
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else if (is_insn_dq_form (insn))
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mask = 15;
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else
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break;
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lobit = mask & (relocation + addend);
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if (lobit != 0)
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{
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addend -= lobit;
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info->callbacks->einfo
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(_("%P: %H: error: %s against `%s' not a multiple of %u\n"),
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input_bfd, input_section, rel->r_offset,
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howto->name, sym_name, mask + 1);
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bfd_set_error (bfd_error_bad_value);
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ret = FALSE;
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}
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addend += insn & mask;
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}
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break;
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}
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#ifdef DEBUG
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@ -1,3 +1,10 @@
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2012-10-26 Alan Modra <amodra@gmail.com>
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PR target/14758
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* config/tc-ppc.c (ppc_setup_opcodes): Fix comment.
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(md_assemble): Translate to _DS relocs for ppc32 as well as ppc64.
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(tc_gen_reloc): Handle _DS relocs in ppc32 mode.
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2012-10-22 Simon Baldwin <simonb@google.com>
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* as.c (dump_statistics): Compute data size as the delta between
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@ -1513,7 +1513,7 @@ insn_validate (const struct powerpc_opcode *op)
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}
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/* Insert opcodes and macros into hash tables. Called at startup and
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for .cpu pseudo. */
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for .machine pseudo. */
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static void
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ppc_setup_opcodes (void)
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@ -3062,8 +3062,7 @@ md_assemble (char *str)
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break;
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}
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if (ppc_obj64
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&& (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
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if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
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{
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switch (reloc)
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{
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