sim: moxie: fix running after nrun conversion
The nrun conversion was slightly incorrect in how it stopped when an exception occurred. We still set cpu.asregs.exception, but nothing was checking it anymore. Convert all of that to sim_engine_halt. To keep things from regressing again, add a basic testsuite too.
This commit is contained in:
Mike Frysinger
parent
024305f7f2
commit
20cc975360
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@ -1,3 +1,13 @@
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2015-04-05 Mike Frysinger <vapier@gentoo.org>
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* Makefile.in (SIM_OBJS): Add sim-resume.o.
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* interp.c (moxie_regset): Delete exception.
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(sim_resume): Rename to ...
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(sim_engine_run): ... this. Delete insts variable and references
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to cpu.asregs.exception, and change most to sim_engine_halt. Move
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trailing insts and PC_REGNO updates into the loop.
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(load_dtb): Delete open warning. Change printf to sim_io_eprintf.
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2015-04-01 Mike Frysinger <vapier@gentoo.org>
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* sim-main.h (SIM_HAVE_BIENDIAN): Delete.
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@ -27,6 +27,7 @@ SIM_OBJS = \
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sim-hload.o \
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sim-hrw.o \
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sim-reason.o \
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sim-resume.o \
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sim-stop.o
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SIM_EXTRA_LIBS = -lm -lz
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@ -114,7 +114,6 @@ struct moxie_regset
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word regs[NUM_MOXIE_REGS + 1]; /* primary registers */
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word sregs[256]; /* special registers */
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word cc; /* the condition code reg */
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int exception;
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unsigned long long insts; /* instruction counter */
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};
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@ -236,17 +235,17 @@ static const int tracing = 0;
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#define TRACE(str) if (tracing) fprintf(tracefile,"0x%08x, %s, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", opc, str, cpu.asregs.regs[0], cpu.asregs.regs[1], cpu.asregs.regs[2], cpu.asregs.regs[3], cpu.asregs.regs[4], cpu.asregs.regs[5], cpu.asregs.regs[6], cpu.asregs.regs[7], cpu.asregs.regs[8], cpu.asregs.regs[9], cpu.asregs.regs[10], cpu.asregs.regs[11], cpu.asregs.regs[12], cpu.asregs.regs[13], cpu.asregs.regs[14], cpu.asregs.regs[15]);
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void
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sim_resume (SIM_DESC sd, int step, int siggnal)
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sim_engine_run (SIM_DESC sd,
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int next_cpu_nr, /* ignore */
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int nr_cpus, /* ignore */
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int siggnal) /* ignore */
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{
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word pc, opc;
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unsigned long long insts;
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unsigned short inst;
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sim_cpu *scpu = STATE_CPU (sd, 0); /* FIXME */
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address_word cia = CIA_GET (scpu);
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cpu.asregs.exception = step ? SIGTRAP: 0;
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pc = cpu.asregs.regs[PC_REGNO];
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insts = cpu.asregs.insts;
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/* Run instructions here. */
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do
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@ -339,7 +338,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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default:
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{
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TRACE("SIGILL3");
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cpu.asregs.exception = SIGILL;
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sim_engine_halt (sd, NULL, NULL, pc, sim_stopped, SIM_SIGILL);
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break;
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}
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}
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@ -390,7 +389,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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break;
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default:
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TRACE("SIGILL2");
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cpu.asregs.exception = SIGILL;
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sim_engine_halt (sd, NULL, NULL, pc, sim_stopped, SIM_SIGILL);
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break;
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}
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}
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@ -404,7 +403,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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case 0x00: /* bad */
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opc = opcode;
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TRACE("SIGILL0");
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cpu.asregs.exception = SIGILL;
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sim_engine_halt (sd, NULL, NULL, pc, sim_stopped, SIM_SIGILL);
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break;
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case 0x01: /* ldi.l (immediate) */
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{
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@ -662,7 +661,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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{
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opc = opcode;
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TRACE("SIGILL0");
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cpu.asregs.exception = SIGILL;
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sim_engine_halt (sd, NULL, NULL, pc, sim_stopped, SIM_SIGILL);
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break;
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}
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case 0x19: /* jsr */
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@ -929,7 +928,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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{
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case 0x1: /* SYS_exit */
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{
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cpu.asregs.exception = SIGQUIT;
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sim_engine_halt (sd, NULL, NULL, pc, sim_exited,
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cpu.asregs.regs[2]);
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break;
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}
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case 0x2: /* SYS_open */
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@ -1041,7 +1041,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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break;
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case 0x35: /* brk */
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TRACE("brk");
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cpu.asregs.exception = SIGTRAP;
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sim_engine_halt (sd, NULL, NULL, pc, sim_stopped, SIM_SIGTRAP);
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pc -= 2; /* Adjust pc */
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break;
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case 0x36: /* ldo.b */
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@ -1095,19 +1095,15 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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default:
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opc = opcode;
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TRACE("SIGILL1");
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cpu.asregs.exception = SIGILL;
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sim_engine_halt (sd, NULL, NULL, pc, sim_stopped, SIM_SIGILL);
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break;
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}
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}
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insts++;
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cpu.asregs.insts++;
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pc += 2;
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} while (!cpu.asregs.exception);
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/* Hide away the things we've cached while executing. */
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cpu.asregs.regs[PC_REGNO] = pc;
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cpu.asregs.insts += insts; /* instructions done ... */
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cpu.asregs.regs[PC_REGNO] = pc;
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} while (1);
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}
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int
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@ -1240,18 +1236,17 @@ load_dtb (SIM_DESC sd, const char *filename)
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FILE *f = fopen (filename, "rb");
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char *buf;
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sim_cpu *scpu = STATE_CPU (sd, 0); /* FIXME */
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if (f == NULL)
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{
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printf ("WARNING: ``%s'' could not be opened.\n", filename);
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return;
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}
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/* Don't warn as the sim works fine w/out a device tree. */
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if (f == NULL)
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return;
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fseek (f, 0, SEEK_END);
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size = ftell(f);
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fseek (f, 0, SEEK_SET);
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buf = alloca (size);
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if (size != fread (buf, 1, size, f))
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{
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printf ("ERROR: error reading ``%s''.\n", filename);
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sim_io_eprintf (sd, "ERROR: error reading ``%s''.\n", filename);
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return;
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}
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sim_core_write_buffer (sd, scpu, write_map, buf, 0xE0000000, size);
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@ -0,0 +1,3 @@
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2015-04-05 Mike Frysinger <vapier@gentoo.org>
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* pass.s, allinsn.exp, testutils.inc: New files.
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@ -0,0 +1,15 @@
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# moxie simulator testsuite
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if [istarget moxie-*] {
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# all machines
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set all_machs "moxie"
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foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.s]] {
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# If we're only testing specific files and this isn't one of them,
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# skip it.
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if ![runtest_file_p $runtests $src] {
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continue
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}
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run_sim_test $src $all_machs
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}
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}
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@ -0,0 +1,7 @@
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# check that the sim doesn't die immediately.
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# mach: moxie
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.include "testutils.inc"
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start
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pass
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@ -0,0 +1,46 @@
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# MACRO: exit
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.macro exit nr
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ldi.l $r0, \nr;
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# Trap function 1: exit().
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swi 1;
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.endm
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# MACRO: pass
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# Write 'pass' to stdout and quit
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.macro pass
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# Use stdout.
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ldi.b $r0, 1;
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# Point to the string.
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ldi.l $r1, 1f;
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# Number of bytes to write.
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ldi.s $r2, 5;
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# Trap function 5: write().
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swi 5;
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exit 0
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.data
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1: .asciz "pass\n"
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.endm
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# MACRO: fail
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# Write 'fail' to stdout and quit
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.macro fail
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# Use stdout.
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ldi.b $r0, 1;
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# Point to the string.
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ldi.l $r1, 1f;
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# Number of bytes to write.
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ldi.s $r2, 5;
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# Trap function 5: write().
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swi 5;
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exit 0
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.data
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1: .asciz "fail\n"
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.endm
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# MACRO: start
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# All assembler tests should start with a call to "start"
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.macro start
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.text
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.global _start
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_start:
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.endm
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