merge from d30v-970225-branch

This commit is contained in:
Ken Raeburn 1997-09-15 16:43:43 +00:00
parent 00c6b5b387
commit 2199f848c0
4 changed files with 75 additions and 6 deletions

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@ -1,3 +1,24 @@
start-sanitize-d30v
Mon Sep 15 11:27:36 1997 Ken Raeburn <raeburn@cygnus.com>
Merged changes from Martin Hunt:
* elf32-d30v.c (bfd_elf_d30v_reloc): Change pc-relative relocs
over 2^32 bytes to be absolute. Needed because D30V PC doesn't
necessarily wrap.
* reloc.c, elf32-d30v.c (BFD_RELOC_D30V_9_PCREL,
BFD_RELOC_D30V_9_PCREL_R): New relocs.
* elf32-d30v.c (bfd_elf_d30v_reloc_21): New function.
Do 15 and 21 bit pc-relative relocations.
* reloc.c (BFD_RELOC_D30V_15_PCREL_R, BFD_RELOC_D30V_21_PCREL_R):
New relocations.
* elf32-d30v.c (bfd_elf_d30v_reloc): Addend needs to be
added to the relocation, not or'd.
end-sanitize-d30v
Wed Sep 10 15:17:25 1997 Nick Clifton <nickc@cygnus.com>
* elf32-v850.c (v850_elf_reloc): Remove spurious error message.

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@ -1885,16 +1885,30 @@ assumed to be 0. */
This is a 6-bit absolute reloc. */
BFD_RELOC_D30V_6,
/* Mitsubishi D30V relocs.
This is a 12-bit absolute reloc with the
/* This is a 6-bit pc-relative reloc with
the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_9_PCREL,
/* This is a 6-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
of the container. */
BFD_RELOC_D30V_9_PCREL_R,
/* This is a 12-bit absolute reloc with the
right 3 bitsassumed to be 0. */
BFD_RELOC_D30V_15,
/* Mitsubishi D30V relocs.
This is a 12-bit pc-relative reloc with
/* This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_15_PCREL,
/* This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
of the container. */
BFD_RELOC_D30V_15_PCREL_R,
/* This is an 18-bit absolute reloc with
the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_21,
@ -1903,6 +1917,12 @@ the right 3 bits assumed to be 0. */
the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_21_PCREL,
/* This is an 18-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
of the container. */
BFD_RELOC_D30V_21_PCREL_R,
/* This is a 32-bit absolute reloc. */
BFD_RELOC_D30V_32,

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@ -752,10 +752,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
/* start-sanitize-d30v */
"BFD_RELOC_D30V_6",
"BFD_RELOC_D30V_9_PCREL",
"BFD_RELOC_D30V_9_PCREL_R",
"BFD_RELOC_D30V_15",
"BFD_RELOC_D30V_15_PCREL",
"BFD_RELOC_D30V_15_PCREL_R",
"BFD_RELOC_D30V_21",
"BFD_RELOC_D30V_21_PCREL",
"BFD_RELOC_D30V_21_PCREL_R",
"BFD_RELOC_D30V_32",
"BFD_RELOC_D30V_32_PCREL",
/* end-sanitize-d30v */

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@ -2279,18 +2279,35 @@ ENUM
ENUMDOC
Mitsubishi D30V relocs.
This is a 6-bit absolute reloc.
ENUM
BFD_RELOC_D30V_9_PCREL
ENUMDOC
This is a 6-bit pc-relative reloc with
the right 3 bits assumed to be 0.
ENUM
BFD_RELOC_D30V_9_PCREL_R
ENUMDOC
This is a 6-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
of the container.
ENUM
BFD_RELOC_D30V_15
ENUMDOC
Mitsubishi D30V relocs.
This is a 12-bit absolute reloc with the
right 3 bitsassumed to be 0.
ENUM
BFD_RELOC_D30V_15_PCREL
ENUMDOC
Mitsubishi D30V relocs.
This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0.
ENUM
BFD_RELOC_D30V_15_PCREL_R
ENUMDOC
This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
of the container.
ENUM
BFD_RELOC_D30V_21
ENUMDOC
@ -2301,6 +2318,13 @@ ENUM
ENUMDOC
This is an 18-bit pc-relative reloc with
the right 3 bits assumed to be 0.
ENUM
BFD_RELOC_D30V_21_PCREL_R
ENUMDOC
This is an 18-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
of the container.
ENUM
BFD_RELOC_D30V_32
ENUMDOC