Don't generate multi-byte NOPs for i686.
gas/ 2010-08-06 Quentin Neill <quentin.neill@amd.com> * config/tc-i386.c (arch_entry): Add negated bit to disambiguate flag names starting with "no". (cpu_arch): Add negated bit definitions. Add ".nop" CPU extension. (i386_align_code): Use new .cpunop bit to decide when to generate alignment using nops. (set_cpu_arch): Use negated bit instead to decide when to use cpu_flags or vs. cpu_flags_and_not. (md_parse_option): Likewise. gas/testsuite/ 2010-08-06 Quentin Neill <quentin.neill@amd.com> * gas/i386/arch-10-1.l: Add nopl instruction. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10.s: Likewise. * gas/i386/arch-10.d: Add nopl instruction, and +nopl extension flag to as flags. * gas/i386/nops-5-i686.d: Change alignment code generated for -mtune=i686. * gas/i386/nops-5.d: Change alignment code generated for .arch i686. * gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. opcodes/ 2010-08-06 Quentin Neill <quentin.neill@amd.com> * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add to processor flags for PENTIUMPRO processors and later. * i386-opc.h (enum): Add CpuNop. (i386_cpu_flags): Add cpunop bit. * i386-opc.tbl: Change nop cpu_flags. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
This commit is contained in:
H.J. Lu
parent
b49dfb4a38
commit
2210942396
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@ -1,3 +1,15 @@
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2010-08-06 Quentin Neill <quentin.neill@amd.com>
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* config/tc-i386.c (arch_entry): Add negated bit to
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disambiguate flag names starting with "no".
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(cpu_arch): Add negated bit definitions. Add
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".nop" CPU extension.
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(i386_align_code): Use new .cpunop bit to decide
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when to generate alignment using nops.
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(set_cpu_arch): Use negated bit instead to decide
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when to use cpu_flags or vs. cpu_flags_and_not.
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(md_parse_option): Likewise.
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2010-08-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (match_template): Move the first i.error
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@ -132,6 +132,7 @@ typedef struct
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enum processor_type type; /* arch type */
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i386_cpu_flags flags; /* cpu feature flags */
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unsigned int skip; /* show_arch should skip this. */
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unsigned int negated; /* turn off indicated flags. */
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}
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arch_entry;
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@ -566,149 +567,151 @@ static const arch_entry cpu_arch[] =
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/* Do not replace the first two entries - i386_target_format()
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relies on them being there in this order. */
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{ STRING_COMMA_LEN ("generic32"), PROCESSOR_GENERIC32,
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CPU_GENERIC32_FLAGS, 0 },
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CPU_GENERIC32_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("generic64"), PROCESSOR_GENERIC64,
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CPU_GENERIC64_FLAGS, 0 },
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CPU_GENERIC64_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("i8086"), PROCESSOR_UNKNOWN,
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CPU_NONE_FLAGS, 0 },
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CPU_NONE_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("i186"), PROCESSOR_UNKNOWN,
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CPU_I186_FLAGS, 0 },
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CPU_I186_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("i286"), PROCESSOR_UNKNOWN,
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CPU_I286_FLAGS, 0 },
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CPU_I286_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("i386"), PROCESSOR_I386,
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CPU_I386_FLAGS, 0 },
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CPU_I386_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("i486"), PROCESSOR_I486,
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CPU_I486_FLAGS, 0 },
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CPU_I486_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("i586"), PROCESSOR_PENTIUM,
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CPU_I586_FLAGS, 0 },
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CPU_I586_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("i686"), PROCESSOR_PENTIUMPRO,
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CPU_I686_FLAGS, 0 },
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CPU_I686_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("pentium"), PROCESSOR_PENTIUM,
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CPU_I586_FLAGS, 0 },
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CPU_I586_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("pentiumpro"), PROCESSOR_PENTIUMPRO,
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CPU_I686_FLAGS, 0 },
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CPU_PENTIUMPRO_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("pentiumii"), PROCESSOR_PENTIUMPRO,
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CPU_P2_FLAGS, 0 },
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CPU_P2_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("pentiumiii"),PROCESSOR_PENTIUMPRO,
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CPU_P3_FLAGS, 0 },
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CPU_P3_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("pentium4"), PROCESSOR_PENTIUM4,
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CPU_P4_FLAGS, 0 },
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CPU_P4_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("prescott"), PROCESSOR_NOCONA,
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CPU_CORE_FLAGS, 0 },
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CPU_CORE_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("nocona"), PROCESSOR_NOCONA,
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CPU_NOCONA_FLAGS, 0 },
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CPU_NOCONA_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("yonah"), PROCESSOR_CORE,
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CPU_CORE_FLAGS, 1 },
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CPU_CORE_FLAGS, 1, 0 },
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{ STRING_COMMA_LEN ("core"), PROCESSOR_CORE,
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CPU_CORE_FLAGS, 0 },
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CPU_CORE_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("merom"), PROCESSOR_CORE2,
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CPU_CORE2_FLAGS, 1 },
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CPU_CORE2_FLAGS, 1, 0 },
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{ STRING_COMMA_LEN ("core2"), PROCESSOR_CORE2,
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CPU_CORE2_FLAGS, 0 },
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CPU_CORE2_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("corei7"), PROCESSOR_COREI7,
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CPU_COREI7_FLAGS, 0 },
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CPU_COREI7_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("l1om"), PROCESSOR_L1OM,
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CPU_L1OM_FLAGS, 0 },
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CPU_L1OM_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("k6"), PROCESSOR_K6,
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CPU_K6_FLAGS, 0 },
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CPU_K6_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("k6_2"), PROCESSOR_K6,
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CPU_K6_2_FLAGS, 0 },
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CPU_K6_2_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("athlon"), PROCESSOR_ATHLON,
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CPU_ATHLON_FLAGS, 0 },
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CPU_ATHLON_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("sledgehammer"), PROCESSOR_K8,
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CPU_K8_FLAGS, 1 },
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CPU_K8_FLAGS, 1, 0 },
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{ STRING_COMMA_LEN ("opteron"), PROCESSOR_K8,
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CPU_K8_FLAGS, 0 },
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CPU_K8_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("k8"), PROCESSOR_K8,
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CPU_K8_FLAGS, 0 },
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CPU_K8_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("amdfam10"), PROCESSOR_AMDFAM10,
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CPU_AMDFAM10_FLAGS, 0 },
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CPU_AMDFAM10_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN ("bdver1"), PROCESSOR_BDVER1,
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CPU_BDVER1_FLAGS, 0 },
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CPU_BDVER1_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".8087"), PROCESSOR_UNKNOWN,
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CPU_8087_FLAGS, 0 },
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CPU_8087_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".287"), PROCESSOR_UNKNOWN,
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CPU_287_FLAGS, 0 },
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CPU_287_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".387"), PROCESSOR_UNKNOWN,
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CPU_387_FLAGS, 0 },
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CPU_387_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".no87"), PROCESSOR_UNKNOWN,
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CPU_ANY87_FLAGS, 0 },
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CPU_ANY87_FLAGS, 0, 1 },
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{ STRING_COMMA_LEN (".mmx"), PROCESSOR_UNKNOWN,
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CPU_MMX_FLAGS, 0 },
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CPU_MMX_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".nommx"), PROCESSOR_UNKNOWN,
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CPU_3DNOWA_FLAGS, 0 },
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CPU_3DNOWA_FLAGS, 0, 1 },
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{ STRING_COMMA_LEN (".sse"), PROCESSOR_UNKNOWN,
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CPU_SSE_FLAGS, 0 },
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CPU_SSE_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".sse2"), PROCESSOR_UNKNOWN,
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CPU_SSE2_FLAGS, 0 },
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CPU_SSE2_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".sse3"), PROCESSOR_UNKNOWN,
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CPU_SSE3_FLAGS, 0 },
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CPU_SSE3_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".ssse3"), PROCESSOR_UNKNOWN,
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CPU_SSSE3_FLAGS, 0 },
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CPU_SSSE3_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".sse4.1"), PROCESSOR_UNKNOWN,
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CPU_SSE4_1_FLAGS, 0 },
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CPU_SSE4_1_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".sse4.2"), PROCESSOR_UNKNOWN,
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CPU_SSE4_2_FLAGS, 0 },
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CPU_SSE4_2_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".sse4"), PROCESSOR_UNKNOWN,
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CPU_SSE4_2_FLAGS, 0 },
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CPU_SSE4_2_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".nosse"), PROCESSOR_UNKNOWN,
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CPU_ANY_SSE_FLAGS, 0 },
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CPU_ANY_SSE_FLAGS, 0, 1 },
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{ STRING_COMMA_LEN (".avx"), PROCESSOR_UNKNOWN,
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CPU_AVX_FLAGS, 0 },
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CPU_AVX_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".noavx"), PROCESSOR_UNKNOWN,
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CPU_ANY_AVX_FLAGS, 0 },
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CPU_ANY_AVX_FLAGS, 0, 1 },
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{ STRING_COMMA_LEN (".vmx"), PROCESSOR_UNKNOWN,
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CPU_VMX_FLAGS, 0 },
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CPU_VMX_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".smx"), PROCESSOR_UNKNOWN,
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CPU_SMX_FLAGS, 0 },
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CPU_SMX_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".xsave"), PROCESSOR_UNKNOWN,
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CPU_XSAVE_FLAGS, 0 },
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CPU_XSAVE_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".xsaveopt"), PROCESSOR_UNKNOWN,
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CPU_XSAVEOPT_FLAGS, 0 },
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CPU_XSAVEOPT_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".aes"), PROCESSOR_UNKNOWN,
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CPU_AES_FLAGS, 0 },
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CPU_AES_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".pclmul"), PROCESSOR_UNKNOWN,
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CPU_PCLMUL_FLAGS, 0 },
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CPU_PCLMUL_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".clmul"), PROCESSOR_UNKNOWN,
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CPU_PCLMUL_FLAGS, 1 },
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CPU_PCLMUL_FLAGS, 1, 0 },
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{ STRING_COMMA_LEN (".fsgsbase"), PROCESSOR_UNKNOWN,
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CPU_FSGSBASE_FLAGS, 0 },
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CPU_FSGSBASE_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".rdrnd"), PROCESSOR_UNKNOWN,
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CPU_RDRND_FLAGS, 0 },
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CPU_RDRND_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".f16c"), PROCESSOR_UNKNOWN,
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CPU_F16C_FLAGS, 0 },
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CPU_F16C_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".fma"), PROCESSOR_UNKNOWN,
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CPU_FMA_FLAGS, 0 },
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CPU_FMA_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".fma4"), PROCESSOR_UNKNOWN,
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CPU_FMA4_FLAGS, 0 },
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CPU_FMA4_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".xop"), PROCESSOR_UNKNOWN,
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CPU_XOP_FLAGS, 0 },
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CPU_XOP_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".lwp"), PROCESSOR_UNKNOWN,
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CPU_LWP_FLAGS, 0 },
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CPU_LWP_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".movbe"), PROCESSOR_UNKNOWN,
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CPU_MOVBE_FLAGS, 0 },
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CPU_MOVBE_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".ept"), PROCESSOR_UNKNOWN,
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CPU_EPT_FLAGS, 0 },
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CPU_EPT_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".clflush"), PROCESSOR_UNKNOWN,
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CPU_CLFLUSH_FLAGS, 0 },
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CPU_CLFLUSH_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".nop"), PROCESSOR_UNKNOWN,
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CPU_NOP_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".syscall"), PROCESSOR_UNKNOWN,
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CPU_SYSCALL_FLAGS, 0 },
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CPU_SYSCALL_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".rdtscp"), PROCESSOR_UNKNOWN,
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CPU_RDTSCP_FLAGS, 0 },
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CPU_RDTSCP_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".3dnow"), PROCESSOR_UNKNOWN,
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CPU_3DNOW_FLAGS, 0 },
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CPU_3DNOW_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".3dnowa"), PROCESSOR_UNKNOWN,
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CPU_3DNOWA_FLAGS, 0 },
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CPU_3DNOWA_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".padlock"), PROCESSOR_UNKNOWN,
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CPU_PADLOCK_FLAGS, 0 },
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CPU_PADLOCK_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".pacifica"), PROCESSOR_UNKNOWN,
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CPU_SVME_FLAGS, 1 },
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CPU_SVME_FLAGS, 1, 0 },
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{ STRING_COMMA_LEN (".svme"), PROCESSOR_UNKNOWN,
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CPU_SVME_FLAGS, 0 },
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CPU_SVME_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".sse4a"), PROCESSOR_UNKNOWN,
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CPU_SSE4A_FLAGS, 0 },
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CPU_SSE4A_FLAGS, 0, 0 },
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{ STRING_COMMA_LEN (".abm"), PROCESSOR_UNKNOWN,
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CPU_ABM_FLAGS, 0 },
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CPU_ABM_FLAGS, 0, 0 },
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};
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#ifdef I386COFF
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@ -998,7 +1001,7 @@ i386_align_code (fragS *fragP, int count)
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will be used.
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When -mtune= isn't used, alt_long_patt will be used if
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cpu_arch_isa_flags has Cpu686. Otherwise, f32_patt will
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cpu_arch_isa_flags has CpuNop. Otherwise, f32_patt will
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be used.
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When -march= or .arch is used, we can't use anything beyond
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@ -1028,8 +1031,8 @@ i386_align_code (fragS *fragP, int count)
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{
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case PROCESSOR_UNKNOWN:
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/* We use cpu_arch_isa_flags to check if we SHOULD
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optimize for Cpu686. */
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if (fragP->tc_frag_data.isa_flags.bitfield.cpui686)
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optimize with nops. */
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if (fragP->tc_frag_data.isa_flags.bitfield.cpunop)
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patt = alt_long_patt;
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else
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patt = f32_patt;
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@ -1079,8 +1082,8 @@ i386_align_code (fragS *fragP, int count)
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case PROCESSOR_BDVER1:
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case PROCESSOR_GENERIC32:
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/* We use cpu_arch_isa_flags to check if we CAN optimize
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for Cpu686. */
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if (fragP->tc_frag_data.isa_flags.bitfield.cpui686)
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with nops. */
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if (fragP->tc_frag_data.isa_flags.bitfield.cpunop)
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patt = alt_short_patt;
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else
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patt = f32_patt;
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@ -1092,7 +1095,7 @@ i386_align_code (fragS *fragP, int count)
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case PROCESSOR_CORE2:
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case PROCESSOR_COREI7:
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case PROCESSOR_L1OM:
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if (fragP->tc_frag_data.isa_flags.bitfield.cpui686)
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if (fragP->tc_frag_data.isa_flags.bitfield.cpunop)
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patt = alt_long_patt;
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else
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patt = f32_patt;
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@ -2131,12 +2134,12 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
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break;
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}
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if (strncmp (string + 1, "no", 2))
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if (!cpu_arch[j].negated)
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flags = cpu_flags_or (cpu_arch_flags,
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cpu_arch[j].flags);
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else
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flags = cpu_flags_and_not (cpu_arch_flags,
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cpu_arch[j].flags);
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cpu_arch[j].flags);
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if (!cpu_flags_equal (&flags, &cpu_arch_flags))
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{
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if (cpu_sub_arch_name)
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@ -8218,12 +8221,12 @@ md_parse_option (int c, char *arg)
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/* ISA entension. */
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i386_cpu_flags flags;
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if (strncmp (arch, "no", 2))
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if (!cpu_arch[j].negated)
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flags = cpu_flags_or (cpu_arch_flags,
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cpu_arch[j].flags);
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else
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flags = cpu_flags_and_not (cpu_arch_flags,
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cpu_arch[j].flags);
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cpu_arch[j].flags);
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if (!cpu_flags_equal (&flags, &cpu_arch_flags))
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{
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if (cpu_sub_arch_name)
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|
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@ -1,3 +1,19 @@
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2010-08-06 Quentin Neill <quentin.neill@amd.com>
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* gas/i386/arch-10-1.l: Add nopl instruction.
|
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* gas/i386/arch-10-2.l: Likewise.
|
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* gas/i386/arch-10-3.l: Likewise.
|
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* gas/i386/arch-10-4.l: Likewise.
|
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* gas/i386/arch-10.s: Likewise.
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* gas/i386/arch-10.d: Add nopl instruction, and +nopl extension
|
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flag to as flags.
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* gas/i386/nops-5-i686.d: Change alignment code generated for
|
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-mtune=i686.
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* gas/i386/nops-5.d: Change alignment code generated for
|
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.arch i686.
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* gas/i386/x86-64-nops-5-k8.d: Likewise.
|
||||
* gas/i386/x86-64-nops-5.d: Likewise.
|
||||
|
||||
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.exp: Run arch-4.
|
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|
|
|
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|
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@ -28,6 +28,7 @@
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.*:56: Error: .*
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.*:58: Error: .*
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.*:60: Error: .*
|
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.*:62: Error: .*
|
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GAS LISTING .*
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|
|
@ -95,3 +96,5 @@ GAS LISTING .*
|
|||
[ ]*58[ ]+lzcnt %ecx,%ebx
|
||||
[ ]*59[ ]+\# PadLock
|
||||
[ ]*60[ ]+xstorerng
|
||||
[ ]*61[ ]+\# nop
|
||||
[ ]*62[ ]+nopl \(%eax\)
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
.*:56: Error: .*
|
||||
.*:58: Error: .*
|
||||
.*:60: Error: .*
|
||||
.*:62: Error: .*
|
||||
GAS LISTING .*
|
||||
|
||||
|
||||
|
|
@ -94,3 +95,5 @@ GAS LISTING .*
|
|||
[ ]*58[ ]+lzcnt %ecx,%ebx
|
||||
[ ]*59[ ]+\# PadLock
|
||||
[ ]*60[ ]+xstorerng
|
||||
[ ]*61[ ]+\# nop
|
||||
[ ]*62[ ]+nopl \(%eax\)
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
.*:56: Error: .*
|
||||
.*:58: Error: .*
|
||||
.*:60: Error: .*
|
||||
.*:62: Error: .*
|
||||
GAS LISTING .*
|
||||
|
||||
|
||||
|
|
@ -90,3 +91,5 @@ GAS LISTING .*
|
|||
[ ]*58[ ]+lzcnt %ecx,%ebx
|
||||
[ ]*59[ ]+\# PadLock
|
||||
[ ]*60[ ]+xstorerng
|
||||
[ ]*61[ ]+\# nop
|
||||
[ ]*62[ ]+nopl \(%eax\)
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
.*:56: Error: .*
|
||||
.*:58: Error: .*
|
||||
.*:60: Error: .*
|
||||
.*:62: Error: .*
|
||||
GAS LISTING .*
|
||||
|
||||
|
||||
|
|
@ -88,3 +89,5 @@ GAS LISTING .*
|
|||
[ ]*58[ ]+lzcnt %ecx,%ebx
|
||||
[ ]*59[ ]+\# PadLock
|
||||
[ ]*60[ ]+xstorerng
|
||||
[ ]*61[ ]+\# nop
|
||||
[ ]*62[ ]+nopl \(%eax\)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock
|
||||
#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock
|
||||
#objdump: -dw
|
||||
#name: i386 arch 10
|
||||
|
||||
|
|
@ -36,4 +36,5 @@ Disassembly of section .text:
|
|||
[ ]*[a-f0-9]+: 0f 01 da vmload
|
||||
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
|
||||
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
|
||||
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -58,3 +58,5 @@ vmload
|
|||
lzcnt %ecx,%ebx
|
||||
# PadLock
|
||||
xstorerng
|
||||
# nop
|
||||
nopl (%eax)
|
||||
|
|
|
|||
|
|
@ -24,7 +24,8 @@ Disassembly of section .text:
|
|||
|
||||
0+30 <i686>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
|
||||
[ ]*[a-f0-9]+: 8d b6 00 00 00 00 lea 0x0\(%esi\),%esi
|
||||
[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%edi,%eiz,1\),%edi
|
||||
|
||||
0+40 <pentium4>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
|
|
|
|||
|
|
@ -22,7 +22,8 @@ Disassembly of section .text:
|
|||
|
||||
0+30 <i686>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
|
||||
[ ]*[a-f0-9]+: 8d b6 00 00 00 00 lea 0x0\(%esi\),%esi
|
||||
[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%edi,%eiz,1\),%edi
|
||||
|
||||
0+40 <pentium4>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
|
|
|
|||
|
|
@ -25,7 +25,8 @@ Disassembly of section .text:
|
|||
|
||||
0+30 <i686>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
|
||||
[ ]*[a-f0-9]+: 8d b6 00 00 00 00 lea 0x0\(%rsi\),%esi
|
||||
[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%rdi,%riz,1\),%edi
|
||||
|
||||
0+40 <pentium4>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
|
|
|
|||
|
|
@ -24,7 +24,8 @@ Disassembly of section .text:
|
|||
|
||||
0+30 <i686>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
|
||||
[ ]*[a-f0-9]+: 8d b6 00 00 00 00 lea 0x0\(%rsi\),%esi
|
||||
[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%rdi,%riz,1\),%edi
|
||||
|
||||
0+40 <pentium4>:
|
||||
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
|
||||
|
|
|
|||
|
|
@ -1,3 +1,13 @@
|
|||
2010-08-06 Quentin Neill <quentin.neill@amd.com>
|
||||
|
||||
* i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
|
||||
to processor flags for PENTIUMPRO processors and later.
|
||||
* i386-opc.h (enum): Add CpuNop.
|
||||
(i386_cpu_flags): Add cpunop bit.
|
||||
* i386-opc.tbl: Change nop cpu_flags.
|
||||
* i386-init.h: Regenerated.
|
||||
* i386-tbl.h: Likewise.
|
||||
|
||||
2010-08-06 Quentin Neill <quentin.neill@amd.com>
|
||||
|
||||
* i386-opc.h (enum): Fix typos in comments.
|
||||
|
|
|
|||
|
|
@ -62,32 +62,34 @@ static initializer cpu_flag_init[] =
|
|||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu387" },
|
||||
{ "CPU_I686_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687" },
|
||||
{ "CPU_PENTIUMPRO_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop" },
|
||||
{ "CPU_P2_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuMMX" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX" },
|
||||
{ "CPU_P3_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuMMX|CpuSSE" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE" },
|
||||
{ "CPU_P4_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuMMX|CpuSSE|CpuSSE2" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2" },
|
||||
{ "CPU_NOCONA_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
|
||||
{ "CPU_CORE_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
|
||||
{ "CPU_CORE2_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
|
||||
{ "CPU_COREI7_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM" },
|
||||
{ "CPU_K6_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" },
|
||||
{ "CPU_K6_2_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX|Cpu3dnow" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuNop|CpuMMX|Cpu3dnow" },
|
||||
{ "CPU_ATHLON_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuMMX|Cpu3dnow|Cpu3dnowA" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA" },
|
||||
{ "CPU_K8_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
|
||||
{ "CPU_AMDFAM10_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
|
||||
{ "CPU_BDVER1_FLAGS",
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
|
||||
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
|
||||
{ "CPU_8087_FLAGS",
|
||||
"Cpu8087" },
|
||||
{ "CPU_287_FLAGS",
|
||||
|
|
@ -98,6 +100,8 @@ static initializer cpu_flag_init[] =
|
|||
"Cpu8087|Cpu287|Cpu387|Cpu687|CpuFISTTP" },
|
||||
{ "CPU_CLFLUSH_FLAGS",
|
||||
"CpuClflush" },
|
||||
{ "CPU_NOP_FLAGS",
|
||||
"CpuNop" },
|
||||
{ "CPU_SYSCALL_FLAGS",
|
||||
"CpuSYSCALL" },
|
||||
{ "CPU_MMX_FLAGS",
|
||||
|
|
@ -284,6 +288,7 @@ static bitfield cpu_flags[] =
|
|||
BITFIELD (Cpu586),
|
||||
BITFIELD (Cpu686),
|
||||
BITFIELD (CpuClflush),
|
||||
BITFIELD (CpuNop),
|
||||
BITFIELD (CpuSYSCALL),
|
||||
BITFIELD (Cpu8087),
|
||||
BITFIELD (Cpu287),
|
||||
|
|
|
|||
|
|
@ -21,313 +21,323 @@
|
|||
|
||||
#define CPU_UNKNOWN_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 0, 1, 1 } }
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 0, 1, 1 } }
|
||||
|
||||
#define CPU_GENERIC32_FLAGS \
|
||||
{ { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_GENERIC64_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
|
||||
#define CPU_NONE_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_I186_FLAGS \
|
||||
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_I286_FLAGS \
|
||||
{ { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_I386_FLAGS \
|
||||
{ { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_I486_FLAGS \
|
||||
{ { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_I586_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_I686_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_PENTIUMPRO_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_P2_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_P3_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_P4_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_NOCONA_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
|
||||
#define CPU_CORE_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_CORE2_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
|
||||
#define CPU_COREI7_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
|
||||
#define CPU_K6_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_K6_2_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_ATHLON_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_K8_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
|
||||
#define CPU_AMDFAM10_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, \
|
||||
0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
|
||||
#define CPU_BDVER1_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, \
|
||||
0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
|
||||
1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
|
||||
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
|
||||
|
||||
#define CPU_8087_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_287_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_387_FLAGS \
|
||||
#define CPU_287_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_387_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_ANY87_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_CLFLUSH_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SYSCALL_FLAGS \
|
||||
#define CPU_NOP_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SYSCALL_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_MMX_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SSE_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SSE2_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SSE3_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SSSE3_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SSE4_1_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SSE4_2_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_ANY_SSE_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_VMX_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SMX_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_XSAVE_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_XSAVEOPT_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_AES_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_PCLMUL_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_FMA_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_FMA4_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_XOP_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_LWP_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_MOVBE_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_RDTSCP_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
1, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 1, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_EPT_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
1, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_FSGSBASE_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 1, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_RDRND_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 1, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 1, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_F16C_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 1, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 1, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_3DNOW_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_3DNOWA_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_PADLOCK_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SVME_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_SSE4A_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_ABM_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_AVX_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_ANY_AVX_FLAGS \
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
|
||||
|
||||
#define CPU_L1OM_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 0, 1, 1 } }
|
||||
1, 1, 1, 1, 1, 1, 0, 1, 1 } }
|
||||
|
||||
|
||||
#define OPERAND_TYPE_NONE \
|
||||
|
|
|
|||
|
|
@ -46,6 +46,8 @@ enum
|
|||
Cpu686,
|
||||
/* CLFLUSH Instruction support required */
|
||||
CpuClflush,
|
||||
/* NOP Instruction support required */
|
||||
CpuNop,
|
||||
/* SYSCALL Instructions support required */
|
||||
CpuSYSCALL,
|
||||
/* Floating point support required */
|
||||
|
|
@ -152,6 +154,7 @@ typedef union i386_cpu_flags
|
|||
unsigned int cpui586:1;
|
||||
unsigned int cpui686:1;
|
||||
unsigned int cpuclflush:1;
|
||||
unsigned int cpunop:1;
|
||||
unsigned int cpusyscall:1;
|
||||
unsigned int cpu8087:1;
|
||||
unsigned int cpu287:1;
|
||||
|
|
|
|||
|
|
@ -500,7 +500,7 @@ bound, 2, 0x62, None, 1, Cpu186|CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf,
|
|||
|
||||
hlt, 0, 0xf4, None, 1, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
|
||||
|
||||
nop, 1, 0xf1f, 0x0, 2, Cpu686, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
|
||||
nop, 1, 0xf1f, 0x0, 2, CpuNop, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
|
||||
|
||||
// nop is actually "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
|
||||
// 32bit mode and "xchg %rax,%rax" in 64bit mode.
|
||||
|
|
|
|||
8886
opcodes/i386-tbl.h
8886
opcodes/i386-tbl.h
File diff suppressed because it is too large
Load Diff
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Reference in New Issue