* Makefile.in (libbfd_h): Added missing setting.
* mips-tdep.c (mips_gdbarch_init): Set disassembler_options according to the selected ABI.
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parent
2a8e99b308
commit
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@ -1,3 +1,9 @@
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2003-04-11 Alexandre Oliva <aoliva@redhat.com>
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* Makefile.in (libbfd_h): Added missing setting.
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* mips-tdep.c (mips_gdbarch_init): Set disassembler_options
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according to the selected ABI.
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2003-04-11 Jeff Johnston <jjohnstn@redhat.com>
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* gdb_indent.sh: Recognize pid_t and sigset_t as types.
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@ -574,6 +574,7 @@ elf_sh_h = $(INCLUDE_DIR)/elf/sh.h
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elf_arm_h = $(INCLUDE_DIR)/elf/arm.h $(elf_reloc_macros_h)
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elf_bfd_h = $(BFD_SRC)/elf-bfd.h
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libaout_h = $(BFD_SRC)/libaout.h
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libbfd_h = $(BFD_SRC)/libbfd.h
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remote_sim_h = $(INCLUDE_DIR)/gdb/remote-sim.h
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demangle_h = $(INCLUDE_DIR)/demangle.h
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obstack_h = $(INCLUDE_DIR)/obstack.h
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@ -5731,6 +5731,34 @@ mips_gdbarch_init (struct gdbarch_info info,
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if (wanted_abi != MIPS_ABI_UNKNOWN)
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mips_abi = wanted_abi;
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/* We have to set tm_print_insn_info before looking for a
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pre-existing architecture, otherwise we may return before we get
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a chance to set it up. */
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if (mips_abi == MIPS_ABI_N32 || mips_abi == MIPS_ABI_N64)
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{
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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if (mips_abi == MIPS_ABI_N32)
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tm_print_insn_info.disassembler_options = "gpr-names=n32";
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else
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tm_print_insn_info.disassembler_options = "gpr-names=64";
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tm_print_insn_info.flavour = bfd_target_elf_flavour;
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tm_print_insn_info.arch = bfd_arch_mips;
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if (info.bfd_arch_info != NULL
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&& info.bfd_arch_info->arch == bfd_arch_mips
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&& info.bfd_arch_info->mach)
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tm_print_insn_info.mach = info.bfd_arch_info->mach;
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else
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tm_print_insn_info.mach = bfd_mach_mips8000;
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}
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else
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/* This string is not recognized explicitly by the disassembler,
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but it tells the disassembler to not try to guess the ABI from
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the bfd elf headers, such that, if the user overrides the ABI
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of a program linked as NewABI, the disassembly will follow the
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register naming conventions specified by the user. */
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tm_print_insn_info.disassembler_options = "gpr-names=32";
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if (gdbarch_debug)
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{
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fprintf_unfiltered (gdb_stdlog,
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@ -5875,18 +5903,6 @@ mips_gdbarch_init (struct gdbarch_info info,
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set_gdbarch_long_bit (gdbarch, 32);
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set_gdbarch_ptr_bit (gdbarch, 32);
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set_gdbarch_long_long_bit (gdbarch, 64);
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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tm_print_insn_info.flavour = bfd_target_elf_flavour;
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tm_print_insn_info.arch = bfd_arch_mips;
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if (info.bfd_arch_info != NULL
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&& info.bfd_arch_info->arch == bfd_arch_mips
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&& info.bfd_arch_info->mach)
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tm_print_insn_info.mach = info.bfd_arch_info->mach;
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else
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tm_print_insn_info.mach = bfd_mach_mips8000;
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set_gdbarch_use_struct_convention (gdbarch,
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mips_n32n64_use_struct_convention);
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set_gdbarch_reg_struct_has_addr (gdbarch,
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@ -5906,18 +5922,6 @@ mips_gdbarch_init (struct gdbarch_info info,
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set_gdbarch_long_bit (gdbarch, 64);
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set_gdbarch_ptr_bit (gdbarch, 64);
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set_gdbarch_long_long_bit (gdbarch, 64);
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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tm_print_insn_info.flavour = bfd_target_elf_flavour;
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tm_print_insn_info.arch = bfd_arch_mips;
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if (info.bfd_arch_info != NULL
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&& info.bfd_arch_info->arch == bfd_arch_mips
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&& info.bfd_arch_info->mach)
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tm_print_insn_info.mach = info.bfd_arch_info->mach;
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else
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tm_print_insn_info.mach = bfd_mach_mips8000;
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set_gdbarch_use_struct_convention (gdbarch,
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mips_n32n64_use_struct_convention);
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set_gdbarch_reg_struct_has_addr (gdbarch,
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