Avoid longjmp()-catching compilation errors in cross-ports.

* doc/gdbint.texinfo:  Update GET_LONGJMP_TARGET, L_SET doc.
* irix4-nat.c, mips-nat.c (JB_ELEMENT_SIZE, get_longjmp_target):
Move from mips-tdep.c and tm-{irix3,mips}.h.
* mips-nat.c:  Remove a bunch of code that was ifdef'd out of
native MIPS ports.
* nm-irix3.h, nm-mips.h (GET_LONGJMP_TARGET):  Move from tm-irix3.h
and tm-mips.h.

* ultra3-nat.c (register_addr):  Move from ultra3-xdep.c.
(fetch_core_registers):  Fix bfd_seek arguments.
This commit is contained in:
John Gilmore 1992-10-16 10:47:34 +00:00
parent c3bbca3aad
commit 2268d61946
10 changed files with 150 additions and 168 deletions

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@ -1,3 +1,18 @@
Fri Oct 16 03:34:01 1992 John Gilmore (gnu@cygnus.com)
Avoid longjmp()-catching compilation errors in cross-ports.
* doc/gdbint.texinfo: Update GET_LONGJMP_TARGET, L_SET doc.
* irix4-nat.c, mips-nat.c (JB_ELEMENT_SIZE, get_longjmp_target):
Move from mips-tdep.c and tm-{irix3,mips}.h.
* mips-nat.c: Remove a bunch of code that was ifdef'd out of
native MIPS ports.
* nm-irix3.h, nm-mips.h (GET_LONGJMP_TARGET): Move from tm-irix3.h
and tm-mips.h.
* ultra3-nat.c (register_addr): Move from ultra3-xdep.c.
(fetch_core_registers): Fix bfd_seek arguments.
Fri Oct 16 03:02:28 1992 John Gilmore (gnu@cygnus.com)
Make core files work again (add back the `core' target).

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@ -1,7 +1,8 @@
/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
/* Native support for the SGI Iris running IRIX version 4, for GDB.
Copyright 1988, 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
Implemented for Irix 4.x by Garrett A. Wollman.
This file is part of GDB.
@ -21,12 +22,13 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include "defs.h"
/*
* Implemented for Irix 4.x by Garrett A. Wollman
*/
#include <sys/time.h>
#include <sys/procfs.h>
#include <setjmp.h> /* For JB_XXX. */
/* Size of elements in jmpbuf */
#define JB_ELEMENT_SIZE 4
typedef unsigned int greg_t; /* why isn't this defined? */
@ -124,3 +126,26 @@ fill_fpregset (fpregsetp, regno)
if ((regno == -1) || (regno == FCRCS_REGNUM))
fpregsetp->fp_csr = *(unsigned *) &registers[REGISTER_BYTE(FCRCS_REGNUM)];
}
/* Figure out where the longjmp will land.
We expect the first arg to be a pointer to the jmp_buf structure from which
we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
This routine returns true on success. */
int
get_longjmp_target(pc)
CORE_ADDR *pc;
{
CORE_ADDR jb_addr;
jb_addr = read_register(A0_REGNUM);
if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, pc,
sizeof(CORE_ADDR)))
return 0;
SWAP_TARGET_AND_HOST(pc, sizeof(CORE_ADDR));
return 1;
}

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@ -1,4 +1,4 @@
/* Low level MIPS interface to ptrace, for GDB when running under Unix.
/* Low level DECstation interface to ptrace, for GDB when running native.
Copyright 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
@ -22,50 +22,12 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include "defs.h"
#include "inferior.h"
#include "gdbcore.h"
/* For now we stub this out; sgi core format is super-hairy (and completely
different in the new release).
For most mips systems, this function is defined in coredep.c. */
#if defined(sgi)
void
fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
char *core_reg_sect;
unsigned core_reg_size;
int which;
unsigned int reg_addr;
{
return;
}
#endif
/* Access to the inferior is only good for native systems, not cross.
I am not sure why this is stubbed out on SGI... --gnu@cygnus.com */
#if defined(sgi) || !defined(GDB_TARGET_IS_MIPS)
/* ARGSUSED */
void
fetch_inferior_registers (regno)
int regno;
{
return;
}
/* ARGSUSED */
void
store_inferior_registers (regno)
int regno;
{
return;
}
#else
/* DECstation native... */
#include <sys/ptrace.h>
#include <setjmp.h> /* For JB_XXX. */
/* Size of elements in jmpbuf */
#define JB_ELEMENT_SIZE 4
/* Map gdb internal register number to ptrace ``address''.
These ``addresses'' are defined in DECstation <sys/ptrace.h> */
@ -160,6 +122,25 @@ store_inferior_registers (regno)
}
}
#endif /* sgi */
/* Figure out where the longjmp will land.
We expect the first arg to be a pointer to the jmp_buf structure from which
we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
This routine returns true on success. */
int
get_longjmp_target(pc)
CORE_ADDR *pc;
{
CORE_ADDR jb_addr;
jb_addr = read_register(A0_REGNUM);
if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, pc,
sizeof(CORE_ADDR)))
return 0;
SWAP_TARGET_AND_HOST(pc, sizeof(CORE_ADDR));
return 1;
}

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@ -36,12 +36,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include <signal.h>
#include <sys/ioctl.h>
#ifdef sgi
/* Must do it this way only for SGIs, as other mips platforms get their
JB_ symbols from machine/pcb.h (included via sys/user.h). */
#include <setjmp.h>
#endif
#include "gdbcore.h"
#include "symfile.h"
#include "objfiles.h"
@ -745,25 +739,3 @@ mips_skip_prologue(pc)
return pc;
}
/* Figure out where the longjmp will land.
We expect the first arg to be a pointer to the jmp_buf structure from which
we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
This routine returns true on success. */
int
get_longjmp_target(pc)
CORE_ADDR *pc;
{
CORE_ADDR jb_addr;
jb_addr = read_register(A0_REGNUM);
if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, pc,
sizeof(CORE_ADDR)))
return 0;
SWAP_TARGET_AND_HOST(pc, sizeof(CORE_ADDR));
return 1;
}

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@ -1,6 +1,5 @@
/* Definitions for irix3 native support.
Copyright (C) 1991, 1992 Free Software Foundation, Inc.
/* Definitions for SGI irix3 native support.
Copyright 1991, 1992 Free Software Foundation, Inc.
This file is part of GDB.
@ -18,7 +17,15 @@ You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Don't need special routines for the SGI -- we can use infptrace.c */
/* Don't need special routines for Irix v3 -- we can use infptrace.c */
#undef FETCH_INFERIOR_REGISTERS
#define U_REGS_OFFSET 0
/* Figure out where the longjmp will land. We expect that we have just entered
longjmp and haven't yet setup the stack frame, so the args are still in the
argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
This routine returns true on success */
#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)

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@ -21,3 +21,11 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
#define FETCH_INFERIOR_REGISTERS
/* Figure out where the longjmp will land. We expect that we have just entered
longjmp and haven't yet setup the stack frame, so the args are still in the
argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
This routine returns true on success */
#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)

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@ -314,16 +314,3 @@ typedef struct mips_extra_func_info {
struct frame_saved_regs *saved_regs;
#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
/* Size of elements in jmpbuf */
#define JB_ELEMENT_SIZE 4
/* Figure out where the longjmp will land. We expect that we have just entered
longjmp and haven't yet setup the stack frame, so the args are still in the
argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
This routine returns true on success */
/* Note that caller must #include <setjmp.h> in order to get def of JB_* */
#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)

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@ -368,16 +368,3 @@ typedef struct mips_extra_func_info {
#define FRAME_SPECIFICATION_DYADIC
#define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
/* Size of elements in jmpbuf */
#define JB_ELEMENT_SIZE 4
/* Figure out where the longjmp will land. We expect that we have just entered
longjmp and haven't yet setup the stack frame, so the args are still in the
argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
This routine returns true on success */
/* Note that caller must #include <setjmp.h> in order to get def of JB_* */
#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)

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@ -1,4 +1,4 @@
/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
/* Native-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
Copyright (C) 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
Contributed by David Wood (wood@nyu.edu) at New York University.
@ -36,6 +36,24 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include <sys/file.h>
#include <sys/stat.h>
/* Assumes support for AMD's Binary Compatibility Standard
for ptrace(). If you define ULTRA3, the ultra3 extensions to
ptrace() are used allowing the reading of more than one register
at a time.
This file assumes KERNEL_DEBUGGING is turned off. This means
that if the user/gdb tries to read gr64-gr95 or any of the
protected special registers we silently return -1 (see the
CANNOT_STORE/FETCH_REGISTER macros). */
#define ULTRA3
#if !defined (offsetof)
# define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
#endif
extern int errno;
struct ptrace_user pt_struct;
/* Get all available registers from the inferior. Registers that are
* defined in REGISTER_NAMES, but not available to the user/gdb are
* supplied as -1. This may include gr64-gr95 and the protected special
@ -232,7 +250,7 @@ fetch_core_registers ()
for (regno = 0 ; regno < NUM_REGS; regno++) {
if (!CANNOT_FETCH_REGISTER(regno)) {
val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
val = bfd_seek (core_bfd, (file_ptr) register_addr (regno, 0), L_SET);
if (val < 0 || (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
strcpy (buffer, "Reading core register ");
@ -248,3 +266,43 @@ fetch_core_registers ()
}
/*
* Takes a register number as defined in tm.h via REGISTER_NAMES, and maps
* it to an offset in a struct ptrace_user defined by AMD's BCS.
* That is, it defines the mapping between gdb register numbers and items in
* a struct ptrace_user.
* A register protection scheme is set up here. If a register not
* available to the user is specified in 'regno', then an address that
* will cause ptrace() to fail is returned.
*/
unsigned int
register_addr (regno,blockend)
unsigned int regno;
char *blockend;
{
if ((regno >= LR0_REGNUM) && (regno < LR0_REGNUM + 128)) {
return(offsetof(struct ptrace_user,pt_lr[regno-LR0_REGNUM]));
} else if ((regno >= GR96_REGNUM) && (regno < GR96_REGNUM + 32)) {
return(offsetof(struct ptrace_user,pt_gr[regno-GR96_REGNUM]));
} else {
switch (regno) {
case GR1_REGNUM: return(offsetof(struct ptrace_user,pt_gr1));
case CPS_REGNUM: return(offsetof(struct ptrace_user,pt_psr));
case NPC_REGNUM: return(offsetof(struct ptrace_user,pt_pc0));
case PC_REGNUM: return(offsetof(struct ptrace_user,pt_pc1));
case PC2_REGNUM: return(offsetof(struct ptrace_user,pt_pc2));
case IPC_REGNUM: return(offsetof(struct ptrace_user,pt_ipc));
case IPA_REGNUM: return(offsetof(struct ptrace_user,pt_ipa));
case IPB_REGNUM: return(offsetof(struct ptrace_user,pt_ipb));
case Q_REGNUM: return(offsetof(struct ptrace_user,pt_q));
case BP_REGNUM: return(offsetof(struct ptrace_user,pt_bp));
case FC_REGNUM: return(offsetof(struct ptrace_user,pt_fc));
default:
fprintf_filtered(stderr,"register_addr():Bad register %s (%d)\n",
reg_names[regno],regno);
return(0xffffffff); /* Should make ptrace() fail */
}
}
}

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@ -36,64 +36,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include <sys/file.h>
#include <sys/stat.h>
/* Assumes support for AMD's Binary Compatibility Standard
for ptrace(). If you define ULTRA3, the ultra3 extensions to
ptrace() are used allowing the reading of more than one register
at a time.
This file assumes KERNEL_DEBUGGING is turned off. This means
that if the user/gdb tries to read gr64-gr95 or any of the
protected special registers we silently return -1 (see the
CANNOT_STORE/FETCH_REGISTER macros). */
#define ULTRA3
#if !defined (offsetof)
# define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
#endif
extern int errno;
struct ptrace_user pt_struct;
/*
* Takes a register number as defined in tm.h via REGISTER_NAMES, and maps
* it to an offset in a struct ptrace_user defined by AMD's BCS.
* That is, it defines the mapping between gdb register numbers and items in
* a struct ptrace_user.
* A register protection scheme is set up here. If a register not
* available to the user is specified in 'regno', then an address that
* will cause ptrace() to fail is returned.
*/
unsigned int
register_addr (regno,blockend)
unsigned int regno;
char *blockend;
{
if ((regno >= LR0_REGNUM) && (regno < LR0_REGNUM + 128)) {
return(offsetof(struct ptrace_user,pt_lr[regno-LR0_REGNUM]));
} else if ((regno >= GR96_REGNUM) && (regno < GR96_REGNUM + 32)) {
return(offsetof(struct ptrace_user,pt_gr[regno-GR96_REGNUM]));
} else {
switch (regno) {
case GR1_REGNUM: return(offsetof(struct ptrace_user,pt_gr1));
case CPS_REGNUM: return(offsetof(struct ptrace_user,pt_psr));
case NPC_REGNUM: return(offsetof(struct ptrace_user,pt_pc0));
case PC_REGNUM: return(offsetof(struct ptrace_user,pt_pc1));
case PC2_REGNUM: return(offsetof(struct ptrace_user,pt_pc2));
case IPC_REGNUM: return(offsetof(struct ptrace_user,pt_ipc));
case IPA_REGNUM: return(offsetof(struct ptrace_user,pt_ipa));
case IPB_REGNUM: return(offsetof(struct ptrace_user,pt_ipb));
case Q_REGNUM: return(offsetof(struct ptrace_user,pt_q));
case BP_REGNUM: return(offsetof(struct ptrace_user,pt_bp));
case FC_REGNUM: return(offsetof(struct ptrace_user,pt_fc));
default:
fprintf_filtered(stderr,"register_addr():Bad register %s (%d)\n",
reg_names[regno],regno);
return(0xffffffff); /* Should make ptrace() fail */
}
}
}
/* Assorted operating system circumventions */
#ifdef SYM1