Avoid longjmp()-catching compilation errors in cross-ports.
* doc/gdbint.texinfo: Update GET_LONGJMP_TARGET, L_SET doc. * irix4-nat.c, mips-nat.c (JB_ELEMENT_SIZE, get_longjmp_target): Move from mips-tdep.c and tm-{irix3,mips}.h. * mips-nat.c: Remove a bunch of code that was ifdef'd out of native MIPS ports. * nm-irix3.h, nm-mips.h (GET_LONGJMP_TARGET): Move from tm-irix3.h and tm-mips.h. * ultra3-nat.c (register_addr): Move from ultra3-xdep.c. (fetch_core_registers): Fix bfd_seek arguments.
This commit is contained in:
parent
c3bbca3aad
commit
2268d61946
@ -1,3 +1,18 @@
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Fri Oct 16 03:34:01 1992 John Gilmore (gnu@cygnus.com)
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Avoid longjmp()-catching compilation errors in cross-ports.
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* doc/gdbint.texinfo: Update GET_LONGJMP_TARGET, L_SET doc.
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* irix4-nat.c, mips-nat.c (JB_ELEMENT_SIZE, get_longjmp_target):
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Move from mips-tdep.c and tm-{irix3,mips}.h.
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* mips-nat.c: Remove a bunch of code that was ifdef'd out of
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native MIPS ports.
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* nm-irix3.h, nm-mips.h (GET_LONGJMP_TARGET): Move from tm-irix3.h
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and tm-mips.h.
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* ultra3-nat.c (register_addr): Move from ultra3-xdep.c.
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(fetch_core_registers): Fix bfd_seek arguments.
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Fri Oct 16 03:02:28 1992 John Gilmore (gnu@cygnus.com)
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Make core files work again (add back the `core' target).
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@ -1,7 +1,8 @@
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/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
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/* Native support for the SGI Iris running IRIX version 4, for GDB.
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Copyright 1988, 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
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Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
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and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
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Implemented for Irix 4.x by Garrett A. Wollman.
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This file is part of GDB.
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@ -21,12 +22,13 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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/*
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* Implemented for Irix 4.x by Garrett A. Wollman
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*/
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#include <sys/time.h>
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#include <sys/procfs.h>
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#include <setjmp.h> /* For JB_XXX. */
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/* Size of elements in jmpbuf */
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#define JB_ELEMENT_SIZE 4
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typedef unsigned int greg_t; /* why isn't this defined? */
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@ -124,3 +126,26 @@ fill_fpregset (fpregsetp, regno)
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if ((regno == -1) || (regno == FCRCS_REGNUM))
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fpregsetp->fp_csr = *(unsigned *) ®isters[REGISTER_BYTE(FCRCS_REGNUM)];
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}
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/* Figure out where the longjmp will land.
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We expect the first arg to be a pointer to the jmp_buf structure from which
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we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
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This routine returns true on success. */
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int
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get_longjmp_target(pc)
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CORE_ADDR *pc;
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{
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CORE_ADDR jb_addr;
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jb_addr = read_register(A0_REGNUM);
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if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, pc,
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sizeof(CORE_ADDR)))
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return 0;
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SWAP_TARGET_AND_HOST(pc, sizeof(CORE_ADDR));
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return 1;
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}
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@ -1,4 +1,4 @@
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/* Low level MIPS interface to ptrace, for GDB when running under Unix.
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/* Low level DECstation interface to ptrace, for GDB when running native.
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Copyright 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
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Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
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and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
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@ -22,50 +22,12 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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/* For now we stub this out; sgi core format is super-hairy (and completely
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different in the new release).
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For most mips systems, this function is defined in coredep.c. */
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#if defined(sgi)
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void
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fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
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char *core_reg_sect;
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unsigned core_reg_size;
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int which;
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unsigned int reg_addr;
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{
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return;
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}
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#endif
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/* Access to the inferior is only good for native systems, not cross.
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I am not sure why this is stubbed out on SGI... --gnu@cygnus.com */
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#if defined(sgi) || !defined(GDB_TARGET_IS_MIPS)
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/* ARGSUSED */
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void
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fetch_inferior_registers (regno)
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int regno;
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{
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return;
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}
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/* ARGSUSED */
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void
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store_inferior_registers (regno)
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int regno;
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{
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return;
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}
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#else
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/* DECstation native... */
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#include <sys/ptrace.h>
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#include <setjmp.h> /* For JB_XXX. */
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/* Size of elements in jmpbuf */
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#define JB_ELEMENT_SIZE 4
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/* Map gdb internal register number to ptrace ``address''.
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These ``addresses'' are defined in DECstation <sys/ptrace.h> */
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@ -160,6 +122,25 @@ store_inferior_registers (regno)
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}
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}
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#endif /* sgi */
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/* Figure out where the longjmp will land.
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We expect the first arg to be a pointer to the jmp_buf structure from which
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we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
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This routine returns true on success. */
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int
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get_longjmp_target(pc)
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CORE_ADDR *pc;
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{
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CORE_ADDR jb_addr;
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jb_addr = read_register(A0_REGNUM);
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if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, pc,
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sizeof(CORE_ADDR)))
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return 0;
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SWAP_TARGET_AND_HOST(pc, sizeof(CORE_ADDR));
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return 1;
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}
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@ -36,12 +36,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <signal.h>
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#include <sys/ioctl.h>
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#ifdef sgi
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/* Must do it this way only for SGIs, as other mips platforms get their
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JB_ symbols from machine/pcb.h (included via sys/user.h). */
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#include <setjmp.h>
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#endif
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#include "gdbcore.h"
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#include "symfile.h"
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#include "objfiles.h"
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@ -745,25 +739,3 @@ mips_skip_prologue(pc)
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return pc;
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}
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/* Figure out where the longjmp will land.
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We expect the first arg to be a pointer to the jmp_buf structure from which
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we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
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This routine returns true on success. */
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int
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get_longjmp_target(pc)
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CORE_ADDR *pc;
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{
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CORE_ADDR jb_addr;
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jb_addr = read_register(A0_REGNUM);
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if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, pc,
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sizeof(CORE_ADDR)))
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return 0;
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SWAP_TARGET_AND_HOST(pc, sizeof(CORE_ADDR));
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return 1;
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}
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@ -1,6 +1,5 @@
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/* Definitions for irix3 native support.
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Copyright (C) 1991, 1992 Free Software Foundation, Inc.
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/* Definitions for SGI irix3 native support.
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Copyright 1991, 1992 Free Software Foundation, Inc.
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This file is part of GDB.
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@ -18,7 +17,15 @@ You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* Don't need special routines for the SGI -- we can use infptrace.c */
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/* Don't need special routines for Irix v3 -- we can use infptrace.c */
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#undef FETCH_INFERIOR_REGISTERS
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#define U_REGS_OFFSET 0
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/* Figure out where the longjmp will land. We expect that we have just entered
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longjmp and haven't yet setup the stack frame, so the args are still in the
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argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
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extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
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This routine returns true on success */
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#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
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@ -21,3 +21,11 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
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#define FETCH_INFERIOR_REGISTERS
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/* Figure out where the longjmp will land. We expect that we have just entered
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longjmp and haven't yet setup the stack frame, so the args are still in the
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argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
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extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
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This routine returns true on success */
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#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
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@ -314,16 +314,3 @@ typedef struct mips_extra_func_info {
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struct frame_saved_regs *saved_regs;
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#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
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/* Size of elements in jmpbuf */
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#define JB_ELEMENT_SIZE 4
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/* Figure out where the longjmp will land. We expect that we have just entered
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longjmp and haven't yet setup the stack frame, so the args are still in the
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argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
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extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
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This routine returns true on success */
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/* Note that caller must #include <setjmp.h> in order to get def of JB_* */
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#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
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#define FRAME_SPECIFICATION_DYADIC
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#define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
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/* Size of elements in jmpbuf */
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#define JB_ELEMENT_SIZE 4
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/* Figure out where the longjmp will land. We expect that we have just entered
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longjmp and haven't yet setup the stack frame, so the args are still in the
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argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
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extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
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This routine returns true on success */
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/* Note that caller must #include <setjmp.h> in order to get def of JB_* */
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#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
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@ -1,4 +1,4 @@
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/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
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/* Native-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
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Copyright (C) 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
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Contributed by David Wood (wood@nyu.edu) at New York University.
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@ -36,6 +36,24 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <sys/file.h>
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#include <sys/stat.h>
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/* Assumes support for AMD's Binary Compatibility Standard
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for ptrace(). If you define ULTRA3, the ultra3 extensions to
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ptrace() are used allowing the reading of more than one register
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at a time.
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This file assumes KERNEL_DEBUGGING is turned off. This means
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that if the user/gdb tries to read gr64-gr95 or any of the
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protected special registers we silently return -1 (see the
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CANNOT_STORE/FETCH_REGISTER macros). */
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#define ULTRA3
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#if !defined (offsetof)
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# define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
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#endif
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extern int errno;
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struct ptrace_user pt_struct;
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/* Get all available registers from the inferior. Registers that are
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* defined in REGISTER_NAMES, but not available to the user/gdb are
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* supplied as -1. This may include gr64-gr95 and the protected special
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@ -232,7 +250,7 @@ fetch_core_registers ()
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for (regno = 0 ; regno < NUM_REGS; regno++) {
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if (!CANNOT_FETCH_REGISTER(regno)) {
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val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
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val = bfd_seek (core_bfd, (file_ptr) register_addr (regno, 0), L_SET);
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if (val < 0 || (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
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char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
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strcpy (buffer, "Reading core register ");
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@ -248,3 +266,43 @@ fetch_core_registers ()
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}
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/*
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* Takes a register number as defined in tm.h via REGISTER_NAMES, and maps
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* it to an offset in a struct ptrace_user defined by AMD's BCS.
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* That is, it defines the mapping between gdb register numbers and items in
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* a struct ptrace_user.
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* A register protection scheme is set up here. If a register not
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* available to the user is specified in 'regno', then an address that
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* will cause ptrace() to fail is returned.
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*/
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unsigned int
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register_addr (regno,blockend)
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unsigned int regno;
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char *blockend;
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{
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if ((regno >= LR0_REGNUM) && (regno < LR0_REGNUM + 128)) {
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return(offsetof(struct ptrace_user,pt_lr[regno-LR0_REGNUM]));
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} else if ((regno >= GR96_REGNUM) && (regno < GR96_REGNUM + 32)) {
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return(offsetof(struct ptrace_user,pt_gr[regno-GR96_REGNUM]));
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} else {
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switch (regno) {
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case GR1_REGNUM: return(offsetof(struct ptrace_user,pt_gr1));
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case CPS_REGNUM: return(offsetof(struct ptrace_user,pt_psr));
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case NPC_REGNUM: return(offsetof(struct ptrace_user,pt_pc0));
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case PC_REGNUM: return(offsetof(struct ptrace_user,pt_pc1));
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case PC2_REGNUM: return(offsetof(struct ptrace_user,pt_pc2));
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case IPC_REGNUM: return(offsetof(struct ptrace_user,pt_ipc));
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case IPA_REGNUM: return(offsetof(struct ptrace_user,pt_ipa));
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case IPB_REGNUM: return(offsetof(struct ptrace_user,pt_ipb));
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case Q_REGNUM: return(offsetof(struct ptrace_user,pt_q));
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case BP_REGNUM: return(offsetof(struct ptrace_user,pt_bp));
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case FC_REGNUM: return(offsetof(struct ptrace_user,pt_fc));
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default:
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fprintf_filtered(stderr,"register_addr():Bad register %s (%d)\n",
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reg_names[regno],regno);
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return(0xffffffff); /* Should make ptrace() fail */
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}
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}
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}
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|
@ -36,64 +36,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <sys/file.h>
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#include <sys/stat.h>
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/* Assumes support for AMD's Binary Compatibility Standard
|
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for ptrace(). If you define ULTRA3, the ultra3 extensions to
|
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ptrace() are used allowing the reading of more than one register
|
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at a time.
|
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|
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This file assumes KERNEL_DEBUGGING is turned off. This means
|
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that if the user/gdb tries to read gr64-gr95 or any of the
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protected special registers we silently return -1 (see the
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CANNOT_STORE/FETCH_REGISTER macros). */
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#define ULTRA3
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#if !defined (offsetof)
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# define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
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#endif
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extern int errno;
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struct ptrace_user pt_struct;
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/*
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* Takes a register number as defined in tm.h via REGISTER_NAMES, and maps
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* it to an offset in a struct ptrace_user defined by AMD's BCS.
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* That is, it defines the mapping between gdb register numbers and items in
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* a struct ptrace_user.
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* A register protection scheme is set up here. If a register not
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* available to the user is specified in 'regno', then an address that
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* will cause ptrace() to fail is returned.
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*/
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unsigned int
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register_addr (regno,blockend)
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unsigned int regno;
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char *blockend;
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{
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if ((regno >= LR0_REGNUM) && (regno < LR0_REGNUM + 128)) {
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return(offsetof(struct ptrace_user,pt_lr[regno-LR0_REGNUM]));
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} else if ((regno >= GR96_REGNUM) && (regno < GR96_REGNUM + 32)) {
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return(offsetof(struct ptrace_user,pt_gr[regno-GR96_REGNUM]));
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} else {
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switch (regno) {
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case GR1_REGNUM: return(offsetof(struct ptrace_user,pt_gr1));
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case CPS_REGNUM: return(offsetof(struct ptrace_user,pt_psr));
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case NPC_REGNUM: return(offsetof(struct ptrace_user,pt_pc0));
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case PC_REGNUM: return(offsetof(struct ptrace_user,pt_pc1));
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case PC2_REGNUM: return(offsetof(struct ptrace_user,pt_pc2));
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case IPC_REGNUM: return(offsetof(struct ptrace_user,pt_ipc));
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case IPA_REGNUM: return(offsetof(struct ptrace_user,pt_ipa));
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case IPB_REGNUM: return(offsetof(struct ptrace_user,pt_ipb));
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case Q_REGNUM: return(offsetof(struct ptrace_user,pt_q));
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case BP_REGNUM: return(offsetof(struct ptrace_user,pt_bp));
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case FC_REGNUM: return(offsetof(struct ptrace_user,pt_fc));
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default:
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fprintf_filtered(stderr,"register_addr():Bad register %s (%d)\n",
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reg_names[regno],regno);
|
||||
return(0xffffffff); /* Should make ptrace() fail */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Assorted operating system circumventions */
|
||||
|
||||
#ifdef SYM1
|
||||
|
Loading…
Reference in New Issue
Block a user