PowerPC nops
This patch corrects ppc rs_align_code handling to choose the alignment nops based on the machine in force at the alignment directive rather than the machine at the end of file. * config/tc-ppc.h (ppc_nop_select): Declare. (NOP_OPCODE): Define. * config/tc-ppc.c (ppc_elf_end, ppc_xcoff_end): Zero ppc_cpu. (ppc_nop_encoding_for_rs_align_code): New enum. (ppc_nop_select): New function. (ppc_handle_align): Don't use ppc_cpu here. Get nop type from frag. * testsuite/gas/ppc/groupnop.d, * testsuite/gas/ppc/groupnop.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
This commit is contained in:
Alan Modra
parent
2e7c439dec
commit
22f72c4868
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@ -1,3 +1,15 @@
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2019-06-25 Alan Modra <amodra@gmail.com>
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* config/tc-ppc.h (ppc_nop_select): Declare.
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(NOP_OPCODE): Define.
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* config/tc-ppc.c (ppc_elf_end, ppc_xcoff_end): Zero ppc_cpu.
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(ppc_nop_encoding_for_rs_align_code): New enum.
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(ppc_nop_select): New function.
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(ppc_handle_align): Don't use ppc_cpu here. Get nop type from frag.
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* testsuite/gas/ppc/groupnop.d,
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* testsuite/gas/ppc/groupnop.s: New test.
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* testsuite/gas/ppc/ppc.exp: Run it.
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2019-06-19 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/24700
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@ -2608,6 +2608,12 @@ ppc_elf_end (void)
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elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
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elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
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}
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/* Any selection of opcodes based on ppc_cpu after gas has finished
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parsing the file is invalid. md_apply_fix and ppc_handle_align
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must select opcodes based on the machine in force at the point
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where the fixup or alignment frag was created, not the machine in
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force at the end of file. */
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ppc_cpu = 0;
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}
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/* Validate any relocations emitted for -mrelocatable, possibly adding
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@ -5562,6 +5568,7 @@ ppc_xcoff_end (void)
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symbol_set_value_now (dwss->end_exp.X_add_symbol);
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}
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}
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ppc_cpu = 0;
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}
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#endif /* OBJ_XCOFF */
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@ -7077,26 +7084,58 @@ ppc_frag_check (struct frag *fragP)
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fragP->insn_addr + 1);
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}
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/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
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rs_align_code frag. */
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/* rs_align_code frag handling. */
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enum ppc_nop_encoding_for_rs_align_code
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{
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PPC_NOP_VANILLA,
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PPC_NOP_VLE,
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PPC_NOP_GROUP_P6,
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PPC_NOP_GROUP_P7
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};
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unsigned int
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ppc_nop_select (void)
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{
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if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
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return PPC_NOP_VLE;
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if ((ppc_cpu & (PPC_OPCODE_POWER9 | PPC_OPCODE_E500MC)) == 0)
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{
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if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
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return PPC_NOP_GROUP_P7;
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if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
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return PPC_NOP_GROUP_P6;
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}
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return PPC_NOP_VANILLA;
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}
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void
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ppc_handle_align (struct frag *fragP)
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{
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valueT count = (fragP->fr_next->fr_address
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- (fragP->fr_address + fragP->fr_fix));
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char *dest = fragP->fr_literal + fragP->fr_fix;
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enum ppc_nop_encoding_for_rs_align_code nop_select = *dest & 0xff;
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if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0)
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/* Pad with zeros if not inserting a whole number of instructions.
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We could pad with zeros up to an instruction boundary then follow
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with nops but odd counts indicate data in an executable section
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so padding with zeros is most appropriate. */
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if (count == 0
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|| nop_select == PPC_NOP_VLE ? (count & 1) != 0 : (count & 3) != 0)
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{
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*dest = 0;
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return;
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}
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if (nop_select == PPC_NOP_VLE)
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{
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char *dest = fragP->fr_literal + fragP->fr_fix;
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fragP->fr_var = 2;
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md_number_to_chars (dest, 0x4400, 2);
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}
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else if (count != 0 && (count & 3) == 0)
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else
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{
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char *dest = fragP->fr_literal + fragP->fr_fix;
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fragP->fr_var = 4;
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if (count > 4 * nop_limit && count < 0x2000000)
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@ -7125,8 +7164,7 @@ ppc_handle_align (struct frag *fragP)
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md_number_to_chars (dest, 0x60000000, 4);
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if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
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&& (ppc_cpu & PPC_OPCODE_POWER9) == 0)
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if (nop_select >= PPC_NOP_GROUP_P6)
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{
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/* For power6, power7, and power8, we want the last nop to
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be a group terminating one. Do this by inserting an
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@ -7146,18 +7184,12 @@ ppc_handle_align (struct frag *fragP)
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dest = group_nop->fr_literal;
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}
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if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
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{
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if (ppc_cpu & PPC_OPCODE_E500MC)
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/* e500mc group terminating nop: "ori 0,0,0". */
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md_number_to_chars (dest, 0x60000000, 4);
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else
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/* power7/power8 group terminating nop: "ori 2,2,0". */
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md_number_to_chars (dest, 0x60420000, 4);
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}
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else
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if (nop_select == PPC_NOP_GROUP_P6)
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/* power6 group terminating nop: "ori 1,1,0". */
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md_number_to_chars (dest, 0x60210000, 4);
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else
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/* power7/power8 group terminating nop: "ori 2,2,0". */
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md_number_to_chars (dest, 0x60420000, 4);
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}
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}
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}
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@ -82,6 +82,9 @@ extern const char *ppc_target_format (void);
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if ((FRAGP)->fr_type == rs_align_code) \
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ppc_handle_align (FRAGP);
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extern unsigned int ppc_nop_select (void);
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#define NOP_OPCODE ppc_nop_select ()
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extern void ppc_handle_align (struct frag *);
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extern void ppc_frag_check (struct frag *);
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@ -0,0 +1,19 @@
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#as:
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#objdump: -dr
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.*
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Disassembly of section \.text:
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0+ <\.text>:
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0: (60 00 00 00|00 00 00 60) .*
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4: (60 00 00 00|00 00 00 60) .*
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8: (60 00 00 00|00 00 00 60) .*
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c: (60 42 00 00|00 00 42 60) .*
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10: (60 00 00 00|00 00 00 60) .*
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14: (60 42 00 00|00 00 42 60) .*
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18: (60 00 00 00|00 00 00 60) .*
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1c: (60 21 00 00|00 00 21 60) .*
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20: (60 00 00 00|00 00 00 60) .*
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24: (60 00 00 00|00 00 00 60) .*
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#pass
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@ -0,0 +1,19 @@
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.machine power9
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nop
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.p2align 3
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.machine power8
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nop
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.p2align 3
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.machine power7
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nop
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.p2align 3
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.machine power6
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nop
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.p2align 3
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.machine power5
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nop
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.p2align 3
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@ -51,6 +51,7 @@ if { [istarget "*-*-aix*"]
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run_dump_test "test2xcoff32"
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run_dump_test "altivec_xcoff"
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run_dump_test "altivec_xcoff64"
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run_dump_test "groupnop"
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}
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# These tests are currently ELF specific, only because nobody has
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@ -105,6 +106,7 @@ run_dump_test "altivec2"
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run_dump_test "altivec3"
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run_dump_test "broadway"
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run_dump_test "booke"
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run_dump_test "groupnop"
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run_dump_test "e500"
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run_list_test "e500-ill" "-me500"
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run_dump_test "ppc750ps"
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