* config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set
correctly for all 16 bit relocs. Return BFD_RELOC_NONE if reloc isn't recognized, not BFD_RELOC_XC16X_SOF. testsuite: * gas/xc16x/shlrol.s: Specify constant shift amount. * gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
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@ -1,3 +1,9 @@
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2009-10-19 Doug Evans <dje@sebabeach.org>
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* config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set
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correctly for all 16 bit relocs. Return BFD_RELOC_NONE if reloc
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isn't recognized, not BFD_RELOC_XC16X_SOF.
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2009-10-18 Alan Modra <amodra@bigpond.net.au>
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* as.h (know): Don't define as empty.
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@ -154,38 +154,46 @@ md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
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switch (operand->type)
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{
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case XC16X_OPERAND_REL:
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/* ??? Adjust size? */
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fixP->fx_where += 1;
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fixP->fx_pcrel = 1;
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return BFD_RELOC_8_PCREL;
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case XC16X_OPERAND_CADDR:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_16;
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case XC16X_OPERAND_UIMM7:
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/* ??? Adjust size? */
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fixP->fx_where += 1;
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fixP->fx_pcrel = 1;
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return BFD_RELOC_8_PCREL;
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case XC16X_OPERAND_UIMM16:
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case XC16X_OPERAND_MEMORY:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_16;
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case XC16X_OPERAND_UPOF16:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_XC16X_POF;
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case XC16X_OPERAND_UPAG16:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_XC16X_PAG;
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case XC16X_OPERAND_USEG8:
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/* ??? This is an 8 bit field, why the 16 bit reloc? */
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fixP->fx_where += 1;
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return BFD_RELOC_XC16X_SEG;
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case XC16X_OPERAND_USEG16:
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case XC16X_OPERAND_USOF16:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_XC16X_SOF;
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@ -193,8 +201,7 @@ md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
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break;
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}
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fixP->fx_where += 2;
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return BFD_RELOC_XC16X_SOF;
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return BFD_RELOC_NONE;
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}
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/* Write a value out to the object file, using the appropriate endianness. */
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@ -1,3 +1,8 @@
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2009-10-19 Doug Evans <dje@sebabeach.org>
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* gas/xc16x/shlrol.s: Specify constant shift amount.
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* gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
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2009-10-18 Vincent Rivière <vincent.riviere@freesbee.fr>
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* gas/all/weakref1u.d: Exclude more aout targets.
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@ -3,12 +3,12 @@
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xc16x_shlrol:
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shl r0,r1
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shl r0,#a
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shl r0,#4
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shr r0,r1
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shr r0,#a
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shr r0,#4
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rol r0,r1
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rol r0,#a
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rol r0,#4
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ror r0,r1
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ror r0,#a
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ror r0,#4
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ashr r0,r1
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ashr r0,#a
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ashr r0,#4
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@ -557,15 +557,15 @@ proc do_xc16x_shlrol {} {
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while 1 {
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expect {
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-re " +\[0-9\]+ 0000 4C01\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0002 5C00\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0002 5C40\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0004 6C01\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0006 7C00\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0006 7C40\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0008 0C01\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 000a 1C00\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 000a 1C40\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 000c 2C01\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 000e 3C00\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 000e 3C40\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0010 AC01\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0012 BC00\[^\n\]*\n" { set x [expr $x+1] }
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-re " +\[0-9\]+ 0012 BC40\[^\n\]*\n" { set x [expr $x+1] }
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timeout { perror "timeout\n; break }
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eof { break }
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}
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