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Add support for msp430.

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This commit is contained in:
Nick Clifton 2002-12-30 19:25:13 +00:00
parent 3f8173588e
commit 2469cfa284
92 changed files with 5837 additions and 611 deletions
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15
bfd/ChangeLog
View File

@ -1,3 +1,18 @@
2002-12-30 Dmitry Diky <diwil@mail.ru>
* Makefile.am: Add msp430 target.
* configure.in: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* archures.c: Add msp430 architecture vector.
* config.bfd: Likewise.
* reloc.c: Add msp430 relocs.
* targets.c: Add msp320 target.
* cpu-msp430.c: New file: msp430 cpu detection.
* elf32-msp430.c: New file: msp430 reloc processing.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
2002-12-28 Jakub Jelinek <jakub@redhat.com>
* elf.c (elf_sort_sections): Don't reorder .tbss.

9
bfd/Makefile.am
View File

@ -80,6 +80,7 @@ ALL_MACHINES = \
cpu-mcore.lo \
cpu-mips.lo \
cpu-mmix.lo \
cpu-msp430.c \
cpu-or32.lo \
cpu-ns32k.lo \
cpu-openrisc.lo \
@ -132,6 +133,7 @@ ALL_MACHINES_CFILES = \
cpu-mcore.c \
cpu-mips.c \
cpu-mmix.c \
cpu-msp430.c \
cpu-or32.c \
cpu-ns32k.c \
cpu-openrisc.c \
@ -231,6 +233,7 @@ BFD32_BACKENDS = \
elf32-mcore.lo \
elfxx-mips.lo \
elf32-mips.lo \
elf32-msp430.c \
elf32-openrisc.lo \
elf32-or32.lo \
elf32-pj.lo \
@ -388,6 +391,7 @@ BFD32_BACKENDS_CFILES = \
elf32-mcore.c \
elfxx-mips.c \
elf32-mips.c \
elf32-msp430.c \
elf32-openrisc.c \
elf32-or32.c \
elf32-pj.c \
@ -927,6 +931,7 @@ cpu-m10300.lo: cpu-m10300.c $(INCDIR)/filenames.h
cpu-mcore.lo: cpu-mcore.c $(INCDIR)/filenames.h
cpu-mips.lo: cpu-mips.c $(INCDIR)/filenames.h
cpu-mmix.lo: cpu-mmix.c $(INCDIR)/filenames.h
cpu-msp430.lo: cpu-msp430.c $(INCDIR)/filenames.h
cpu-or32.lo: cpu-or32.c $(INCDIR)/filenames.h
cpu-ns32k.lo: cpu-ns32k.c $(INCDIR)/filenames.h ns32k.h
cpu-openrisc.lo: cpu-openrisc.c $(INCDIR)/filenames.h
@ -1212,6 +1217,10 @@ elf32-mips.lo: elf32-mips.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/ecoff.h $(INCDIR)/coff/mips.h \
$(INCDIR)/coff/external.h ecoffswap.h elf32-target.h
elf32-msp430.lo: elf32-msp430.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/msp430.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32-openrisc.lo: elf32-openrisc.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/openrisc.h \

9
bfd/Makefile.in
View File

@ -205,6 +205,7 @@ ALL_MACHINES = \
cpu-mcore.lo \
cpu-mips.lo \
cpu-mmix.lo \
cpu-msp430.c \
cpu-or32.lo \
cpu-ns32k.lo \
cpu-openrisc.lo \
@ -258,6 +259,7 @@ ALL_MACHINES_CFILES = \
cpu-mcore.c \
cpu-mips.c \
cpu-mmix.c \
cpu-msp430.c \
cpu-or32.c \
cpu-ns32k.c \
cpu-openrisc.c \
@ -358,6 +360,7 @@ BFD32_BACKENDS = \
elf32-mcore.lo \
elfxx-mips.lo \
elf32-mips.lo \
elf32-msp430.c \
elf32-openrisc.lo \
elf32-or32.lo \
elf32-pj.lo \
@ -516,6 +519,7 @@ BFD32_BACKENDS_CFILES = \
elf32-mcore.c \
elfxx-mips.c \
elf32-mips.c \
elf32-msp430.c \
elf32-openrisc.c \
elf32-or32.c \
elf32-pj.c \
@ -1460,6 +1464,7 @@ cpu-m10300.lo: cpu-m10300.c $(INCDIR)/filenames.h
cpu-mcore.lo: cpu-mcore.c $(INCDIR)/filenames.h
cpu-mips.lo: cpu-mips.c $(INCDIR)/filenames.h
cpu-mmix.lo: cpu-mmix.c $(INCDIR)/filenames.h
cpu-msp430.lo: cpu-msp430.c $(INCDIR)/filenames.h
cpu-or32.lo: cpu-or32.c $(INCDIR)/filenames.h
cpu-ns32k.lo: cpu-ns32k.c $(INCDIR)/filenames.h ns32k.h
cpu-openrisc.lo: cpu-openrisc.c $(INCDIR)/filenames.h
@ -1745,6 +1750,10 @@ elf32-mips.lo: elf32-mips.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/ecoff.h $(INCDIR)/coff/mips.h \
$(INCDIR)/coff/external.h ecoffswap.h elf32-target.h
elf32-msp430.lo: elf32-msp430.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/msp430.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32-openrisc.lo: elf32-openrisc.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/openrisc.h \

16
bfd/archures.c
View File

@ -286,6 +286,20 @@ DESCRIPTION
. bfd_arch_mmix, {* Donald Knuth's educational processor. *}
. bfd_arch_xstormy16,
.#define bfd_mach_xstormy16 1
. bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
.#define bfd_mach_msp110 110
.#define bfd_mach_msp11 11
.#define bfd_mach_msp12 12
.#define bfd_mach_msp13 13
.#define bfd_mach_msp14 14
.#define bfd_mach_msp41 41
.#define bfd_mach_msp31 31
.#define bfd_mach_msp32 32
.#define bfd_mach_msp33 33
.#define bfd_mach_msp43 43
.#define bfd_mach_msp44 44
.#define bfd_mach_msp15 15
.#define bfd_mach_msp16 16
. bfd_arch_last
. };
*/
@ -355,6 +369,7 @@ extern const bfd_arch_info_type bfd_mips_arch;
extern const bfd_arch_info_type bfd_mmix_arch;
extern const bfd_arch_info_type bfd_mn10200_arch;
extern const bfd_arch_info_type bfd_mn10300_arch;
extern const bfd_arch_info_type bfd_msp430_arch;
extern const bfd_arch_info_type bfd_ns32k_arch;
extern const bfd_arch_info_type bfd_openrisc_arch;
extern const bfd_arch_info_type bfd_or32_arch;
@ -412,6 +427,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_mmix_arch,
&bfd_mn10200_arch,
&bfd_mn10300_arch,
&bfd_msp430_arch,
&bfd_ns32k_arch,
&bfd_openrisc_arch,
&bfd_or32_arch,

21
bfd/bfd-in2.h
View File

@ -1713,6 +1713,20 @@ enum bfd_architecture
bfd_arch_mmix, /* Donald Knuth's educational processor. */
bfd_arch_xstormy16,
#define bfd_mach_xstormy16 1
bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
#define bfd_mach_msp110 110
#define bfd_mach_msp11 11
#define bfd_mach_msp12 12
#define bfd_mach_msp13 13
#define bfd_mach_msp14 14
#define bfd_mach_msp41 41
#define bfd_mach_msp31 31
#define bfd_mach_msp32 32
#define bfd_mach_msp33 33
#define bfd_mach_msp43 43
#define bfd_mach_msp44 44
#define bfd_mach_msp15 15
#define bfd_mach_msp16 16
bfd_arch_last
};
@ -3246,6 +3260,13 @@ to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */
BFD_RELOC_VAX_GLOB_DAT,
BFD_RELOC_VAX_JMP_SLOT,
BFD_RELOC_VAX_RELATIVE,
/* msp430 specific relocation codes */
BFD_RELOC_MSP430_10_PCREL,
BFD_RELOC_MSP430_16_PCREL,
BFD_RELOC_MSP430_16,
BFD_RELOC_MSP430_16_PCREL_BYTE,
BFD_RELOC_MSP430_16_BYTE,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *

4
bfd/config.bfd
View File

@ -807,6 +807,10 @@ case "${targ}" in
targ_defvec=bfd_elf32_mn10300_vec
;;
msp430-*-*)
targ_defvec=bfd_elf32_msp430_vec
;;
ns32k-pc532-mach* | ns32k-pc532-ux*)
targ_defvec=pc532machaout_vec
targ_underscore=yes

29
bfd/configure vendored
View File

@ -6108,6 +6108,7 @@ do
bfd_elf32_mcore_little_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
bfd_elf32_mn10200_vec) tb="$tb elf-m10200.lo elf32.lo $elf" ;;
bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
@ -6358,10 +6359,10 @@ case ${host64}-${target64}-${want64} in
if test -n "$GCC" ; then
bad_64bit_gcc=no;
echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6
echo "configure:6362: checking for gcc version with buggy 64-bit support" >&5
echo "configure:6363: checking for gcc version with buggy 64-bit support" >&5
# Add more tests for gcc versions with non-working 64-bit support here.
cat > conftest.$ac_ext <<EOF
#line 6365 "configure"
#line 6366 "configure"
#include "confdefs.h"
:__GNUC__:__GNUC_MINOR__:__i386__:
EOF
@ -6407,17 +6408,17 @@ for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
echo "configure:6411: checking for $ac_hdr" >&5
echo "configure:6412: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6416 "configure"
#line 6417 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
{ (eval echo configure:6421: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
{ (eval echo configure:6422: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@ -6446,12 +6447,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6450: checking for $ac_func" >&5
echo "configure:6451: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6455 "configure"
#line 6456 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6474,7 +6475,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6478: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6479: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@ -6499,7 +6500,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
echo "configure:6503: checking for working mmap" >&5
echo "configure:6504: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@ -6507,7 +6508,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
#line 6511 "configure"
#line 6512 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@ -6660,7 +6661,7 @@ main()
}
EOF
if { (eval echo configure:6664: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
if { (eval echo configure:6665: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@ -6685,12 +6686,12 @@ fi
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6689: checking for $ac_func" >&5
echo "configure:6690: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6694 "configure"
#line 6695 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6713,7 +6714,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6717: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6718: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else

1
bfd/configure.in
View File

@ -604,6 +604,7 @@ do
bfd_elf32_mcore_little_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
bfd_elf32_mn10200_vec) tb="$tb elf-m10200.lo elf32.lo $elf" ;;
bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;

107
bfd/cpu-msp430.c Normal file
View File

@ -0,0 +1,107 @@
/* BFD library support routines for the MSP architecture.
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
static const bfd_arch_info_type *compatible
PARAMS ((const bfd_arch_info_type *, const bfd_arch_info_type *));
#define N(addr_bits, machine, print, default, next) \
{ \
16, /* 16 bits in a word. */ \
addr_bits, /* Bits in an address. */ \
8, /* 8 bits in a byte. */ \
bfd_arch_msp430, \
machine, /* Machine number. */ \
"msp430", /* Architecture name. */ \
print, /* Printable name. */ \
1, /* Section align power. */ \
default, /* The default machine. */ \
compatible, \
bfd_default_scan, \
next \
}
static const bfd_arch_info_type arch_info_struct[] =
{
/* msp430x11x. */
N (16, bfd_mach_msp11, "msp:11", FALSE, & arch_info_struct[1]),
/* msp430x12x. */
N (16, bfd_mach_msp12, "msp:12", FALSE, & arch_info_struct[2]),
/* msp430x13x. */
N (16, bfd_mach_msp13, "msp:13", FALSE, & arch_info_struct[3]),
/* msp430x14x. */
N (16, bfd_mach_msp14, "msp:14", FALSE, & arch_info_struct[4]),
/* msp430x31x. */
N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[5]),
/* msp430x32x. */
N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[6]),
/* msp430x33x. */
N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[7]),
/* msp430x41x. */
N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[8]),
/* msp430x43x. */
N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[9]),
/* msp430x44x. */
N (16, bfd_mach_msp43, "msp:44", FALSE, & arch_info_struct[10]),
/* msp430x15x. */
N (16, bfd_mach_msp15, "msp:15", FALSE, & arch_info_struct[11]),
/* msp430x16x. */
N (16, bfd_mach_msp16, "msp:16", FALSE, & arch_info_struct[12]),
/* msp430x11x1. */
N (16, bfd_mach_msp110, "msp:110", FALSE, NULL)
};
const bfd_arch_info_type bfd_msp430_arch =
N (16, bfd_mach_msp14, "msp:14", TRUE, & arch_info_struct[0]);
/* This routine is provided two arch_infos and works out which MSP
machine which would be compatible with both and returns a pointer
to its info structure. */
static const bfd_arch_info_type *
compatible (a,b)
const bfd_arch_info_type * a;
const bfd_arch_info_type * b;
{
/* If a & b are for different architectures we can do nothing. */
if (a->arch != b->arch)
return NULL;
if (a->mach <= b->mach)
return b;
return a;
}

720
bfd/elf32-msp430.c Normal file
View File

@ -0,0 +1,720 @@
/* MSP430-specific support for 32-bit ELF
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libiberty.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/msp430.h"
static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
PARAMS ((bfd *, bfd_reloc_code_real_type));
static void msp430_info_to_howto_rela
PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
static asection *elf32_msp430_gc_mark_hook
PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *,
struct elf_link_hash_entry *, Elf_Internal_Sym *));
static bfd_boolean elf32_msp430_gc_sweep_hook
PARAMS ((bfd *, struct bfd_link_info *, asection *,
const Elf_Internal_Rela *));
static bfd_boolean elf32_msp430_check_relocs
PARAMS ((bfd *, struct bfd_link_info *, asection *,
const Elf_Internal_Rela *));
static bfd_reloc_status_type msp430_final_link_relocate
PARAMS ((reloc_howto_type *, bfd *, asection *, bfd_byte *,
Elf_Internal_Rela *, bfd_vma));
static bfd_boolean elf32_msp430_relocate_section
PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
static void bfd_elf_msp430_final_write_processing
PARAMS ((bfd *, bfd_boolean));
static bfd_boolean elf32_msp430_object_p
PARAMS ((bfd *));
static void elf32_msp430_post_process_headers
PARAMS ((bfd *, struct bfd_link_info *));
/* Use RELA instead of REL. */
#undef USE_REL
static reloc_howto_type elf_msp430_howto_table[] =
{
HOWTO (R_MSP430_NONE, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MSP430_NONE", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_MSP430_32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MSP430_32", /* name */
FALSE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 13 bit PC relative relocation. */
HOWTO (R_MSP430_10_PCREL, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
10, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MSP430_13_PCREL", /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
TRUE), /* pcrel_offset */
/* A 16 bit absolute relocation. */
HOWTO (R_MSP430_16, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MSP430_16", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 16 bit absolute relocation for command address. */
HOWTO (R_MSP430_16_PCREL, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MSP430_16_PCREL", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* A 16 bit absolute relocation, byte operations. */
HOWTO (R_MSP430_16_BYTE, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MSP430_16_BYTE", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 16 bit absolute relocation for command address. */
HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MSP430_16_PCREL_BYTE", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE) /* pcrel_offset */
};
/* Map BFD reloc types to MSP430 ELF reloc types. */
struct msp430_reloc_map
{
bfd_reloc_code_real_type bfd_reloc_val;
unsigned int elf_reloc_val;
};
static const struct msp430_reloc_map msp430_reloc_map[] =
{
{BFD_RELOC_NONE, R_MSP430_NONE},
{BFD_RELOC_32, R_MSP430_32},
{BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
{BFD_RELOC_16, R_MSP430_16_BYTE},
{BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
{BFD_RELOC_MSP430_16, R_MSP430_16},
{BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
{BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE}
};
static reloc_howto_type *
bfd_elf32_bfd_reloc_type_lookup (abfd, code)
bfd *abfd ATTRIBUTE_UNUSED;
bfd_reloc_code_real_type code;
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
if (msp430_reloc_map[i].bfd_reloc_val == code)
return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
return NULL;
}
/* Set the howto pointer for an MSP430 ELF reloc. */
static void
msp430_info_to_howto_rela (abfd, cache_ptr, dst)
bfd *abfd ATTRIBUTE_UNUSED;
arelent *cache_ptr;
Elf_Internal_Rela *dst;
{
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
cache_ptr->howto = &elf_msp430_howto_table[r_type];
}
static asection *
elf32_msp430_gc_mark_hook (sec, info, rel, h, sym)
asection *sec;
struct bfd_link_info *info ATTRIBUTE_UNUSED;
Elf_Internal_Rela *rel;
struct elf_link_hash_entry *h;
Elf_Internal_Sym *sym;
{
if (h != NULL)
{
switch (ELF32_R_TYPE (rel->r_info))
{
default:
switch (h->root.type)
{
case bfd_link_hash_defined:
case bfd_link_hash_defweak:
return h->root.u.def.section;
case bfd_link_hash_common:
return h->root.u.c.p->section;
default:
break;
}
}
}
else
return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
return NULL;
}
static bfd_boolean
elf32_msp430_gc_sweep_hook (abfd, info, sec, relocs)
bfd *abfd ATTRIBUTE_UNUSED;
struct bfd_link_info *info ATTRIBUTE_UNUSED;
asection *sec ATTRIBUTE_UNUSED;
const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
{
/* We don't use got and plt entries for msp430. */
return TRUE;
}
/* Look through the relocs for a section during the first phase.
Since we don't do .gots or .plts, we just need to consider the
virtual table relocs for gc. */
static bfd_boolean
elf32_msp430_check_relocs (abfd, info, sec, relocs)
bfd *abfd;
struct bfd_link_info *info;
asection *sec;
const Elf_Internal_Rela *relocs;
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
const Elf_Internal_Rela *rel;
const Elf_Internal_Rela *rel_end;
if (info->relocateable)
return TRUE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
sym_hashes_end =
sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
{
struct elf_link_hash_entry *h;
unsigned long r_symndx;
r_symndx = ELF32_R_SYM (rel->r_info);
if (r_symndx < symtab_hdr->sh_info)
h = NULL;
else
h = sym_hashes[r_symndx - symtab_hdr->sh_info];
}
return TRUE;
}
/* Perform a single relocation. By default we use the standard BFD
routines, but a few relocs, we have to do them ourselves. */
static bfd_reloc_status_type
msp430_final_link_relocate (howto, input_bfd, input_section,
contents, rel, relocation)
reloc_howto_type *howto;
bfd *input_bfd;
asection *input_section;
bfd_byte *contents;
Elf_Internal_Rela *rel;
bfd_vma relocation;
{
bfd_reloc_status_type r = bfd_reloc_ok;
bfd_vma x;
bfd_signed_vma srel;
switch (howto->type)
{
case R_MSP430_10_PCREL:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
srel -= rel->r_offset;
srel -= 2; /* Branch instructions add 2 to the PC... */
srel -= (input_section->output_section->vma +
input_section->output_offset);
if (srel & 1)
return bfd_reloc_outofrange;
/* MSP430 addresses commands as words. */
srel >>= 1;
/* Check for an overflow. */
if (srel < -512 || srel > 511)
return bfd_reloc_overflow;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xfc00) | (srel & 0x3ff);
bfd_put_16 (input_bfd, x, contents);
break;
case R_MSP430_16_PCREL:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
srel -= rel->r_offset;
/* Only branch instructions add 2 to the PC... */
srel -= (input_section->output_section->vma +
input_section->output_offset);
if (srel & 1)
return bfd_reloc_outofrange;
bfd_put_16 (input_bfd, srel & 0xffff, contents);
break;
case R_MSP430_16_PCREL_BYTE:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
srel -= rel->r_offset;
/* Only branch instructions add 2 to the PC... */
srel -= (input_section->output_section->vma +
input_section->output_offset);
bfd_put_16 (input_bfd, srel & 0xffff, contents);
break;
case R_MSP430_16_BYTE:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
bfd_put_16 (input_bfd, srel & 0xffff, contents);
break;
case R_MSP430_16:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
if (srel & 1)
return bfd_reloc_notsupported;
bfd_put_16 (input_bfd, srel & 0xffff, contents);
break;
default:
r = _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset,
relocation, rel->r_addend);
}
return r;
}
/* Relocate an MSP430 ELF section. */
static bfd_boolean
elf32_msp430_relocate_section (output_bfd, info, input_bfd, input_section,
contents, relocs, local_syms, local_sections)
bfd *output_bfd ATTRIBUTE_UNUSED;
struct bfd_link_info *info;
bfd *input_bfd;
asection *input_section;
bfd_byte *contents;
Elf_Internal_Rela *relocs;
Elf_Internal_Sym *local_syms;
asection **local_sections;
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
Elf_Internal_Rela *rel;
Elf_Internal_Rela *relend;
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
relend = relocs + input_section->reloc_count;
for (rel = relocs; rel < relend; rel++)
{
reloc_howto_type *howto;
unsigned long r_symndx;
Elf_Internal_Sym *sym;
asection *sec;
struct elf_link_hash_entry *h;
bfd_vma relocation;
bfd_reloc_status_type r;
const char *name = NULL;
int r_type;
/* This is a final link. */
r_type = ELF32_R_TYPE (rel->r_info);
r_symndx = ELF32_R_SYM (rel->r_info);
howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
h = NULL;
sym = NULL;
sec = NULL;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
sec = local_sections[r_symndx];
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, sec, rel);
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
}
else
{
h = sym_hashes[r_symndx - symtab_hdr->sh_info];
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
name = h->root.root.string;
if (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
{
sec = h->root.u.def.section;
relocation = (h->root.u.def.value
+ sec->output_section->vma + sec->output_offset);
}
else if (h->root.type == bfd_link_hash_undefweak)
{
relocation = 0;
}
else
{
if (!((*info->callbacks->undefined_symbol)
(info, h->root.root.string, input_bfd,
input_section, rel->r_offset, TRUE)))
return FALSE;
relocation = 0;
}
}
r = msp430_final_link_relocate (howto, input_bfd, input_section,
contents, rel, relocation);
if (r != bfd_reloc_ok)
{
const char *msg = (const char *) NULL;
switch (r)
{
case bfd_reloc_overflow:
r = info->callbacks->reloc_overflow
(info, name, howto->name, (bfd_vma) 0,
input_bfd, input_section, rel->r_offset);
break;
case bfd_reloc_undefined:
r = info->callbacks->undefined_symbol
(info, name, input_bfd, input_section, rel->r_offset, TRUE);
break;
case bfd_reloc_outofrange:
msg = _("internal error: out of range error");
break;
case bfd_reloc_notsupported:
msg = _("internal error: unsupported relocation error");
break;
case bfd_reloc_dangerous:
msg = _("internal error: dangerous relocation");
break;
default:
msg = _("internal error: unknown error");
break;
}
if (msg)
r = info->callbacks->warning
(info, msg, name, input_bfd, input_section, rel->r_offset);
if (!r)
return FALSE;
}
}
return TRUE;
}
/* The final processing done just before writing out a MSP430 ELF object
file. This gets the MSP430 architecture right based on the machine
number. */
static void
bfd_elf_msp430_final_write_processing (abfd, linker)
bfd *abfd;
bfd_boolean linker ATTRIBUTE_UNUSED;
{
unsigned long val;
switch (bfd_get_mach (abfd))
{
default:
case bfd_mach_msp12:
val = E_MSP430_MACH_MSP430x12;
break;
case bfd_mach_msp110:
val = E_MSP430_MACH_MSP430x11x1;
break;
case bfd_mach_msp11:
val = E_MSP430_MACH_MSP430x11;
break;
case bfd_mach_msp13:
val = E_MSP430_MACH_MSP430x13;
break;
case bfd_mach_msp14:
val = E_MSP430_MACH_MSP430x14;
break;
case bfd_mach_msp41:
val = E_MSP430_MACH_MSP430x41;
break;
case bfd_mach_msp43:
val = E_MSP430_MACH_MSP430x43;
break;
case bfd_mach_msp44:
val = E_MSP430_MACH_MSP430x44;
break;
case bfd_mach_msp31:
val = E_MSP430_MACH_MSP430x31;
break;
case bfd_mach_msp32:
val = E_MSP430_MACH_MSP430x32;
break;
case bfd_mach_msp33:
val = E_MSP430_MACH_MSP430x33;
break;
case bfd_mach_msp15:
val = E_MSP430_MACH_MSP430x15;
break;
case bfd_mach_msp16:
val = E_MSP430_MACH_MSP430x16;
break;
}
elf_elfheader (abfd)->e_machine = EM_MSP430;
elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
elf_elfheader (abfd)->e_flags |= val;
}
/* Set the right machine number. */
static bfd_boolean
elf32_msp430_object_p (abfd)
bfd *abfd;
{
int e_set = bfd_mach_msp14;
if (elf_elfheader (abfd)->e_machine == EM_MSP430
|| elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
{
int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
switch (e_mach)
{
default:
case E_MSP430_MACH_MSP430x12:
e_set = bfd_mach_msp12;
break;
case E_MSP430_MACH_MSP430x11:
e_set = bfd_mach_msp11;
break;
case E_MSP430_MACH_MSP430x11x1:
e_set = bfd_mach_msp110;
break;
case E_MSP430_MACH_MSP430x13:
e_set = bfd_mach_msp13;
break;
case E_MSP430_MACH_MSP430x14:
e_set = bfd_mach_msp14;
break;
case E_MSP430_MACH_MSP430x41:
e_set = bfd_mach_msp41;
break;
case E_MSP430_MACH_MSP430x31:
e_set = bfd_mach_msp31;
break;
case E_MSP430_MACH_MSP430x32:
e_set = bfd_mach_msp32;
break;
case E_MSP430_MACH_MSP430x33:
e_set = bfd_mach_msp33;
break;
case E_MSP430_MACH_MSP430x43:
e_set = bfd_mach_msp43;
break;
case E_MSP430_MACH_MSP430x44:
e_set = bfd_mach_msp44;
break;
case E_MSP430_MACH_MSP430x15:
e_set = bfd_mach_msp15;
break;
case E_MSP430_MACH_MSP430x16:
e_set = bfd_mach_msp16;
break;
}
}
return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
}
static void
elf32_msp430_post_process_headers (abfd, link_info)
bfd *abfd;
struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
{
Elf_Internal_Ehdr *i_ehdrp; /* ELF file header, internal form. */
i_ehdrp = elf_elfheader (abfd);
#ifndef ELFOSABI_STANDALONE
#define ELFOSABI_STANDALONE 255
#endif
i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_STANDALONE;
}
#define ELF_ARCH bfd_arch_msp430
#define ELF_MACHINE_CODE EM_MSP430
#define ELF_MACHINE_ALT1 EM_MSP430_OLD
#define ELF_MAXPAGESIZE 1
#define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
#define TARGET_LITTLE_NAME "elf32-msp430"
#define elf_info_to_howto msp430_info_to_howto_rela
#define elf_info_to_howto_rel NULL
#define elf_backend_relocate_section elf32_msp430_relocate_section
#define elf_backend_gc_mark_hook elf32_msp430_gc_mark_hook
#define elf_backend_gc_sweep_hook elf32_msp430_gc_sweep_hook
#define elf_backend_check_relocs elf32_msp430_check_relocs
#define elf_backend_can_gc_sections 1
#define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
#define elf_backend_object_p elf32_msp430_object_p
#define elf_backend_post_process_headers elf32_msp430_post_process_headers
#include "elf32-target.h"

5
bfd/libbfd.h
View File

@ -1373,6 +1373,11 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_VAX_GLOB_DAT",
"BFD_RELOC_VAX_JMP_SLOT",
"BFD_RELOC_VAX_RELATIVE",
"BFD_RELOC_MSP430_10_PCREL",
"BFD_RELOC_MSP430_16_PCREL",
"BFD_RELOC_MSP430_16",
"BFD_RELOC_MSP430_16_PCREL_BYTE",
"BFD_RELOC_MSP430_16_BYTE",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif

13
bfd/reloc.c
View File

@ -3613,6 +3613,19 @@ ENUMX
BFD_RELOC_VAX_RELATIVE
ENUMDOC
Relocations used by VAX ELF.
ENUM
BFD_RELOC_MSP430_10_PCREL
ENUMX
BFD_RELOC_MSP430_16_PCREL
ENUMX
BFD_RELOC_MSP430_16
ENUMX
BFD_RELOC_MSP430_16_PCREL_BYTE
ENUMX
BFD_RELOC_MSP430_16_BYTE
ENUMDOC
msp430 specific relocation codes
ENDSENUM
BFD_RELOC_UNUSED

2
bfd/targets.c
View File

@ -547,6 +547,7 @@ extern const bfd_target bfd_elf32_mcore_big_vec;
extern const bfd_target bfd_elf32_mcore_little_vec;
extern const bfd_target bfd_elf32_mn10200_vec;
extern const bfd_target bfd_elf32_mn10300_vec;
extern const bfd_target bfd_elf32_msp430_vec;
extern const bfd_target bfd_elf32_nbigmips_vec;
extern const bfd_target bfd_elf32_nlittlemips_vec;
extern const bfd_target bfd_elf32_ntradbigmips_vec;
@ -833,6 +834,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_mcore_little_vec,
&bfd_elf32_mn10200_vec,
&bfd_elf32_mn10300_vec,
&bfd_elf32_msp430_vec,
#ifdef BFD64
&bfd_elf32_nbigmips_vec,
&bfd_elf32_nlittlemips_vec,

6
binutils/ChangeLog
View File

@ -1,3 +1,9 @@
2002-12-30 Dmitry Diky <diwil@mail.ru>
* Makefile.am: Add msp430 target.
* Makefile.in: Regenerate.
* readelf.c: Add support for msp430 target.
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Document MIPS -M options.

12
binutils/Makefile.am
View File

@ -470,12 +470,12 @@ readelf.o: readelf.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/elf/i960.h $(INCDIR)/elf/ia64.h $(INCDIR)/elf/ip2k.h \
$(INCDIR)/elf/m32r.h $(INCDIR)/elf/m68k.h $(INCDIR)/elf/m68hc11.h \
$(INCDIR)/elf/mcore.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/mmix.h \
$(INCDIR)/elf/mn10200.h $(INCDIR)/elf/mn10300.h $(INCDIR)/elf/or32.h \
$(INCDIR)/elf/pj.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/s390.h \
$(INCDIR)/elf/sh.h $(INCDIR)/elf/sparc.h $(INCDIR)/elf/v850.h \
$(INCDIR)/elf/vax.h $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/xstormy16.h \
bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
unwind-ia64.h
$(INCDIR)/elf/mn10200.h $(INCDIR)/elf/mn10300.h $(INCDIR)/elf/msp430.h \
$(INCDIR)/elf/or32.h $(INCDIR)/elf/pj.h $(INCDIR)/elf/ppc.h \
$(INCDIR)/elf/s390.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/vax.h $(INCDIR)/elf/x86-64.h \
$(INCDIR)/elf/xstormy16.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h unwind-ia64.h
rename.o: rename.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h

12
binutils/Makefile.in
View File

@ -1198,12 +1198,12 @@ readelf.o: readelf.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/elf/i960.h $(INCDIR)/elf/ia64.h $(INCDIR)/elf/ip2k.h \
$(INCDIR)/elf/m32r.h $(INCDIR)/elf/m68k.h $(INCDIR)/elf/m68hc11.h \
$(INCDIR)/elf/mcore.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/mmix.h \
$(INCDIR)/elf/mn10200.h $(INCDIR)/elf/mn10300.h $(INCDIR)/elf/or32.h \
$(INCDIR)/elf/pj.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/s390.h \
$(INCDIR)/elf/sh.h $(INCDIR)/elf/sparc.h $(INCDIR)/elf/v850.h \
$(INCDIR)/elf/vax.h $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/xstormy16.h \
bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
unwind-ia64.h
$(INCDIR)/elf/mn10200.h $(INCDIR)/elf/mn10300.h $(INCDIR)/elf/msp430.h \
$(INCDIR)/elf/or32.h $(INCDIR)/elf/pj.h $(INCDIR)/elf/ppc.h \
$(INCDIR)/elf/s390.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/vax.h $(INCDIR)/elf/x86-64.h \
$(INCDIR)/elf/xstormy16.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h unwind-ia64.h
rename.o: rename.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h

8
binutils/readelf.c
View File

@ -75,6 +75,7 @@
#include "elf/mmix.h"
#include "elf/mn10200.h"
#include "elf/mn10300.h"
#include "elf/msp430.h"
#include "elf/or32.h"
#include "elf/pj.h"
#include "elf/ppc.h"
@ -756,6 +757,8 @@ guess_is_rela (e_machine)
case EM_S390:
case EM_S390_OLD:
case EM_MMIX:
case EM_MSP430:
case EM_MSP430_OLD:
case EM_XSTORMY16:
case EM_VAX:
case EM_IP2K:
@ -1154,6 +1157,11 @@ dump_relocations (file, rel_offset, rel_size, symtab, nsyms, strtab, is_rela)
rtype = elf_mmix_reloc_type (type);
break;
case EM_MSP430:
case EM_MSP430_OLD:
rtype = elf_msp430_reloc_type (type);
break;
case EM_PPC:
case EM_PPC64:
rtype = elf_ppc_reloc_type (type);

15
gas/ChangeLog
View File

@ -1,3 +1,18 @@
2002-12-30 Dmitry Diky <diwil@mail.ru>
* configure.in: Add msp430 target.
* configure: Regenerate.
* Makefile.am: Add msp430 target.
* Makefile.in: Regenerate.
* config/tc-msp430.c: New file: msp430 assembler.
* config/tc-msp430.h: New file: target macros for msp430.
* doc/Makefile.am: Add msp430 target.
* doc/Makefile.in: Regenerate.
* doc/as.texinfo: Include msp430 documenation.
* doc/all.texi: Enable msp430 documentation.
* doc/c-msp430.texi: New file: document msp430 specific features
of the assembler.
2002-12-25 Alexandre Oliva <aoliva@redhat.com>
* dwarf2dbg.c (DWARF2_ADDR_SIZE): New macro.

22
gas/Makefile.am
View File

@ -66,6 +66,7 @@ CPU_TYPES = \
mmix \
mn10200 \
mn10300 \
msp430 \
ns32k \
openrisc \
or32 \
@ -258,6 +259,7 @@ TARGET_CPU_CFILES = \
config/tc-mmix.c \
config/tc-mn10200.c \
config/tc-mn10300.c \
config/tc-msp430.c \
config/tc-ns32k.c \
config/tc-openrisc.c \
config/tc-or32.c \
@ -308,6 +310,7 @@ TARGET_CPU_HFILES = \
config/tc-mmix.h \
config/tc-mn10200.h \
config/tc-mn10300.h \
config/tc-msp430.h \
config/tc-ns32k.h \
config/tc-openrisc.h \
config/tc-or32.h \
@ -1298,6 +1301,13 @@ DEPTC_mn10300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/mn10300.h dwarf2dbg.h
DEPTC_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h
DEPTC_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h
DEPTC_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/opcode/ns32k.h $(INCDIR)/obstack.h
@ -1802,6 +1812,13 @@ DEPOBJ_mn10300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
$(INCDIR)/obstack.h subsegs.h
DEPOBJ_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/aout/aout64.h
DEPOBJ_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
@ -2190,6 +2207,11 @@ DEP_mn10300_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mn10300.h \
DEP_mn10300_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h
DEP_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h
DEP_ns32k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-ns32k.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_ns32k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ns32k.h \

28
gas/Makefile.in
View File

@ -177,6 +177,7 @@ CPU_TYPES = \
mmix \
mn10200 \
mn10300 \
msp430 \
ns32k \
openrisc \
or32 \
@ -375,6 +376,7 @@ TARGET_CPU_CFILES = \
config/tc-mmix.c \
config/tc-mn10200.c \
config/tc-mn10300.c \
config/tc-msp430.c \
config/tc-ns32k.c \
config/tc-openrisc.c \
config/tc-or32.c \
@ -426,6 +428,7 @@ TARGET_CPU_HFILES = \
config/tc-mmix.h \
config/tc-mn10200.h \
config/tc-mn10300.h \
config/tc-msp430.h \
config/tc-ns32k.h \
config/tc-openrisc.h \
config/tc-or32.h \
@ -1068,6 +1071,15 @@ DEPTC_mn10300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/mn10300.h dwarf2dbg.h
DEPTC_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h
DEPTC_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h
DEPTC_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/opcode/ns32k.h $(INCDIR)/obstack.h
@ -1685,6 +1697,15 @@ DEPOBJ_mn10300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
$(INCDIR)/obstack.h subsegs.h
DEPOBJ_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/aout/aout64.h
DEPOBJ_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
@ -2184,6 +2205,13 @@ DEP_mn10300_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h
DEP_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h
DEP_ns32k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-ns32k.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h

2
gas/config/tc-alpha.c
View File

@ -1519,6 +1519,7 @@ alpha_fix_adjustable (f)
we're preventing this in the other assemblers. Follow for now. */
return 0;
#ifdef OBJ_ELF
case BFD_RELOC_ALPHA_BRSGP:
/* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
let it get resolved at assembly time. */
@ -1551,6 +1552,7 @@ alpha_fix_adjustable (f)
f->fx_offset += offset;
return 1;
}
#endif
default:
return 1;

1552
gas/config/tc-msp430.c Normal file
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File diff suppressed because it is too large Load Diff

114
gas/config/tc-msp430.h Normal file
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@ -0,0 +1,114 @@
/* This file is tc-msp430.h
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
#ifndef BFD_ASSEMBLER
#error MSP430 support requires BFD_ASSEMBLER
#endif
#define TC_MSP430
/* By convention, you should define this macro in the `.h' file. For
example, `tc-m68k.h' defines `TC_M68K'. You might have to use this
if it is necessary to add CPU specific code to the object format
file. */
#define TARGET_FORMAT "elf32-msp430"
/* This macro is the BFD target name to use when creating the output
file. This will normally depend upon the `OBJ_FMT' macro. */
#define TARGET_ARCH bfd_arch_msp430
/* This macro is the BFD architecture to pass to `bfd_set_arch_mach'. */
#define TARGET_MACH 0
/* This macro is the BFD machine number to pass to
`bfd_set_arch_mach'. If it is not defined, GAS will use 0. */
#define TARGET_BYTES_BIG_ENDIAN 0
/* You should define this macro to be non-zero if the target is big
endian, and zero if the target is little endian. */
#define ONLY_STANDARD_ESCAPES
/* If you define this macro, GAS will warn about the use of
nonstandard escape sequences in a string. */
#define md_operand(x)
/* GAS will call this function for any expression that can not be
recognized. When the function is called, `input_line_pointer'
will point to the start of the expression. */
#define md_number_to_chars number_to_chars_littleendian
/* This should just call either `number_to_chars_bigendian' or
`number_to_chars_littleendian', whichever is appropriate. On
targets like the MIPS which support options to change the
endianness, which function to call is a runtime decision. On
other targets, `md_number_to_chars' can be a simple macro. */
#define WORKING_DOT_WORD
/*
`md_short_jump_size'
`md_long_jump_size'
`md_create_short_jump'
`md_create_long_jump'
If `WORKING_DOT_WORD' is defined, GAS will not do broken word
processing (*note Broken words::.). Otherwise, you should set
`md_short_jump_size' to the size of a short jump (a jump that is
just long enough to jump around a long jmp) and
`md_long_jump_size' to the size of a long jump (a jump that can go
anywhere in the function), You should define
`md_create_short_jump' to create a short jump around a long jump,
and define `md_create_long_jump' to create a long jump. */
#define MD_APPLY_FIX3
#define TC_HANDLES_FX_DONE
#undef RELOC_EXPANSION_POSSIBLE
/* If you define this macro, it means that `tc_gen_reloc' may return
multiple relocation entries for a single fixup. In this case, the
return value of `tc_gen_reloc' is a pointer to a null terminated
array. */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC)
/* If you define this macro, it should return the offset between the
address of a PC relative fixup and the position from which the PC
relative adjustment should be made. On many processors, the base
of a PC relative instruction is the next instruction, so this
macro would return the length of an instruction. */
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
#define LISTING_WORD_SIZE 2
/* The number of bytes to put into a word in a listing. This affects
the way the bytes are clumped together in the listing. For
example, a value of 2 might print `1234 5678' where a value of 1
would print `12 34 56 78'. The default value is 4. */
#define LEX_DOLLAR 0
/* MSP430 port does not use `$' as a logical line separator */
#define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) (P2VAR) = 0
/* An `.lcomm' directive with no explicit alignment parameter will
use this macro to set P2VAR to the alignment that a request for
SIZE bytes will have. The alignment is expressed as a power of
two. If no alignment should take place, the macro definition
should do nothing. Some targets define a `.bss' directive that is
also affected by this macro. The default definition will set
P2VAR to the truncated power of two of sizes up to eight bytes. */

364
gas/configure vendored
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File diff suppressed because it is too large Load Diff

1
gas/configure.in
View File

@ -373,6 +373,7 @@ changequote([,])dnl
mmix-*-*) fmt=elf ;;
mn10200-*-*) fmt=elf ;;
mn10300-*-*) fmt=elf ;;
msp430-*-*) fmt=elf ;;
openrisc-*-*) fmt=elf ;;
or32-*-rtems*) fmt=coff ;;
or32-*-coff) fmt=coff ;;

1
gas/doc/Makefile.am
View File

@ -44,6 +44,7 @@ CPU_DOCS = \
c-m88k.texi \
c-mips.texi \
c-mmix.texi \
c-msp430.texi \
c-ns32k.texi \
c-pdp11.texi \
c-pj.texi \

1
gas/doc/Makefile.in
View File

@ -156,6 +156,7 @@ CPU_DOCS = \
c-m88k.texi \
c-mips.texi \
c-mmix.texi \
c-msp430.texi \
c-ns32k.texi \
c-pdp11.texi \
c-pj.texi \

1
gas/doc/all.texi
View File

@ -48,6 +48,7 @@
@set MCORE
@set MIPS
@set MMIX
@set MSP430
@set PDP11
@set PJ
@set PPC

7
gas/doc/as.texinfo
View File

@ -5758,6 +5758,9 @@ subject, see the hardware manufacturer's manual.
@ifset MMIX
* MMIX-Dependent:: MMIX Dependent Features
@end ifset
@ifset MSP430
* MSP430-Dependent:: MSP430 Dependent Features
@end ifset
@ifset SH
* SH-Dependent:: Hitachi SH Dependent Features
* SH64-Dependent:: Hitachi SH64 Dependent Features
@ -5906,6 +5909,10 @@ family.
@include c-mmix.texi
@end ifset
@ifset MSP430
@include c-msp430.texi
@end ifset
@ifset NS32K
@include c-ns32k.texi
@end ifset

164
gas/doc/c-msp430.texi Normal file
View File

@ -0,0 +1,164 @@
@c Copyright 2002 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node MSP430-Dependent
@chapter MSP 430 Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter MSP 430 Dependent Features
@end ifclear
@cindex MSP 430 support
@cindex 430 support
@menu
* MSP430 Options:: Options
* MSP430 Syntax:: Syntax
* MSP430 Floating Point:: Floating Point
* MSP430 Directives:: MSP 430 Machine Directives
* MSP430 Opcodes:: Opcodes
@end menu
@node MSP430 Options
@section Options
@cindex MSP 430 options (none)
@cindex options for MSP430 (none)
@code{@value{AS}} has only -m flag which selects the mpu arch. Currently has
no effect.
@node MSP430 Syntax
@section Syntax
@menu
* MSP430-Macros:: Macros
* MSP430-Chars:: Special Characters
* MSP430-Regs:: Register Names
* MSP430-Ext:: Assembler Extensions
@end menu
@node MSP430-Macros
@subsection Macros
@cindex Macros, MSP 430
@cindex MSP 430 macros
The macro syntax used on the MSP 430 is like that described in the MSP
430 Family Assembler Specification. Normal @code{@value{AS}}
macros should still work.
Additional built-in macros are:
@table @code
@item llo(exp)
Extracts least significant word from 32-bit expression 'exp'.
@item lhi(exp)
Extracts most significant word from 32-bit expression 'exp'.
@item hlo(exp)
Extracts 3rd word from 64-bit expression 'exp'.
@item hhi(exp)
Extracts 4rd word from 64-bit expression 'exp'.
@end table
They normally being used as an immediate source operand.
@smallexample
mov #llo(1), r10 ; == mov #1, r10
mov #lhi(1), r10 ; == mov #0, r10
@end smallexample
@node MSP430-Chars
@subsection Special Characters
@cindex line comment character, MSP 430
@cindex MSP 430 line comment character
@samp{;} is the line comment character.
@cindex identifiers, MSP 430
@cindex MSP 430 identifiers
The character @samp{$} in jump instructions indicates current location and
implemented only for TI syntax compatibility.
@node MSP430-Regs
@subsection Register Names
@cindex MSP 430 register names
@cindex register names, MSP 430
General-purpose registers are represented by predefined symbols of the
form @samp{r@var{N}} (for global registers), where @var{N} represents
a number between @code{0} and @code{15}. The leading
letters may be in either upper or lower case; for example, @samp{r13}
and @samp{R7} are both valid register names.
@cindex special purpose registers, MSP 430
Register names @samp{PC}, @samp{SP} and @samp{SR} cannot be used as register names
and will be treated as variables. Use @samp{r0}, @samp{r1}, and @samp{r2} instead.
@node MSP430-Ext
@subsection Assembler Extensions
@cindex MSP430 Assembler Extensions
@table @code
@item @@rN
As destination operand being treated as @samp{0(rn)}
@item 0(rN)
As source operand being treated as @samp{@@rn}
@item jCOND +N
Skips next N bytes followed by jump instruction and equivalent to
@samp{jCOND $+N+2}
@end table
@node MSP430 Floating Point
@section Floating Point
@cindex floating point, MSP 430 (@sc{ieee})
@cindex MSP 430 floating point (@sc{ieee})
The MSP 430 family uses @sc{ieee} 32-bit floating-point numbers.
@node MSP430 Directives
@section MSP 430 Machine Directives
@cindex machine directives, MSP 430
@cindex MSP 430 machine directives
@table @code
@cindex @code{file} directive, MSP 430
@item .file
This directive is ignored; it is accepted for compatibility with other
MSP 430 assemblers.
@quotation
@emph{Warning:} in other versions of the @sc{gnu} assembler, @code{.file} is
used for the directive called @code{.app-file} in the MSP 430 support.
@end quotation
@cindex @code{line} directive, MSP 430
@item .line
This directive is ignored; it is accepted for compatibility with other
MSP 430 assemblers.
@cindex @code{sect} directive, MSP 430
@item .arch
Currently this directive is ignored; it is accepted for compatibility with other
MSP 430 assemblers.
@end table
@node MSP430 Opcodes
@section Opcodes
@cindex MSP 430 opcodes
@cindex opcodes for MSP 430
@code{@value{AS}} implements all the standard MSP 430 opcodes. No
additional pseudo-instructions are needed on this family.
For information on the 430 machine instruction set, see @cite{MSP430
User's Manual, document slau049b}, Texas Instrument, Inc.

7
gas/testsuite/ChangeLog
View File

@ -1,3 +1,10 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* gas/msp430: New directory.
* gas/msp430/msp430.exp: Test msp430 assembler.
* gas/msp430/opcode.s: Test source file.
* gas/msp430/opcode.s: Expected disassembly.
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp: Define the notion of an "architecture data

4
include/ChangeLog
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@ -1,3 +1,7 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* dis-asm.h: Add msp430 disassembler prototype.
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* dis-asm.h (print_mips_disassembler_options): Prototype.

1
include/dis-asm.h
View File

@ -217,6 +217,7 @@ extern int print_insn_mcore PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mmix PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_msp430 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_openrisc PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_big_or32 PARAMS ((bfd_vma, disassemble_info*));

5
include/elf/ChangeLog
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@ -1,3 +1,8 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* common.h: Define msp430 machine numbers.
* msp430.h: New file. Define msp430 relocs.
2002-12-20 DJ Delorie <dj@redhat.com>
* xstormy16.h: Add XSTORMY16_12.

7
include/elf/common.h
View File

@ -251,6 +251,13 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* Ubicom IP2xxx; no ABI */
#define EM_IP2K_OLD 0x8217
/* MSP430 magic number
Written in the absense everything. */
#define EM_MSP430_OLD 0x1059
/* TI msp430 micro controller. */
#define EM_MSP430 0x430
/* See the above comment before you add a new EM_* value here. */
/* Values for e_version. */

55
include/elf/msp430.h Normal file
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@ -0,0 +1,55 @@
/* MSP430 ELF support for BFD.
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_MSP430_H
#define _ELF_MSP430_H
#include "elf/reloc-macros.h"
/* Processor specific flags for the ELF header e_flags field. */
#define EF_MSP430_MACH 0xff
#define E_MSP430_MACH_MSP430x11x1 110
#define E_MSP430_MACH_MSP430x11 11
#define E_MSP430_MACH_MSP430x12 12
#define E_MSP430_MACH_MSP430x13 13
#define E_MSP430_MACH_MSP430x14 14
#define E_MSP430_MACH_MSP430x31 31
#define E_MSP430_MACH_MSP430x32 32
#define E_MSP430_MACH_MSP430x33 33
#define E_MSP430_MACH_MSP430x41 41
#define E_MSP430_MACH_MSP430x43 43
#define E_MSP430_MACH_MSP430x44 44
#define E_MSP430_MACH_MSP430x15 15
#define E_MSP430_MACH_MSP430x16 16
/* Relocations. */
START_RELOC_NUMBERS (elf_msp430_reloc_type)
RELOC_NUMBER (R_MSP430_NONE, 0)
RELOC_NUMBER (R_MSP430_32, 1)
RELOC_NUMBER (R_MSP430_10_PCREL, 2)
RELOC_NUMBER (R_MSP430_16, 3)
RELOC_NUMBER (R_MSP430_16_PCREL, 4)
RELOC_NUMBER (R_MSP430_16_BYTE, 5)
RELOC_NUMBER (R_MSP430_16_PCREL_BYTE, 6)
END_RELOC_NUMBERS (R_MSP430_max)
#endif /* _ELF_MSP430_H */

4
include/opcode/ChangeLog
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@ -1,3 +1,7 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* msp430.h: New file. Defines msp430 opcodes.
2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
* h8300.h: Added some more pseudo opcodes for system call

111
include/opcode/msp430.h Normal file
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@ -0,0 +1,111 @@
/* Opcode table for the TI MSP430 microcontrollers
Copyright 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef __MSP430_H_
#define __MSP430_H_
struct msp430_operand_s
{
int ol; /* Operand length words. */
int am; /* Addr mode. */
int reg; /* Register. */
int mode; /* Pperand mode. */
#define OP_REG 0
#define OP_EXP 1
#ifndef DASM_SECTION
expressionS exp;
#endif
};
#define BYTE_OPERATION (1 << 6) /* Byte operation flag for all instructions. */
struct msp430_opcode_s
{
char *name;
int fmt;
int insn_opnumb;
int bin_opcode;
int bin_mask;
};
#define MSP_INSN(name, size, numb, bin, mask) { #name, size, numb, bin, mask }
static struct msp430_opcode_s msp430_opcodes[] =
{
MSP_INSN (and, 1, 2, 0xf000, 0xf000),
MSP_INSN (inv, 0, 1, 0xe330, 0xfff0),
MSP_INSN (xor, 1, 2, 0xe000, 0xf000),
MSP_INSN (setz, 0, 0, 0xd322, 0xffff),
MSP_INSN (setc, 0, 0, 0xd312, 0xffff),
MSP_INSN (eint, 0, 0, 0xd232, 0xffff),
MSP_INSN (setn, 0, 0, 0xd222, 0xffff),
MSP_INSN (bis, 1, 2, 0xd000, 0xf000),
MSP_INSN (clrz, 0, 0, 0xc322, 0xffff),
MSP_INSN (clrc, 0, 0, 0xc312, 0xffff),
MSP_INSN (dint, 0, 0, 0xc232, 0xffff),
MSP_INSN (clrn, 0, 0, 0xc222, 0xffff),
MSP_INSN (bic, 1, 2, 0xc000, 0xf000),
MSP_INSN (bit, 1, 2, 0xb000, 0xf000),
MSP_INSN (dadc, 0, 1, 0xa300, 0xff30),
MSP_INSN (dadd, 1, 2, 0xa000, 0xf000),
MSP_INSN (tst, 0, 1, 0x9300, 0xff30),
MSP_INSN (cmp, 1, 2, 0x9000, 0xf000),
MSP_INSN (decd, 0, 1, 0x8320, 0xff30),
MSP_INSN (dec, 0, 1, 0x8310, 0xff30),
MSP_INSN (sub, 1, 2, 0x8000, 0xf000),
MSP_INSN (sbc, 0, 1, 0x7300, 0xff30),
MSP_INSN (subc, 1, 2, 0x7000, 0xf000),
MSP_INSN (adc, 0, 1, 0x6300, 0xff30),
MSP_INSN (rlc, 0, 2, 0x6000, 0xf000),
MSP_INSN (addc, 1, 2, 0x6000, 0xf000),
MSP_INSN (incd, 0, 1, 0x5320, 0xff30),
MSP_INSN (inc, 0, 1, 0x5310, 0xff30),
MSP_INSN (rla, 0, 2, 0x5000, 0xf000),
MSP_INSN (add, 1, 2, 0x5000, 0xf000),
MSP_INSN (nop, 0, 0, 0x4303, 0xffff),
MSP_INSN (clr, 0, 1, 0x4300, 0xff30),
MSP_INSN (ret, 0, 0, 0x4130, 0xff30),
MSP_INSN (pop, 0, 1, 0x4130, 0xff30),
MSP_INSN (br, 0, 3, 0x4000, 0xf000),
MSP_INSN (mov, 1, 2, 0x4000, 0xf000),
MSP_INSN (jmp, 3, 1, 0x3c00, 0xfc00),
MSP_INSN (jl, 3, 1, 0x3800, 0xfc00),
MSP_INSN (jge, 3, 1, 0x3400, 0xfc00),
MSP_INSN (jn, 3, 1, 0x3000, 0xfc00),
MSP_INSN (jc, 3, 1, 0x2c00, 0xfc00),
MSP_INSN (jhs, 3, 1, 0x2c00, 0xfc00),
MSP_INSN (jnc, 3, 1, 0x2800, 0xfc00),
MSP_INSN (jlo, 3, 1, 0x2800, 0xfc00),
MSP_INSN (jz, 3, 1, 0x2400, 0xfc00),
MSP_INSN (jeq, 3, 1, 0x2400, 0xfc00),
MSP_INSN (jnz, 3, 1, 0x2000, 0xfc00),
MSP_INSN (jne, 3, 1, 0x2000, 0xfc00),
MSP_INSN (reti, 2, 0, 0x1300, 0xffc0),
MSP_INSN (call, 2, 1, 0x1280, 0xffc0),
MSP_INSN (push, 2, 1, 0x1200, 0xff80),
MSP_INSN (sxt, 2, 1, 0x1180, 0xffc0),
MSP_INSN (rra, 2, 1, 0x1100, 0xff80),
MSP_INSN (swpb, 2, 1, 0x1080, 0xffc0),
MSP_INSN (rrc, 2, 1, 0x1000, 0xff80),
/* End of instruction set. */
{ NULL, 0, 0, 0, 0 }
};
#endif

12
ld/ChangeLog
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@ -1,3 +1,15 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* Makefile.am: Add msp430 target.
* configure.tgt: Likewise.
* Makefile.in: Regenerate.
* emulparams/msp430x???.sh: New files. Linker script parameters
for various msp430 configurations.
* gen-doc.texi: Enable msp430 documenation.
* ld.texinfo: Document msp430 sections.
* scripttempl/elf32msp430.sc: New file. Linker script for msp430.
* scripttempl/elf32msp430_3.sc: New file. Linker script for msp430.
2002-12-30 Ralf Habacker <Ralf.Habacker@freenet.de>
Charles Wilson <cwilson@ece.gatech.edu>

194
ld/Makefile.am
View File

@ -245,6 +245,44 @@ ALL_EMULATIONS = \
emipslit.o \
emipslnews.o \
emipspe.o \
emsp430x1101.o \
emsp430x1111.o \
emsp430x1121.o \
emsp430x1331.o \
emsp430x1351.o \
emsp430x149.o \
emsp430x148.o \
emsp430x147.o \
emsp430x135.o \
emsp430x133.o \
emsp430x110.o \
emsp430x112.o \
emsp430x122.o \
emsp430x1222.o \
emsp430x123.o \
emsp430x1232.o \
emsp430x412.o \
emsp430x413.o \
emsp430x311.o \
emsp430x312.o \
emsp430x313.o \
emsp430x314.o \
emsp430x315.o \
emsp430x323.o \
emsp430x325.o \
emsp430x336.o \
emsp430x337.o \
emsp430x435.o \
emsp430x436.o \
emsp430x447.o \
emsp430x448.o \
emsp430x449.o \
emsp430x169.o \
emsp430x168.o \
emsp430x167.o \
emsp430x155.o \
emsp430x156.o \
emsp430x157.o \
enews.o \
ens32knbsd.o \
eor32.o \
@ -939,6 +977,162 @@ emn10300.c: $(srcdir)/emulparams/mn10300.sh \
emn10200.c: $(srcdir)/emulparams/mn10200.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} mn10200 "$(tdir_mn10200)"
emsp430x1101.c: $(srcdir)/emulparams/msp430x1101.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1101 "$(tdir_msp430x1101)"
emsp430x1111.c: $(srcdir)/emulparams/msp430x1111.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1111 "$(tdir_msp430x1111)"
emsp430x1121.c: $(srcdir)/emulparams/msp430x1121.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1121 "$(tdir_msp430x1121)"
emsp430x1331.c: $(srcdir)/emulparams/msp430x1331.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1331 "$(tdir_msp430x1331)"
emsp430x1351.c: $(srcdir)/emulparams/msp430x1351.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1351 "$(tdir_msp430x1351)"
emsp430x149.c: $(srcdir)/emulparams/msp430x149.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x149 "$(tdir_msp430x149)"
emsp430x148.c: $(srcdir)/emulparams/msp430x148.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x148 "$(tdir_msp430x148)"
emsp430x449.c: $(srcdir)/emulparams/msp430x449.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x449 "$(tdir_msp430x449)"
emsp430x448.c: $(srcdir)/emulparams/msp430x448.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x448 "$(tdir_msp430x448)"
emsp430x447.c: $(srcdir)/emulparams/msp430x447.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x447 "$(tdir_msp430x447)"
emsp430x412.c: $(srcdir)/emulparams/msp430x412.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x412 "$(tdir_msp430x412)"
emsp430x413.c: $(srcdir)/emulparams/msp430x413.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x413 "$(tdir_msp430x413)"
emsp430x147.c: $(srcdir)/emulparams/msp430x147.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x147 "$(tdir_msp430x147)"
emsp430x135.c: $(srcdir)/emulparams/msp430x135.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x135 "$(tdir_msp430x135)"
emsp430x133.c: $(srcdir)/emulparams/msp430x133.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x133 "$(tdir_msp430x133)"
emsp430x110.c: $(srcdir)/emulparams/msp430x110.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x110 "$(tdir_msp430x110)"
emsp430x112.c: $(srcdir)/emulparams/msp430x112.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x112 "$(tdir_msp430x112)"
emsp430x122.c: $(srcdir)/emulparams/msp430x122.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x122 "$(tdir_msp430x122)"
emsp430x1222.c: $(srcdir)/emulparams/msp430x1222.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1222 "$(tdir_msp430x1222)"
emsp430x123.c: $(srcdir)/emulparams/msp430x123.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x123 "$(tdir_msp430x123)"
emsp430x1232.c: $(srcdir)/emulparams/msp430x1232.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1232 "$(tdir_msp430x1232)"
emsp430x311.c: $(srcdir)/emulparams/msp430x311.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x311 "$(tdir_msp430x311)"
emsp430x312.c: $(srcdir)/emulparams/msp430x312.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x312 "$(tdir_msp430x312)"
emsp430x313.c: $(srcdir)/emulparams/msp430x313.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x313 "$(tdir_msp430x313)"
emsp430x314.c: $(srcdir)/emulparams/msp430x314.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x314 "$(tdir_msp430x314)"
emsp430x315.c: $(srcdir)/emulparams/msp430x315.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x315 "$(tdir_msp430x315)"
emsp430x323.c: $(srcdir)/emulparams/msp430x323.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x323 "$(tdir_msp430x323)"
emsp430x325.c: $(srcdir)/emulparams/msp430x325.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x325 "$(tdir_msp430x325)"
emsp430x336.c: $(srcdir)/emulparams/msp430x336.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x336 "$(tdir_msp430x336)"
emsp430x337.c: $(srcdir)/emulparams/msp430x337.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x337 "$(tdir_msp430x337)"
emsp430x435.c: $(srcdir)/emulparams/msp430x435.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x435 "$(tdir_msp430x435)"
emsp430x436.c: $(srcdir)/emulparams/msp430x436.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x436 "$(tdir_msp430x436)"
emsp430x437.c: $(srcdir)/emulparams/msp430x437.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x437 "$(tdir_msp430x437)"
emsp430x167.c: $(srcdir)/emulparams/msp430x167.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x167 "$(tdir_msp430x167)"
emsp430x168.c: $(srcdir)/emulparams/msp430x167.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x168 "$(tdir_msp430x168)"
emsp430x169.c: $(srcdir)/emulparams/msp430x169.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x169 "$(tdir_msp430x169)"
emsp430x155.c: $(srcdir)/emulparams/msp430x155.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x155 "$(tdir_msp430x155)"
emsp430x156.c: $(srcdir)/emulparams/msp430x156.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x156 "$(tdir_msp430x156)"
emsp430x157.c: $(srcdir)/emulparams/msp430x157.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x157 "$(tdir_msp430x157)"
enews.c: $(srcdir)/emulparams/news.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
${GENSCRIPTS} news "$(tdir_news)"

194
ld/Makefile.in
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@ -356,6 +356,44 @@ ALL_EMULATIONS = \
emipslit.o \
emipslnews.o \
emipspe.o \
emsp430x1101.o \
emsp430x1111.o \
emsp430x1121.o \
emsp430x1331.o \
emsp430x1351.o \
emsp430x149.o \
emsp430x148.o \
emsp430x147.o \
emsp430x135.o \
emsp430x133.o \
emsp430x110.o \
emsp430x112.o \
emsp430x122.o \
emsp430x1222.o \
emsp430x123.o \
emsp430x1232.o \
emsp430x412.o \
emsp430x413.o \
emsp430x311.o \
emsp430x312.o \
emsp430x313.o \
emsp430x314.o \
emsp430x315.o \
emsp430x323.o \
emsp430x325.o \
emsp430x336.o \
emsp430x337.o \
emsp430x435.o \
emsp430x436.o \
emsp430x447.o \
emsp430x448.o \
emsp430x449.o \
emsp430x169.o \
emsp430x168.o \
emsp430x167.o \
emsp430x155.o \
emsp430x156.o \
emsp430x157.o \
enews.o \
ens32knbsd.o \
eor32.o \
@ -1662,6 +1700,162 @@ emn10300.c: $(srcdir)/emulparams/mn10300.sh \
emn10200.c: $(srcdir)/emulparams/mn10200.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} mn10200 "$(tdir_mn10200)"
emsp430x1101.c: $(srcdir)/emulparams/msp430x1101.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1101 "$(tdir_msp430x1101)"
emsp430x1111.c: $(srcdir)/emulparams/msp430x1111.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1111 "$(tdir_msp430x1111)"
emsp430x1121.c: $(srcdir)/emulparams/msp430x1121.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1121 "$(tdir_msp430x1121)"
emsp430x1331.c: $(srcdir)/emulparams/msp430x1331.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1331 "$(tdir_msp430x1331)"
emsp430x1351.c: $(srcdir)/emulparams/msp430x1351.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1351 "$(tdir_msp430x1351)"
emsp430x149.c: $(srcdir)/emulparams/msp430x149.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x149 "$(tdir_msp430x149)"
emsp430x148.c: $(srcdir)/emulparams/msp430x148.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x148 "$(tdir_msp430x148)"
emsp430x449.c: $(srcdir)/emulparams/msp430x449.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x449 "$(tdir_msp430x449)"
emsp430x448.c: $(srcdir)/emulparams/msp430x448.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x448 "$(tdir_msp430x448)"
emsp430x447.c: $(srcdir)/emulparams/msp430x447.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x447 "$(tdir_msp430x447)"
emsp430x412.c: $(srcdir)/emulparams/msp430x412.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x412 "$(tdir_msp430x412)"
emsp430x413.c: $(srcdir)/emulparams/msp430x413.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x413 "$(tdir_msp430x413)"
emsp430x147.c: $(srcdir)/emulparams/msp430x147.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x147 "$(tdir_msp430x147)"
emsp430x135.c: $(srcdir)/emulparams/msp430x135.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x135 "$(tdir_msp430x135)"
emsp430x133.c: $(srcdir)/emulparams/msp430x133.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x133 "$(tdir_msp430x133)"
emsp430x110.c: $(srcdir)/emulparams/msp430x110.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x110 "$(tdir_msp430x110)"
emsp430x112.c: $(srcdir)/emulparams/msp430x112.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x112 "$(tdir_msp430x112)"
emsp430x122.c: $(srcdir)/emulparams/msp430x122.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x122 "$(tdir_msp430x122)"
emsp430x1222.c: $(srcdir)/emulparams/msp430x1222.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1222 "$(tdir_msp430x1222)"
emsp430x123.c: $(srcdir)/emulparams/msp430x123.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x123 "$(tdir_msp430x123)"
emsp430x1232.c: $(srcdir)/emulparams/msp430x1232.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x1232 "$(tdir_msp430x1232)"
emsp430x311.c: $(srcdir)/emulparams/msp430x311.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x311 "$(tdir_msp430x311)"
emsp430x312.c: $(srcdir)/emulparams/msp430x312.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x312 "$(tdir_msp430x312)"
emsp430x313.c: $(srcdir)/emulparams/msp430x313.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x313 "$(tdir_msp430x313)"
emsp430x314.c: $(srcdir)/emulparams/msp430x314.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x314 "$(tdir_msp430x314)"
emsp430x315.c: $(srcdir)/emulparams/msp430x315.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x315 "$(tdir_msp430x315)"
emsp430x323.c: $(srcdir)/emulparams/msp430x323.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x323 "$(tdir_msp430x323)"
emsp430x325.c: $(srcdir)/emulparams/msp430x325.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x325 "$(tdir_msp430x325)"
emsp430x336.c: $(srcdir)/emulparams/msp430x336.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x336 "$(tdir_msp430x336)"
emsp430x337.c: $(srcdir)/emulparams/msp430x337.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430_3.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x337 "$(tdir_msp430x337)"
emsp430x435.c: $(srcdir)/emulparams/msp430x435.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x435 "$(tdir_msp430x435)"
emsp430x436.c: $(srcdir)/emulparams/msp430x436.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x436 "$(tdir_msp430x436)"
emsp430x437.c: $(srcdir)/emulparams/msp430x437.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x437 "$(tdir_msp430x437)"
emsp430x167.c: $(srcdir)/emulparams/msp430x167.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x167 "$(tdir_msp430x167)"
emsp430x168.c: $(srcdir)/emulparams/msp430x167.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x168 "$(tdir_msp430x168)"
emsp430x169.c: $(srcdir)/emulparams/msp430x169.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x169 "$(tdir_msp430x169)"
emsp430x155.c: $(srcdir)/emulparams/msp430x155.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x155 "$(tdir_msp430x155)"
emsp430x156.c: $(srcdir)/emulparams/msp430x156.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x156 "$(tdir_msp430x156)"
emsp430x157.c: $(srcdir)/emulparams/msp430x157.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf32msp430.sc \
${GEN_DEPENDS}
${GENSCRIPTS} msp430x157 "$(tdir_msp430x157)"
enews.c: $(srcdir)/emulparams/news.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
${GENSCRIPTS} news "$(tdir_news)"

832
ld/configure vendored
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2
ld/configure.tgt
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@ -422,6 +422,8 @@ mmix-*-*) targ_emul=mmo
;;
mn10200-*-*) targ_emul=mn10200 ;;
mn10300-*-*) targ_emul=mn10300 ;;
msp430-*-*) targ_emul=msp430x149
targ_extra_emuls="msp430x148 msp430x147 msp430x133 msp430x135 msp430x110 msp430x112 msp430x122 msp430x123 msp430x412 msp430x413 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x1101 msp430x1111 msp430x1121 msp430x1331 msp430x1351 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449 msp430x1222 msp430x1232 msp430x169 msp430x168 msp430x167 msp430x155 msp430x156 msp430x157" ;;
alpha*-*-freebsd*) targ_emul=elf64alpha_fbsd
targ_extra_emuls="elf64alpha alpha"
tdir_alpha=`echo ${targ_alias} | sed -e 's/freebsd/freebsdecoff/'`

14
ld/emulparams/msp430x110.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:11
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xfc00
ROM_SIZE=0x3e0
RAM_START=0x0200
RAM_SIZE=128
STACK=0x280

14
ld/emulparams/msp430x1101.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:110
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xfc00
ROM_SIZE=0x3e0
RAM_START=0x0200
RAM_SIZE=128
STACK=0x280

14
ld/emulparams/msp430x1111.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:110
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf800
ROM_SIZE=0x07e0
RAM_START=0x0200
RAM_SIZE=128
STACK=0x280

14
ld/emulparams/msp430x112.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:11
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf000
ROM_SIZE=0xfe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x1121.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:110
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf000
ROM_SIZE=0x0fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x122.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:12
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf000
ROM_SIZE=0xfe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x1222.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:12
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf000
ROM_SIZE=0xfe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x123.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:12
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xe000
ROM_SIZE=0x1fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x1232.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:12
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xe000
ROM_SIZE=0x1fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x133.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:13
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xe000
ROM_SIZE=0x1fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x1331.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:13
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xe000
ROM_SIZE=0x1fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x135.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:13
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xc000
ROM_SIZE=0x3fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x1351.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:13
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xc000
ROM_SIZE=0x3fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x147.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:14
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x8000
ROM_SIZE=0x7fe0
RAM_START=0x0200
RAM_SIZE=1K
STACK=0x600

14
ld/emulparams/msp430x148.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:14
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x4000
ROM_SIZE=0xbef0
RAM_START=0x0200
RAM_SIZE=0x07ff
STACK=0xa00

14
ld/emulparams/msp430x149.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:14
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x1100
ROM_SIZE=0xeee0
RAM_START=0x0200
RAM_SIZE=0x07ff
STACK=0xa00

14
ld/emulparams/msp430x155.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:15
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xc000
ROM_SIZE=0x3fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x156.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:15
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xa000
ROM_SIZE=0x5fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x157.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:15
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x8000
ROM_SIZE=0x7fe0
RAM_START=0x0200
RAM_SIZE=1K
STACK=0x600

14
ld/emulparams/msp430x167.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:16
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x8000
ROM_SIZE=0x7fe0
RAM_START=0x0200
RAM_SIZE=1K
STACK=0x600

14
ld/emulparams/msp430x168.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:16
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x4000
ROM_SIZE=0xbef0
RAM_START=0x0200
RAM_SIZE=0x07ff
STACK=0xa00

14
ld/emulparams/msp430x169.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:16
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x1100
ROM_SIZE=0xeee0
RAM_START=0x0200
RAM_SIZE=0x07ff
STACK=0xa00

14
ld/emulparams/msp430x311.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:31
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf800
ROM_SIZE=0x07e0
RAM_START=0x0200
RAM_SIZE=128
STACK=0x280

14
ld/emulparams/msp430x312.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:31
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf000
ROM_SIZE=0x0fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x313.sh Normal file
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@ -0,0 +1,14 @@
ARCH=msp:31
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xe000
ROM_SIZE=0x1fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x314.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:31
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xd000
ROM_SIZE=0x2fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x315.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:31
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xc000
ROM_SIZE=0x3fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x323.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:32
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xe000
ROM_SIZE=0x1fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x325.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:32
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xc000
ROM_SIZE=0x3fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x336.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:33
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xa000
ROM_SIZE=0x5fe0
RAM_START=0x0200
RAM_SIZE=1024
STACK=0x600

14
ld/emulparams/msp430x337.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:33
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x8000
ROM_SIZE=0x7fe0
RAM_START=0x0200
RAM_SIZE=1024
STACK=0x600

14
ld/emulparams/msp430x412.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:41
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xf000
ROM_SIZE=0x0fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x413.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:41
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xe000
ROM_SIZE=0x1fe0
RAM_START=0x0200
RAM_SIZE=256
STACK=0x300

14
ld/emulparams/msp430x435.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:43
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xc000
ROM_SIZE=0x3fe0
RAM_START=0x0200
RAM_SIZE=512
STACK=0x400

14
ld/emulparams/msp430x436.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:43
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0xa000
ROM_SIZE=0x5fe0
RAM_START=0x0200
RAM_SIZE=1024
STACK=0x600

14
ld/emulparams/msp430x437.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:43
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x8000
ROM_SIZE=0x7fe0
RAM_START=0x0200
RAM_SIZE=1024
STACK=0x600

14
ld/emulparams/msp430x447.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:44
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x8000
ROM_SIZE=0x7fe0
RAM_START=0x0200
RAM_SIZE=1K
STACK=0x600

14
ld/emulparams/msp430x448.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:44
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x4000
ROM_SIZE=0xbef0
RAM_START=0x0200
RAM_SIZE=0x07ff
STACK=0xa00

14
ld/emulparams/msp430x449.sh Normal file
View File

@ -0,0 +1,14 @@
ARCH=msp:44
MACHINE=
SCRIPT_NAME=elf32msp430
OUTPUT_FORMAT="elf32-msp430"
MAXPAGESIZE=1
EMBEDDED=yes
TEMPLATE_NAME=generic
ROM_START=0x1100
ROM_SIZE=0xeee0
RAM_START=0x0200
RAM_SIZE=0x07ff
STACK=0xa00

1
ld/gen-doc.texi
View File

@ -6,6 +6,7 @@
@set H8300
@set I960
@set MMIX
@set MSP430
@set TICOFF
@set WIN32

37
ld/ld.texinfo
View File

@ -36,6 +36,7 @@
@set MCORE
@set MIPS
@set MMIX
@set MSP430
@set PDP11
@set PJ
@set SH
@ -4393,6 +4394,9 @@ functionality are not listed.
@ifset MMIX
* MMIX:: @code{ld} and MMIX
@end ifset
@ifset MSP430
* MSP430:: @code{ld} and MSP430
@end ifset
@ifset TICOFF
* TI COFF:: @command{ld} and TI COFF
@end ifset
@ -4892,6 +4896,39 @@ Initial and trailing multiples of zero-valued 32-bit words in a section,
are left out from an mmo file.
@end ifset
@ifset MSP430
@node MSP430
@section @code{ld} and MSP430
For the MSP430 it is possible to select the MPU architecture. The flag @samp{-m [mpu type]}
will select an appropriate linker script for selected MPU type. (To get a list of known MPUs
just pass @samp{-m help} option to the linker).
@cindex MSP430 extra sections
The linker will recognize some extra sections which are MSP430 specific:
@table @code
@item @samp{.vectors}
Defines a portion of ROM where interrupt vectors located.
@item @samp{.bootloader}
Defines the bootloader portion of the ROM (if applicable). Any code
in this section will be uploaded to the MPU.
@item @samp{.infomem}
Defines an information memory section (if applicable). Any code in
this section will be uploaded to the MPU.
@item @samp{.infomemnobits}
This is the same as the @samp{.infomem} section except that any code
in this section will not be uploaded to the MPU.
@item @samp{.noinit}
Denotes a portion of RAM located above @samp{.bss} section.
The last two sections are used by gcc.
@end table
@end ifset
@ifset TICOFF
@node TI COFF
@section @command{ld}'s support for various TI COFF versions

188
ld/scripttempl/elf32msp430.sc Normal file
View File

@ -0,0 +1,188 @@
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}","${OUTPUT_FORMAT}","${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
MEMORY
{
text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
}
SECTIONS
{
/* Read-only sections, merged into text segment. */
${TEXT_DYNAMIC+${DYNAMIC}}
.hash ${RELOCATING-0} : { *(.hash) }
.dynsym ${RELOCATING-0} : { *(.dynsym) }
.dynstr ${RELOCATING-0} : { *(.dynstr) }
.gnu.version ${RELOCATING-0} : { *(.gnu.version) }
.gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) }
.gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) }
.rel.init ${RELOCATING-0} : { *(.rel.init) }
.rela.init ${RELOCATING-0} : { *(.rela.init) }
.rel.text ${RELOCATING-0} :
{
*(.rel.text)
${RELOCATING+*(.rel.text.*)}
${RELOCATING+*(.rel.gnu.linkonce.t*)}
}
.rela.text ${RELOCATING-0} :
{
*(.rela.text)
${RELOCATING+*(.rela.text.*)}
${RELOCATING+*(.rela.gnu.linkonce.t*)}
}
.rel.fini ${RELOCATING-0} : { *(.rel.fini) }
.rela.fini ${RELOCATING-0} : { *(.rela.fini) }
.rel.rodata ${RELOCATING-0} :
{
*(.rel.rodata)
${RELOCATING+*(.rel.rodata.*)}
${RELOCATING+*(.rel.gnu.linkonce.r*)}
}
.rela.rodata ${RELOCATING-0} :
{
*(.rela.rodata)
${RELOCATING+*(.rela.rodata.*)}
${RELOCATING+*(.rela.gnu.linkonce.r*)}
}
.rel.data ${RELOCATING-0} :
{
*(.rel.data)
${RELOCATING+*(.rel.data.*)}
${RELOCATING+*(.rel.gnu.linkonce.d*)}
}
.rela.data ${RELOCATING-0} :
{
*(.rela.data)
${RELOCATING+*(.rela.data.*)}
${RELOCATING+*(.rela.gnu.linkonce.d*)}
}
.rel.ctors ${RELOCATING-0} : { *(.rel.ctors) }
.rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
.rel.dtors ${RELOCATING-0} : { *(.rel.dtors) }
.rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
.rel.got ${RELOCATING-0} : { *(.rel.got) }
.rela.got ${RELOCATING-0} : { *(.rela.got) }
.rel.bss ${RELOCATING-0} : { *(.rel.bss) }
.rela.bss ${RELOCATING-0} : { *(.rela.bss) }
.rel.plt ${RELOCATING-0} : { *(.rel.plt) }
.rela.plt ${RELOCATING-0} : { *(.rela.plt) }
/* Internal text space. */
.text :
{
*(.init)
${RELOCATING+. = ALIGN(2);}
*(.text)
${RELOCATING+. = ALIGN(2);}
*(.text.*)
${RELOCATING+. = ALIGN(2);}
*(.fini)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > text}
.data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
{
${RELOCATING+ PROVIDE (__data_start = .) ; }
${RELOCATING+. = ALIGN(2);}
*(.data)
${RELOCATING+. = ALIGN(2);}
*(.gnu.linkonce.d*)
${RELOCATING+. = ALIGN(2);}
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > data}
/* Bootloader. */
.bootloader ${RELOCATING-0} :
{
${RELOCATING+ PROVIDE (__boot_start = .) ; }
*(.bootloader)
${RELOCATING+. = ALIGN(2);}
*(.bootloader.*)
} ${RELOCATING+ > bootloader}
/* Information memory. */
.infomem ${RELOCATING-0} :
{
*(.infomem)
${RELOCATING+. = ALIGN(2);}
*(.infomem.*)
} ${RELOCATING+ > infomem}
/* Information memory (not loaded into MPU). */
.infomemnobits ${RELOCATING-0} :
{
*(.infomemnobits)
${RELOCATING+. = ALIGN(2);}
*(.infomemnobits.*)
} ${RELOCATING+ > infomemnobits}
.bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
{
${RELOCATING+ PROVIDE (__bss_start = .) ; }
*(.bss)
*(COMMON)
${RELOCATING+ PROVIDE (__bss_end = .) ; }
${RELOCATING+ _end = . ; }
} ${RELOCATING+ > data}
.noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
{
${RELOCATING+ PROVIDE (__noinit_start = .) ; }
*(.noinit)
*(COMMON)
${RELOCATING+ PROVIDE (__noinit_end = .) ; }
${RELOCATING+ _end = . ; }
} ${RELOCATING+ > data}
.vectors ${RELOCATING-0}:
{
${RELOCATING+ PROVIDE (__vectors_start = .) ; }
*(.vectors*)
${RELOCATING+ _vectors_end = . ; }
} ${RELOCATING+ > vectors}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
PROVIDE (__stack = ${STACK}) ;
}
EOF

157
ld/scripttempl/elf32msp430_3.sc Normal file
View File

@ -0,0 +1,157 @@
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}","${OUTPUT_FORMAT}","${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
MEMORY
{
text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
}
SECTIONS
{
/* Read-only sections, merged into text segment. */
${TEXT_DYNAMIC+${DYNAMIC}}
.hash ${RELOCATING-0} : { *(.hash) }
.dynsym ${RELOCATING-0} : { *(.dynsym) }
.dynstr ${RELOCATING-0} : { *(.dynstr) }
.gnu.version ${RELOCATING-0} : { *(.gnu.version) }
.gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) }
.gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) }
.rel.init ${RELOCATING-0} : { *(.rel.init) }
.rela.init ${RELOCATING-0} : { *(.rela.init) }
.rel.text ${RELOCATING-0} :
{
*(.rel.text)
${RELOCATING+*(.rel.text.*)}
${RELOCATING+*(.rel.gnu.linkonce.t*)}
}
.rela.text ${RELOCATING-0} :
{
*(.rela.text)
${RELOCATING+*(.rela.text.*)}
${RELOCATING+*(.rela.gnu.linkonce.t*)}
}
.rel.fini ${RELOCATING-0} : { *(.rel.fini) }
.rela.fini ${RELOCATING-0} : { *(.rela.fini) }
.rel.rodata ${RELOCATING-0} :
{
*(.rel.rodata)
${RELOCATING+*(.rel.rodata.*)}
${RELOCATING+*(.rel.gnu.linkonce.r*)}
}
.rela.rodata ${RELOCATING-0} :
{
*(.rela.rodata)
${RELOCATING+*(.rela.rodata.*)}
${RELOCATING+*(.rela.gnu.linkonce.r*)}
}
.rel.data ${RELOCATING-0} :
{
*(.rel.data)
${RELOCATING+*(.rel.data.*)}
${RELOCATING+*(.rel.gnu.linkonce.d*)}
}
.rela.data ${RELOCATING-0} :
{
*(.rela.data)
${RELOCATING+*(.rela.data.*)}
${RELOCATING+*(.rela.gnu.linkonce.d*)}
}
.rel.ctors ${RELOCATING-0} : { *(.rel.ctors) }
.rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
.rel.dtors ${RELOCATING-0} : { *(.rel.dtors) }
.rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
.rel.got ${RELOCATING-0} : { *(.rel.got) }
.rela.got ${RELOCATING-0} : { *(.rela.got) }
.rel.bss ${RELOCATING-0} : { *(.rel.bss) }
.rela.bss ${RELOCATING-0} : { *(.rela.bss) }
.rel.plt ${RELOCATING-0} : { *(.rel.plt) }
.rela.plt ${RELOCATING-0} : { *(.rela.plt) }
/* Internal text space. */
.text :
{
*(.init)
${RELOCATING+. = ALIGN(2);}
*(.text)
${RELOCATING+. = ALIGN(2);}
*(.text.*)
${RELOCATING+. = ALIGN(2);}
*(.fini)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > text}
.data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
{
${RELOCATING+ PROVIDE (__data_start = .) ; }
*(.data)
*(.gnu.linkonce.d*)
${RELOCATING+. = ALIGN(2);}
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > data}
.bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
{
${RELOCATING+ PROVIDE (__bss_start = .) ; }
*(.bss)
*(COMMON)
${RELOCATING+ PROVIDE (__bss_end = .) ; }
${RELOCATING+ _end = . ; }
} ${RELOCATING+ > data}
.noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
{
${RELOCATING+ PROVIDE (__noinit_start = .) ; }
*(.noinit)
*(COMMON)
${RELOCATING+ PROVIDE (__noinit_end = .) ; }
${RELOCATING+ _end = . ; }
} ${RELOCATING+ > data}
.vectors ${RELOCATING-0}:
{
${RELOCATING+ PROVIDE (__vectors_start = .) ; }
*(.vectors*)
${RELOCATING+ _vectors_end = . ; }
} ${RELOCATING+ > vectors}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
PROVIDE (__stack = ${STACK}) ;
}
EOF

7
opcodes/ChangeLog
View File

@ -1,3 +1,10 @@
2002-12-30 Dmitry Diky <diwil@mail.ru>
* configure.in: Add msp430 target.
* configure: Regenerate.
* disassemble.c: Add entry for msp430 disassembly.
* msp430-dis.c: New file: msp430 disassembler.
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* disassemble.c (disassembler_usage): Add invocation of

8
opcodes/Makefile.in
View File

@ -1,6 +1,6 @@
# Makefile.in generated automatically by automake 1.4 from Makefile.am
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@ -451,7 +451,7 @@ acinclude.m4 aclocal.m4 config.in configure configure.in
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
TAR = tar
TAR = gtar
GZIP_ENV = --best
SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES)
OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS)
@ -600,7 +600,7 @@ maintainer-clean-recursive:
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
test "$$subdir" = "." && dot_seen=yes; \
test "$$subdir" != "." || dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \

3
opcodes/configure vendored
View File

@ -2338,7 +2338,7 @@ if test "${enable_install_libbfd+set}" = set; then
enableval="$enable_install_libbfd"
install_libbfd_p=$enableval
else
if test "${host}" = "${target}" -o "$enable_shared" = "yes"; then
if test "${host}" = "${target}" || test "$enable_shared" = "yes"; then
install_libbfd_p=yes
else
install_libbfd_p=no
@ -4625,6 +4625,7 @@ if test x${all_targets} = xfalse ; then
bfd_mmix_arch) ta="$ta mmix-dis.lo mmix-opc.lo" ;;
bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;

1
opcodes/configure.in
View File

@ -200,6 +200,7 @@ if test x${all_targets} = xfalse ; then
bfd_mmix_arch) ta="$ta mmix-dis.lo mmix-opc.lo" ;;
bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;

6
opcodes/disassemble.c
View File

@ -49,6 +49,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define ARCH_mmix
#define ARCH_mn10200
#define ARCH_mn10300
#define ARCH_msp430
#define ARCH_ns32k
#define ARCH_openrisc
#define ARCH_or32
@ -214,6 +215,11 @@ disassembler (abfd)
disassemble = print_insn_m88k;
break;
#endif
#ifdef ARCH_msp430
case bfd_arch_msp430:
disassemble = print_insn_msp430;
break;
#endif
#ifdef ARCH_ns32k
case bfd_arch_ns32k:
disassemble = print_insn_ns32k;

805
opcodes/msp430-dis.c Normal file
View File

@ -0,0 +1,805 @@
/* Disassemble MSP430 instructions.
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include <ctype.h>
#include <string.h>
#include <sys/types.h>
#include "dis-asm.h"
#include "opintl.h"
#include "libiberty.h"
#define DASM_SECTION
#include "opcode/msp430.h"
#undef DASM_SECTION
static unsigned short msp430dis_opcode
PARAMS ((bfd_vma, disassemble_info *));
int print_insn_msp430
PARAMS ((bfd_vma, disassemble_info *));
int msp430_nooperands
PARAMS ((struct msp430_opcode_s *, bfd_vma, unsigned short, char *, int *));
int msp430_singleoperand
PARAMS ((disassemble_info *, struct msp430_opcode_s *, bfd_vma, unsigned short,
char *, char *, int *));
int msp430_doubleoperand
PARAMS ((disassemble_info *, struct msp430_opcode_s *, bfd_vma, unsigned short,
char *, char *, char *, char *, int *));
int msp430_branchinstr
PARAMS ((disassemble_info *, struct msp430_opcode_s *, bfd_vma, unsigned short,
char *, char *, int *));
#define PS(x) (0xffff & (x))
static unsigned short
msp430dis_opcode (addr, info)
bfd_vma addr;
disassemble_info *info;
{
bfd_byte buffer[2];
int status;
status = info->read_memory_func (addr, buffer, 2, info);
if (status != 0)
{
info->memory_error_func (status, addr, info);
return -1;
}
return bfd_getl16 (buffer);
}
int
print_insn_msp430 (addr, info)
bfd_vma addr;
disassemble_info *info;
{
void *stream = info->stream;
fprintf_ftype prin = info->fprintf_func;
struct msp430_opcode_s *opcode;
char op1[32], op2[32], comm1[64], comm2[64];
int cmd_len = 0;
unsigned short insn;
int cycles = 0;
char *bc = "";
char dinfo[32]; /* Debug purposes. */
insn = msp430dis_opcode (addr, info);
sprintf (dinfo, "0x%04x", insn);
if (((int) addr & 0xffff) > 0xffdf)
{
(*prin) (stream, "interrupt service routine at 0x%04x", 0xffff & insn);
return 2;
}
*comm1 = 0;
*comm2 = 0;
for (opcode = msp430_opcodes; opcode->name; opcode++)
{
if ((insn & opcode->bin_mask) == opcode->bin_opcode
&& opcode->bin_opcode != 0x9300)
{
*op1 = 0;
*op2 = 0;
*comm1 = 0;
*comm2 = 0;
/* r0 as destination. Ad should be zero. */
if (opcode->insn_opnumb == 3 && (insn & 0x000f) == 0
&& (0x0080 & insn) == 0)
{
cmd_len =
msp430_branchinstr (info, opcode, addr, insn, op1, comm1,
&cycles);
if (cmd_len)
break;
}
switch (opcode->insn_opnumb)
{
case 0:
cmd_len = msp430_nooperands (opcode, addr, insn, comm1, &cycles);
break;
case 2:
cmd_len =
msp430_doubleoperand (info, opcode, addr, insn, op1, op2,
comm1, comm2, &cycles);
if (insn & BYTE_OPERATION)
bc = ".b";
break;
case 1:
cmd_len =
msp430_singleoperand (info, opcode, addr, insn, op1, comm1,
&cycles);
if (insn & BYTE_OPERATION && opcode->fmt != 3)
bc = ".b";
break;
default:
break;
}
}
if (cmd_len)
break;
}
dinfo[5] = 0;
if (cmd_len < 1)
{
/* Unknown opcode, or invalid combination of operands. */
(*prin) (stream, ".word 0x%04x; ????", PS (insn));
return 2;
}
(*prin) (stream, "%s%s", opcode->name, bc);
if (*op1)
(*prin) (stream, "\t%s", op1);
if (*op2)
(*prin) (stream, ",");
if (strlen (op1) < 7)
(*prin) (stream, "\t");
if (!strlen (op1))
(*prin) (stream, "\t");
if (*op2)
(*prin) (stream, "%s", op2);
if (strlen (op2) < 8)
(*prin) (stream, "\t");
if (*comm1 || *comm2)
(*prin) (stream, ";");
else if (cycles)
{
if (*op2)
(*prin) (stream, ";");
else
{
if (strlen (op1) < 7)
(*prin) (stream, ";");
else
(*prin) (stream, "\t;");
}
}
if (*comm1)
(*prin) (stream, "%s", comm1);
if (*comm1 && *comm2)
(*prin) (stream, ",");
if (*comm2)
(*prin) (stream, " %s", comm2);
return cmd_len;
}
int
msp430_nooperands (opcode, addr, insn, comm, cycles)
struct msp430_opcode_s *opcode;
bfd_vma addr ATTRIBUTE_UNUSED;
unsigned short insn ATTRIBUTE_UNUSED;
char *comm;
int *cycles;
{
/* Pop with constant. */
if (insn == 0x43b2)
return 0;
if (insn == opcode->bin_opcode)
return 2;
if (opcode->fmt == 0)
{
if ((insn & 0x0f00) != 3 || (insn & 0x0f00) != 2)
return 0;
strcpy (comm, "emulated...");
*cycles = 1;
}
else
{
strcpy (comm, "return from interupt");
*cycles = 5;
}
return 2;
}
int
msp430_singleoperand (info, opcode, addr, insn, op, comm, cycles)
disassemble_info *info;
struct msp430_opcode_s *opcode;
bfd_vma addr;
unsigned short insn;
char *op;
char *comm;
int *cycles;
{
int regs = 0, regd = 0;
int ad = 0, as = 0;
int where = 0;
int cmd_len = 2;
short dst = 0;
regd = insn & 0x0f;
regs = (insn & 0x0f00) >> 8;
as = (insn & 0x0030) >> 4;
ad = (insn & 0x0080) >> 7;
switch (opcode->fmt)
{
case 0: /* Emulated work with dst register. */
if (regs != 2 && regs != 3 && regs != 1)
return 0;
/* Check if not clr insn. */
if (opcode->bin_opcode == 0x4300 && (ad || as))
return 0;
/* Check if really inc, incd insns. */
if ((opcode->bin_opcode & 0xff00) == 0x5300 && as == 3)
return 0;
if (ad == 0)
{
*cycles = 1;
/* Register. */
if (regd == 0)
{
*cycles += 1;
sprintf (op, "r0");
}
else if (regd == 1)
sprintf (op, "r1");
else if (regd == 2)
sprintf (op, "r2");
else
sprintf (op, "r%d", regd);
}
else /* ad == 1 msp430dis_opcode. */
{
if (regd == 0)
{
/* PC relative. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
*cycles = 4;
sprintf (op, "0x%04x", dst);
sprintf (comm, "PC rel. abs addr 0x%04x",
PS ((short) (addr + 2) + dst));
}
else if (regd == 2)
{
/* Absolute. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
*cycles = 4;
sprintf (op, "&0x%04x", PS (dst));
}
else
{
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
*cycles = 4;
sprintf (op, "%d(r%d)", dst, regd);
}
}
break;
case 2: /* rrc, push, call, swpb, rra, sxt, push, call, reti etc... */
if (as == 0)
{
if (regd == 3)
{
/* Constsnts. */
sprintf (op, "#0");
sprintf (comm, "r3 As==00");
}
else
{
/* Register. */
sprintf (op, "r%d", regd);
}
*cycles = 1;
}
else if (as == 2)
{
*cycles = 1;
if (regd == 2)
{
sprintf (op, "#4");
sprintf (comm, "r2 As==10");
}
else if (regd == 3)
{
sprintf (op, "#2");
sprintf (comm, "r3 As==10");
}
else
{
*cycles = 3;
/* Indexed register mode @Rn. */
sprintf (op, "@r%d", regd);
}
}
else if (as == 3)
{
*cycles = 1;
if (regd == 2)
{
sprintf (op, "#8");
sprintf (comm, "r2 As==11");
}
else if (regd == 3)
{
sprintf (op, "#-1");
sprintf (comm, "r3 As==11");
}
else if (regd == 0)
{
*cycles = 3;
/* absolute. @pc+ */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op, "#%d", dst);
sprintf (comm, "#0x%04x", PS (dst));
}
else
{
*cycles = 3;
sprintf (op, "@r%d+", regd);
}
}
else if (as == 1)
{
*cycles = 4;
if (regd == 0)
{
/* PC relative. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op, "0x%04x", PS (dst));
sprintf (comm, "PC rel. 0x%04x",
PS ((short) addr + 2 + dst));
}
else if (regd == 2)
{
/* Absolute. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op, "&0x%04x", PS (dst));
}
else if (regd == 3)
{
*cycles = 1;
sprintf (op, "#1");
sprintf (comm, "r3 As==01");
}
else
{
/* Indexd. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op, "%d(r%d)", dst, regd);
}
}
break;
case 3: /* Jumps. */
where = insn & 0x03ff;
if (where & 0x200)
where |= ~0x03ff;
if (where > 512 || where < -511)
return 0;
where *= 2;
sprintf (op, "$%+-8d", where + 2);
sprintf (comm, "abs 0x%x", PS ((short) (addr) + 2 + where));
*cycles = 2;
return 2;
break;
default:
cmd_len = 0;
}
return cmd_len;
}
int
msp430_doubleoperand (info, opcode, addr, insn, op1, op2, comm1, comm2, cycles)
disassemble_info *info;
struct msp430_opcode_s *opcode;
bfd_vma addr;
unsigned short insn;
char *op1, *op2;
char *comm1, *comm2;
int *cycles;
{
int regs = 0, regd = 0;
int ad = 0, as = 0;
int cmd_len = 2;
short dst = 0;
regd = insn & 0x0f;
regs = (insn & 0x0f00) >> 8;
as = (insn & 0x0030) >> 4;
ad = (insn & 0x0080) >> 7;
if (opcode->fmt == 0)
{
/* Special case: rla and rlc are the only 2 emulated instructions that
fall into two operand instructions. */
/* With dst, there are only:
Rm Register,
x(Rm) Indexed,
0xXXXX Relative,
&0xXXXX Absolute
emulated_ins dst
basic_ins dst, dst. */
if (regd != regs || as != ad)
return 0; /* May be 'data' section. */
if (ad == 0)
{
/* Register mode. */
if (regd == 3)
{
strcpy (comm1, "Illegal as emulation instr");
return -1;
}
sprintf (op1, "r%d", regd);
*cycles = 1;
}
else /* ad == 1 */
{
if (regd == 0)
{
/* PC relative, Symbolic. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 4;
*cycles = 6;
sprintf (op1, "0x%04x", PS (dst));
sprintf (comm1, "PC rel. 0x%04x",
PS ((short) addr + 2 + dst));
}
else if (regd == 2)
{
/* Absolute. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 4;
*cycles = 6;
sprintf (op1, "&0x%04x", PS (dst));
}
else
{
/* Indexed. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 4;
*cycles = 6;
sprintf (op1, "%d(r%d)", dst, regd);
}
}
*op2 = 0;
*comm2 = 0;
return cmd_len;
}
/* Two operands exactly. */
if (ad == 0 && regd == 3)
{
/* R2/R3 are illegal as dest: may be data section. */
strcpy (comm1, "Illegal as 2-op instr");
return -1;
}
/* Source. */
if (as == 0)
{
*cycles = 1;
if (regs == 3)
{
/* Constsnts. */
sprintf (op1, "#0");
sprintf (comm1, "r3 As==00");
}
else
{
/* Register. */
sprintf (op1, "r%d", regs);
}
}
else if (as == 2)
{
*cycles = 1;
if (regs == 2)
{
sprintf (op1, "#4");
sprintf (comm1, "r2 As==10");
}
else if (regs == 3)
{
sprintf (op1, "#2");
sprintf (comm1, "r3 As==10");
}
else
{
*cycles = 2;
/* Indexed register mode @Rn. */
sprintf (op1, "@r%d", regs);
}
if (!regs)
*cycles = 3;
}
else if (as == 3)
{
if (regs == 2)
{
sprintf (op1, "#8");
sprintf (comm1, "r2 As==11");
*cycles = 1;
}
else if (regs == 3)
{
sprintf (op1, "#-1");
sprintf (comm1, "r3 As==11");
*cycles = 1;
}
else if (regs == 0)
{
*cycles = 3;
/* Absolute. @pc+ */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op1, "#%d", dst);
sprintf (comm1, "#0x%04x", PS (dst));
}
else
{
*cycles = 2;
sprintf (op1, "@r%d+", regs);
}
}
else if (as == 1)
{
if (regs == 0)
{
*cycles = 4;
/* PC relative. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op1, "0x%04x", PS (dst));
sprintf (comm1, "PC rel. 0x%04x",
PS ((short) addr + 2 + dst));
}
else if (regs == 2)
{
*cycles = 2;
/* Absolute. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op1, "&0x%04x", PS (dst));
sprintf (comm1, "0x%04x", PS (dst));
}
else if (regs == 3)
{
*cycles = 1;
sprintf (op1, "#1");
sprintf (comm1, "r3 As==01");
}
else
{
*cycles = 3;
/* Indexed. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op1, "%d(r%d)", dst, regs);
}
}
/* Destination. Special care needed on addr + XXXX. */
if (ad == 0)
{
/* Register. */
if (regd == 0)
{
*cycles += 1;
sprintf (op2, "r0");
}
else if (regd == 1)
sprintf (op2, "r1");
else if (regd == 2)
sprintf (op2, "r2");
else
sprintf (op2, "r%d", regd);
}
else /* ad == 1. */
{
* cycles += 3;
if (regd == 0)
{
/* PC relative. */
*cycles += 1;
dst = msp430dis_opcode (addr + cmd_len, info);
sprintf (op2, "0x%04x", PS (dst));
sprintf (comm2, "PC rel. 0x%04x",
PS ((short) addr + cmd_len + dst));
cmd_len += 2;
}
else if (regd == 2)
{
/* Absolute. */
dst = msp430dis_opcode (addr + cmd_len, info);
cmd_len += 2;
sprintf (op2, "&0x%04x", PS (dst));
}
else
{
dst = msp430dis_opcode (addr + cmd_len, info);
cmd_len += 2;
sprintf (op2, "%d(r%d)", dst, regd);
}
}
return cmd_len;
}
int
msp430_branchinstr (info, opcode, addr, insn, op1, comm1, cycles)
disassemble_info *info;
struct msp430_opcode_s *opcode ATTRIBUTE_UNUSED;
bfd_vma addr ATTRIBUTE_UNUSED;
unsigned short insn;
char *op1;
char *comm1;
int *cycles;
{
int regs = 0, regd = 0;
int ad = 0, as = 0;
int cmd_len = 2;
short dst = 0;
regd = insn & 0x0f;
regs = (insn & 0x0f00) >> 8;
as = (insn & 0x0030) >> 4;
ad = (insn & 0x0080) >> 7;
if (regd != 0) /* Destination register is not a PC. */
return 0;
/* dst is a source register. */
if (as == 0)
{
/* Constants. */
if (regs == 3)
{
*cycles = 1;
sprintf (op1, "#0");
sprintf (comm1, "r3 As==00");
}
else
{
/* Register. */
*cycles = 1;
sprintf (op1, "r%d", regs);
}
}
else if (as == 2)
{
if (regs == 2)
{
*cycles = 2;
sprintf (op1, "#4");
sprintf (comm1, "r2 As==10");
}
else if (regs == 3)
{
*cycles = 1;
sprintf (op1, "#2");
sprintf (comm1, "r3 As==10");
}
else
{
/* Indexed register mode @Rn. */
*cycles = 2;
sprintf (op1, "@r%d", regs);
}
}
else if (as == 3)
{
if (regs == 2)
{
*cycles = 1;
sprintf (op1, "#8");
sprintf (comm1, "r2 As==11");
}
else if (regs == 3)
{
*cycles = 1;
sprintf (op1, "#-1");
sprintf (comm1, "r3 As==11");
}
else if (regs == 0)
{
/* Absolute. @pc+ */
*cycles = 3;
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op1, "#0x%04x", PS (dst));
}
else
{
*cycles = 2;
sprintf (op1, "@r%d+", regs);
}
}
else if (as == 1)
{
* cycles = 3;
if (regs == 0)
{
/* PC relative. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
(*cycles)++;
sprintf (op1, "0x%04x", PS (dst));
sprintf (comm1, "PC rel. 0x%04x",
PS ((short) addr + 2 + dst));
}
else if (regs == 2)
{
/* Absolute. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op1, "&0x%04x", PS (dst));
}
else if (regs == 3)
{
(*cycles)--;
sprintf (op1, "#1");
sprintf (comm1, "r3 As==01");
}
else
{
/* Indexd. */
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
sprintf (op1, "%d(r%d)", dst, regs);
}
}
return cmd_len;
}