* config/tc-mips.c (hilo_interlocks, gpr_interlocks,
cop_interlocks): Remove superfluous CPU entries.
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@ -1,3 +1,8 @@
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2004-04-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* config/tc-mips.c (hilo_interlocks, gpr_interlocks,
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cop_interlocks): Remove superfluous CPU entries.
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2004-04-22 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (mav_parse_offset): Value must be multiple of 4.
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@ -346,7 +346,6 @@ static int mips_32bitmode = 0;
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|| mips_opts.arch == CPU_R10000 \
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|| mips_opts.arch == CPU_R12000 \
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|| mips_opts.arch == CPU_RM7000 \
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|| mips_opts.arch == CPU_SB1 \
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|| mips_opts.arch == CPU_VR5500 \
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)
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@ -357,8 +356,6 @@ static int mips_32bitmode = 0;
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level I. */
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#define gpr_interlocks \
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(mips_opts.isa != ISA_MIPS1 \
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|| mips_opts.arch == CPU_VR5400 \
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|| mips_opts.arch == CPU_VR5500 \
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|| mips_opts.arch == CPU_R3900)
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/* Whether the processor uses hardware interlocks to avoid delays
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@ -374,9 +371,6 @@ static int mips_32bitmode = 0;
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&& mips_opts.isa != ISA_MIPS2 \
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&& mips_opts.isa != ISA_MIPS3) \
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|| mips_opts.arch == CPU_R4300 \
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|| mips_opts.arch == CPU_VR5400 \
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|| mips_opts.arch == CPU_VR5500 \
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|| mips_opts.arch == CPU_SB1 \
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)
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/* Whether the processor uses hardware interlocks to protect reads
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