* config/tc-mips.c (hilo_interlocks, gpr_interlocks,

cop_interlocks): Remove superfluous CPU entries.
This commit is contained in:
Thiemo Seufer 2004-04-22 17:58:57 +00:00
parent 3b611f1a39
commit 24772049ed
2 changed files with 5 additions and 6 deletions

View File

@ -1,3 +1,8 @@
2004-04-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* config/tc-mips.c (hilo_interlocks, gpr_interlocks,
cop_interlocks): Remove superfluous CPU entries.
2004-04-22 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (mav_parse_offset): Value must be multiple of 4.

View File

@ -346,7 +346,6 @@ static int mips_32bitmode = 0;
|| mips_opts.arch == CPU_R10000 \
|| mips_opts.arch == CPU_R12000 \
|| mips_opts.arch == CPU_RM7000 \
|| mips_opts.arch == CPU_SB1 \
|| mips_opts.arch == CPU_VR5500 \
)
@ -357,8 +356,6 @@ static int mips_32bitmode = 0;
level I. */
#define gpr_interlocks \
(mips_opts.isa != ISA_MIPS1 \
|| mips_opts.arch == CPU_VR5400 \
|| mips_opts.arch == CPU_VR5500 \
|| mips_opts.arch == CPU_R3900)
/* Whether the processor uses hardware interlocks to avoid delays
@ -374,9 +371,6 @@ static int mips_32bitmode = 0;
&& mips_opts.isa != ISA_MIPS2 \
&& mips_opts.isa != ISA_MIPS3) \
|| mips_opts.arch == CPU_R4300 \
|| mips_opts.arch == CPU_VR5400 \
|| mips_opts.arch == CPU_VR5500 \
|| mips_opts.arch == CPU_SB1 \
)
/* Whether the processor uses hardware interlocks to protect reads