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Add missing RISC-V fsrmi and fsflagsi instructions. 

PR 22599
	gas/
	* testsuite/gas/riscv/fsxxi.d, testsuite/gas/riscv/fsxxi.s: New.
	opcodes/
	* riscv-opc.c (riscv_opcodes) <fsrmi, fsflagsi>: New.
This commit is contained in:
Jim Wilson 2017-12-13 14:59:42 -08:00
parent b89641bab5
commit 25982ee022
5 changed files with 31 additions and 0 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2017-12-13 Jim Wilson <jimw@sifive.com>
PR 22599
* testsuite/gas/riscv/fsxxi.d, testsuite/gas/riscv/fsxxi.s: New.
2017-12-13 Dimitar Dimitrov <dimitar@dinux.eu>
* testsuite/gas/pru/extern.s: New test for print of U16_PMEMM

13
gas/testsuite/gas/riscv/fsxxi.d Normal file
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@ -0,0 +1,13 @@
#as:
#objdump: -dr
.*:[ ]+file format .*
Disassembly of section .text:
0+000 <.text>:
[ ]+0:[ ]+002fd573[ ]+fsrmi[ ]+a0,31
[ ]+4:[ ]+002f5073[ ]+fsrmi[ ]+zero,30
[ ]+8:[ ]+001ed773[ ]+fsflagsi[ ]+a4,29
[ ]+c:[ ]+001e5073[ ]+fsflagsi[ ]+zero,28

4
gas/testsuite/gas/riscv/fsxxi.s Normal file
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@ -0,0 +1,4 @@
fsrmi x10, 0x1f
fsrmi 0x1e
fsflagsi x14, 0x1d
fsflagsi 0x1c

5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2017-12-13 Jim Wilson <jimw@sifive.com>
PR 22599
* riscv-opc.c (riscv_opcodes) <fsrmi, fsflagsi>: New.
2017-12-13 Dimitar Dimitrov <dimitar@dinux.eu>
* disassemble.c: Enable disassembler_needs_relocs for PRU.

4
opcodes/riscv-opc.c
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@ -440,9 +440,13 @@ const struct riscv_opcode riscv_opcodes[] =
{"frrm", "F", "d", MATCH_FRRM, MASK_FRRM, match_opcode, 0 },
{"fsrm", "F", "s", MATCH_FSRM, MASK_FSRM | MASK_RD, match_opcode, 0 },
{"fsrm", "F", "d,s", MATCH_FSRM, MASK_FSRM, match_opcode, 0 },
{"fsrmi", "F", "d,Z", MATCH_FSRMI, MASK_FSRMI, match_opcode, 0 },
{"fsrmi", "F", "Z", MATCH_FSRMI, MASK_FSRMI | MASK_RD, match_opcode, 0 },
{"frflags", "F", "d", MATCH_FRFLAGS, MASK_FRFLAGS, match_opcode, 0 },
{"fsflags", "F", "s", MATCH_FSFLAGS, MASK_FSFLAGS | MASK_RD, match_opcode, 0 },
{"fsflags", "F", "d,s", MATCH_FSFLAGS, MASK_FSFLAGS, match_opcode, 0 },
{"fsflagsi", "F", "d,Z", MATCH_FSFLAGSI, MASK_FSFLAGSI, match_opcode, 0 },
{"fsflagsi", "F", "Z", MATCH_FSFLAGSI, MASK_FSFLAGSI | MASK_RD, match_opcode, 0 },
{"flw", "32C", "D,Cm(Cc)", MATCH_C_FLWSP, MASK_C_FLWSP, match_opcode, INSN_ALIAS },
{"flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW, MASK_C_FLW, match_opcode, INSN_ALIAS },
{"flw", "F", "D,o(s)", MATCH_FLW, MASK_FLW, match_opcode, 0 },