gas/

* config/tc-arm.c (parse_address_main): Handle -0 offsets.
	(encode_arm_addr_mode_2): Set default sign of zero here ...
	(encode_arm_addr_mode_3): ... and here.
	(encode_arm_cp_address): ... and here.
	(md_apply_fix): Use default sign of zero here.

	gas/testsuite/
	* gas/arm/inst.d: Adjust for signed zero offsets.
	* gas/arm/ldst-offset0.d: New test.
	* gas/arm/ldst-offset0.s: New test.
	* gas/arm/offset-1.d: New test.
	* gas/arm/offset-1.s: New test.

	ld/testsuite/
	Adjust tests for zero offset formatting.
	* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
	* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-arm-thumb.d: Adjust.
	* ld-arm/farcall-group-size2.d: Adjust.
	* ld-arm/farcall-group.d: Adjust.
	* ld-arm/farcall-mix.d: Adjust.
	* ld-arm/farcall-mix2.d: Adjust.
	* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
	* ld-arm/farcall-mixed-lib.d: Adjust.
	* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-thumb.d: Adjust.
	* ld-arm/ifunc-10.dd: Adjust.
	* ld-arm/ifunc-3.dd: Adjust.
	* ld-arm/ifunc-4.dd: Adjust.
	* ld-arm/ifunc-5.dd: Adjust.
	* ld-arm/ifunc-6.dd: Adjust.
	* ld-arm/ifunc-7.dd: Adjust.
	* ld-arm/ifunc-8.dd: Adjust.
	* ld-arm/jump-reloc-veneers-long.d: Adjust.
	* ld-arm/tls-longplt-lib.d: Adjust.
	* ld-arm/tls-thumb1.d: Adjust.

	opcodes/
	* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
	as address offset.
	(print_arm_address): Likewise. Elide positive #0 appropriately.
	(print_insn_arm): Likewise.

gas/ChangeLog

@@ -1,3 +1,12 @@
+2011-06-02  Jie Zhang jie@codesourcery.com
+	    Nathan Sidwell nathan@codesourcery.com
+
+	* config/tc-arm.c (parse_address_main): Handle -0 offsets.
+	(encode_arm_addr_mode_2): Set default sign of zero here ...
+	(encode_arm_addr_mode_3): ... and here.
+	(encode_arm_cp_address): ... and here.
+	(md_apply_fix): Use default sign of zero here.
+
 2011-06-02  Nick Clifton  <nickc@redhat.com>
 
 	* as.c: Fix spelling typo.

gas/config/tc-arm.c

@@ -5200,8 +5200,24 @@ parse_address_main (char **str, int i, int group_relocations,
 		}
             }
           else
-	    if (my_get_expression (&inst.reloc.exp, &p, GE_IMM_PREFIX))
+	    {
-	      return PARSE_OPERAND_FAIL;
+	      char *q = p;
+	      if (my_get_expression (&inst.reloc.exp, &p, GE_IMM_PREFIX))
+		return PARSE_OPERAND_FAIL;
+	      /* If the offset is 0, find out if it's a +0 or -0.  */
+	      if (inst.reloc.exp.X_op == O_constant
+		  && inst.reloc.exp.X_add_number == 0)
+		{
+		  skip_whitespace (q);
+		  if (*q == '#')
+		    {
+		      q++;
+		      skip_whitespace (q);
+		    }
+		  if (*q == '-')
+		    inst.operands[i].negative = 1;
+		}
+	    }
 	}
     }
   else if (skip_past_char (&p, ':') == SUCCESS)
@@ -5275,6 +5291,7 @@ parse_address_main (char **str, int i, int group_relocations,
 	    }
 	  else
 	    {
+	      char *q = p;
 	      if (inst.operands[i].negative)
 		{
 		  inst.operands[i].negative = 0;
@@ -5282,6 +5299,19 @@ parse_address_main (char **str, int i, int group_relocations,
 		}
 	      if (my_get_expression (&inst.reloc.exp, &p, GE_IMM_PREFIX))
 		return PARSE_OPERAND_FAIL;
+	      /* If the offset is 0, find out if it's a +0 or -0.  */
+	      if (inst.reloc.exp.X_op == O_constant
+		  && inst.reloc.exp.X_add_number == 0)
+		{
+		  skip_whitespace (q);
+		  if (*q == '#')
+		    {
+		      q++;
+		      skip_whitespace (q);
+		    }
+		  if (*q == '-')
+		    inst.operands[i].negative = 1;
+		}
 	    }
 	}
     }
@@ -7038,7 +7068,12 @@ encode_arm_addr_mode_2 (int i, bfd_boolean is_t)
 	}
 
       if (inst.reloc.type == BFD_RELOC_UNUSED)
-	inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
+	{
+	  /* Prefer + for zero encoded value.  */
+	  if (!inst.operands[i].negative)
+	    inst.instruction |= INDEX_UP;
+	  inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
+	}
     }
 }
 
@@ -7074,7 +7109,13 @@ encode_arm_addr_mode_3 (int i, bfd_boolean is_t)
 		  BAD_PC_WRITEBACK);
       inst.instruction |= HWOFFSET_IMM;
       if (inst.reloc.type == BFD_RELOC_UNUSED)
-	inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
+	{
+	  /* Prefer + for zero encoded value.  */
+	  if (!inst.operands[i].negative)
+	    inst.instruction |= INDEX_UP;
+
+	  inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
+	}
     }
 }
 
@@ -7136,6 +7177,10 @@ encode_arm_cp_address (int i, int wb_ok, int unind_ok, int reloc_override)
         inst.reloc.type = BFD_RELOC_ARM_CP_OFF_IMM;
     }
 
+  /* Prefer + for zero encoded value.  */
+  if (!inst.operands[i].negative)
+    inst.instruction |= INDEX_UP;
+
   return SUCCESS;
 }
 
@@ -20447,7 +20492,7 @@ md_apply_fix (fixS *	fixP,
 	value = 0;
 
     case BFD_RELOC_ARM_LITERAL:
-      sign = value >= 0;
+      sign = value > 0;
 
       if (value < 0)
 	value = - value;
@@ -20465,14 +20510,19 @@ md_apply_fix (fixS *	fixP,
 	}
 
       newval = md_chars_to_number (buf, INSN_SIZE);
-      newval &= 0xff7ff000;
+      if (value == 0)
-      newval |= value | (sign ? INDEX_UP : 0);
+	newval &= 0xfffff000;
+      else
+	{
+	  newval &= 0xff7ff000;
+	  newval |= value | (sign ? INDEX_UP : 0);
+	}
       md_number_to_chars (buf, newval, INSN_SIZE);
       break;
 
     case BFD_RELOC_ARM_OFFSET_IMM8:
     case BFD_RELOC_ARM_HWLITERAL:
-      sign = value >= 0;
+      sign = value > 0;
 
       if (value < 0)
 	value = - value;
@@ -20489,8 +20539,13 @@ md_apply_fix (fixS *	fixP,
 	}
 
       newval = md_chars_to_number (buf, INSN_SIZE);
-      newval &= 0xff7ff0f0;
+      if (value == 0)
-      newval |= ((value >> 4) << 8) | (value & 0xf) | (sign ? INDEX_UP : 0);
+	newval &= 0xfffff0f0;
+      else
+	{
+	  newval &= 0xff7ff0f0;
+	  newval |= ((value >> 4) << 8) | (value & 0xf) | (sign ? INDEX_UP : 0);
+	}
       md_number_to_chars (buf, newval, INSN_SIZE);
       break;
 
@@ -21117,7 +21172,7 @@ md_apply_fix (fixS *	fixP,
 	as_bad_where (fixP->fx_file, fixP->fx_line,
 		      _("co-processor offset out of range"));
     cp_off_common:
-      sign = value >= 0;
+      sign = value > 0;
       if (value < 0)
 	value = -value;
       if (fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM
@@ -21125,8 +21180,13 @@ md_apply_fix (fixS *	fixP,
 	newval = md_chars_to_number (buf, INSN_SIZE);
       else
 	newval = get_thumb32_insn (buf);
-      newval &= 0xff7fff00;
+      if (value == 0)
-      newval |= (value >> 2) | (sign ? INDEX_UP : 0);
+	newval &= 0xffffff00;
+      else
+	{
+	  newval &= 0xff7fff00;
+	  newval |= (value >> 2) | (sign ? INDEX_UP : 0);
+	}
       if (fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM
 	  || fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM_S2)
 	md_number_to_chars (buf, newval, INSN_SIZE);

gas/testsuite/ChangeLog

@@ -1,3 +1,12 @@
+2011-06-02  Jie Zhang <jie@codesourcery.com>
+	    Nathan Sidwell <nathan@codesourcery.com>
+
+	* gas/arm/inst.d: Adjust for signed zero offsets.
+	* gas/arm/ldst-offset0.d: New test.
+	* gas/arm/ldst-offset0.s: New test.
+	* gas/arm/offset-1.d: New test.
+	* gas/arm/offset-1.s: New test.
+
 2011-05-31  Paul Brook  <paul@codesourcery.com>
 
 	* gas/arm/arm-idiv-bad.d: New test.

gas/testsuite/gas/arm/inst.d

@@ -130,7 +130,7 @@ Disassembly of section .text:
 0+1d8 <[^>]*> e6942425 ?	ldr	r2, \[r4\], r5, lsr #8
 0+1dc <[^>]*> e51f0008 ?	ldr	r0, \[pc, #-8\]	; 0+1dc <[^>]*>
 0+1e0 <[^>]*> e5d43000 ?	ldrb	r3, \[r4\]
-0+1e4 <[^>]*> 14f85000 ?	ldrbtne	r5, \[r8\]
+0+1e4 <[^>]*> 14f85000 ?	ldrbtne	r5, \[r8\], #0
 0+1e8 <[^>]*> e5810000 ?	str	r0, \[r1\]
 0+1ec <[^>]*> e7811002 ?	str	r1, \[r1, r2\]
 0+1f0 <[^>]*> e7a43003 ?	str	r3, \[r4, r3\]!
@@ -142,7 +142,7 @@ Disassembly of section .text:
 0+208 <[^>]*> e6a42425 ?	strt	r2, \[r4\], r5, lsr #8
 0+20c <[^>]*> e50f1004 ?	str	r1, \[pc, #-4\]	; 0+210 <[^>]*>
 0+210 <[^>]*> e5c71000 ?	strb	r1, \[r7\]
-0+214 <[^>]*> e4e02000 ?	strbt	r2, \[r0\]
+0+214 <[^>]*> e4e02000 ?	strbt	r2, \[r0\], #0
 0+218 <[^>]*> e8900002 ?	ldm	r0, {r1}
 0+21c <[^>]*> 09920038 ?	ldmibeq	r2, {r3, r4, r5}
 0+220 <[^>]*> e853ffff ?	ldmda	r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^

gas/testsuite/gas/arm/ldst-offset0.d

@@ -0,0 +1,51 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: ARM load/store with 0 offset
+#as:
+
+# Test the standard ARM instructions:
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]*> e5121000 	ldr	r1, \[r2, #-0\]
+0+004 <[^>]*> e5121000 	ldr	r1, \[r2, #-0\]
+0+008 <[^>]*> e5921000 	ldr	r1, \[r2\]
+0+00c <[^>]*> e5921000 	ldr	r1, \[r2\]
+0+010 <[^>]*> e5321000 	ldr	r1, \[r2, #-0\]!
+0+014 <[^>]*> e5321000 	ldr	r1, \[r2, #-0\]!
+0+018 <[^>]*> e5b21000 	ldr	r1, \[r2, #0\]!
+0+01c <[^>]*> e5b21000 	ldr	r1, \[r2, #0\]!
+0+020 <[^>]*> e4121000 	ldr	r1, \[r2\], #-0
+0+024 <[^>]*> e4121000 	ldr	r1, \[r2\], #-0
+0+028 <[^>]*> e4921000 	ldr	r1, \[r2\], #0
+0+02c <[^>]*> e4921000 	ldr	r1, \[r2\], #0
+0+030 <[^>]*> e5b21000 	ldr	r1, \[r2, #0\]!
+0+034 <[^>]*> e5921000 	ldr	r1, \[r2\]
+0+038 <[^>]*> e4f21000 	ldrbt	r1, \[r2\], #0
+0+03c <[^>]*> e4721000 	ldrbt	r1, \[r2\], #-0
+0+040 <[^>]*> e4f21000 	ldrbt	r1, \[r2\], #0
+0+044 <[^>]*> 5d565300 	ldclpl	3, cr5, \[r6, #-0\]
+0+048 <[^>]*> 5dd65300 	ldclpl	3, cr5, \[r6\]
+0+04c <[^>]*> e5021000 	str	r1, \[r2, #-0\]
+0+050 <[^>]*> e5021000 	str	r1, \[r2, #-0\]
+0+054 <[^>]*> e5821000 	str	r1, \[r2\]
+0+058 <[^>]*> e5821000 	str	r1, \[r2\]
+0+05c <[^>]*> e5221000 	str	r1, \[r2, #-0\]!
+0+060 <[^>]*> e5221000 	str	r1, \[r2, #-0\]!
+0+064 <[^>]*> e5a21000 	str	r1, \[r2, #0\]!
+0+068 <[^>]*> e5a21000 	str	r1, \[r2, #0\]!
+0+06c <[^>]*> e4021000 	str	r1, \[r2\], #-0
+0+070 <[^>]*> e4021000 	str	r1, \[r2\], #-0
+0+074 <[^>]*> e4821000 	str	r1, \[r2\], #0
+0+078 <[^>]*> e4821000 	str	r1, \[r2\], #0
+0+07c <[^>]*> e5a21000 	str	r1, \[r2, #0\]!
+0+080 <[^>]*> e5821000 	str	r1, \[r2\]
+0+084 <[^>]*> e4e21000 	strbt	r1, \[r2\], #0
+0+088 <[^>]*> e4621000 	strbt	r1, \[r2\], #-0
+0+08c <[^>]*> e4e21000 	strbt	r1, \[r2\], #0
+0+090 <[^>]*> 5d465300 	stclpl	3, cr5, \[r6, #-0\]
+0+094 <[^>]*> 5dc65300 	stclpl	3, cr5, \[r6\]
+0+098 <[^>]*> e59f0004 	ldr	r0, \[pc, #4\]	; .*
+0+09c <[^>]*> e59f0000 	ldr	r0, \[pc\]	; .*
+0+0a0 <[^>]*> e51f0004 	ldr	r0, \[pc, #-4\]	; .*
+0+0a4 <[^>]*> 00000000 	.word	0x00000000

gas/testsuite/gas/arm/ldst-offset0.s

@@ -0,0 +1,66 @@
+@	Test file for ARM load/store instructions with 0 offset
+
+	.text
+	.syntax unified
+	ldr r1, [r2, #-0]
+	ldr r1, [r2, #-1+1]
+
+	ldr r1, [r2, #1-1]
+	ldr r1, [r2, #0]
+
+	ldr r1, [r2, #-0]!
+	ldr r1, [r2, #-1+1]!
+
+	ldr r1, [r2, #1-1]!
+	ldr r1, [r2, #0]!
+
+	ldr r1, [r2], #-0
+	ldr r1, [r2], #-1+1
+
+	ldr r1, [r2], #1-1
+	ldr r1, [r2], #0
+
+	ldr r1, [r2]!
+	ldr r1, [r2]
+
+	ldrbt r1, [r2], #0
+	ldrbt r1, [r2], #-0
+
+	ldrbt r1, [r2]
+
+	ldclpl p3, c5, [r6, #-0]
+	ldclpl p3, c5, [r6, #0]
+
+	str r1, [r2, #-0]
+	str r1, [r2, #-1+1]
+
+	str r1, [r2, #1-1]
+	str r1, [r2, #0]
+
+	str r1, [r2, #-0]!
+	str r1, [r2, #-1+1]!
+
+	str r1, [r2, #1-1]!
+	str r1, [r2, #0]!
+
+	str r1, [r2], #-0
+	str r1, [r2], #-1+1
+
+	str r1, [r2], #1-1
+	str r1, [r2], #0
+
+	str r1, [r2]!
+	str r1, [r2]
+
+	strbt r1, [r2], #0
+	strbt r1, [r2], #-0
+
+	strbt r1, [r2]
+
+	stclpl p3, c5, [r6, #-0]
+	stclpl p3, c5, [r6, #0]
+
+	ldr	r0,1f
+	ldr	r0,1f
+	ldr	r0,1f
+1:	.word	0

gas/testsuite/gas/arm/offset-1.d

@@ -0,0 +1,23 @@
+# name: MINUS ZERO OFFSET
+# as:
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+00 <[^>]+> e51f0000 ?	ldr	r0, \[pc, #-0\]	; 0+8 <[^>]+>
+0+04 <[^>]+> e59f0000 ?	ldr	r0, \[pc\]	; 0+c <[^>]+>
+0+08 <[^>]+> e5110000 ?	ldr	r0, \[r1, #-0\]
+0+0c <[^>]+> e5910000 ?	ldr	r0, \[r1\]
+0+10 <[^>]+> e4110000 ?	ldr	r0, \[r1\], #-0
+0+14 <[^>]+> e4910000 ?	ldr	r0, \[r1\], #0
+0+18 <[^>]+> e15f00b0 ?	ldrh	r0, \[pc, #-0\]	; 0+20 <[^>]+>
+0+1c <[^>]+> e1df00b0 ?	ldrh	r0, \[pc\]	; 0+24 <[^>]+>
+0+20 <[^>]+> e15100b0 ?	ldrh	r0, \[r1, #-0\]
+0+24 <[^>]+> e1d100b0 ?	ldrh	r0, \[r1\]
+0+28 <[^>]+> e05100b0 ?	ldrh	r0, \[r1\], #-0
+0+2c <[^>]+> e0d100b0 ?	ldrh	r0, \[r1\], #0
+0+30 <[^>]+> e5310000 ?	ldr	r0, \[r1, #-0\]!
+0+34 <[^>]+> e5b10000 ?	ldr	r0, \[r1, #0\]!
+0+38 <[^>]+> e17100b0 ?	ldrh	r0, \[r1, #-0\]!
+0+3c <[^>]+> e1f100b0 ?	ldrh	r0, \[r1, #0\]!

gas/testsuite/gas/arm/offset-1.s

@@ -0,0 +1,16 @@
+	ldr r0, [pc, #-0]
+	ldr r0, [pc, #0]
+	ldr r0, [r1, #-0]
+	ldr r0, [r1, #0]
+	ldr r0, [r1], #-0
+	ldr r0, [r1], #0
+	ldrh r0, [pc, #-0]
+	ldrh r0, [pc, #0]
+	ldrh r0, [r1, #-0]
+	ldrh r0, [r1, #0]
+	ldrh r0, [r1], #-0
+	ldrh r0, [r1], #0
+	ldr r0, [r1, #-0]!
+	ldr r0, [r1, #0]!
+	ldrh r0, [r1, #-0]!
+	ldrh r0, [r1, #0]!

ld/testsuite/ChangeLog

@@ -1,3 +1,29 @@
+2011-06-02  Nathan Sidwell  <nathan@codesourcery.com>
+
+	Adjust tests for zero offset formatting.
+	* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
+	* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
+	* ld-arm/farcall-arm-thumb.d: Adjust.
+	* ld-arm/farcall-group-size2.d: Adjust.
+	* ld-arm/farcall-group.d: Adjust.
+	* ld-arm/farcall-mix.d: Adjust.
+	* ld-arm/farcall-mix2.d: Adjust.
+	* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
+	* ld-arm/farcall-mixed-lib.d: Adjust.
+	* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
+	* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
+	* ld-arm/farcall-thumb-thumb.d: Adjust.
+	* ld-arm/ifunc-10.dd: Adjust.
+	* ld-arm/ifunc-3.dd: Adjust.
+	* ld-arm/ifunc-4.dd: Adjust.
+	* ld-arm/ifunc-5.dd: Adjust.
+	* ld-arm/ifunc-6.dd: Adjust.
+	* ld-arm/ifunc-7.dd: Adjust.
+	* ld-arm/ifunc-8.dd: Adjust.
+	* ld-arm/jump-reloc-veneers-long.d: Adjust.
+	* ld-arm/tls-longplt-lib.d: Adjust.
+	* ld-arm/tls-thumb1.d: Adjust.
+
 2011-05-31  Paul Brook  <paul@codesourcery.com>
 
 	* ld-arm/cortex-a8-far.d: Adjust expected output.

ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d

@@ -14,7 +14,7 @@ Disassembly of section \.plt:
     8016:	46c0      	nop			; \(mov r8, r8\)
     8018:	e28fc600 	add	ip, pc, #0
     801c:	e28cca01 	add	ip, ip, #4096	; 0x1000
-    8020:	e5bcf000 	ldr	pc, \[ip\]!
+    8020:	e5bcf000 	ldr	pc, \[ip, #0\]!
 
 Disassembly of section \.text:
 

ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d

@@ -7,7 +7,7 @@ Disassembly of section .text:
     1004:	00000000 	andeq	r0, r0, r0
 
 00001008 <__bar_veneer>:
-    1008:	e59fc000 	ldr	ip, \[pc, #0\]	; 1010 <__bar_veneer\+0x8>
+    1008:	e59fc000 	ldr	ip, \[pc\]	; 1010 <__bar_veneer\+0x8>
     100c:	e08ff00c 	add	pc, pc, ip
     1010:	0200000c 	.word	0x0200000c
     1014:	00000000 	.word	0x00000000

ld/testsuite/ld-arm/farcall-arm-thumb.d

@@ -7,7 +7,7 @@ Disassembly of section .text:
     1004:	00000000 	andeq	r0, r0, r0
 
 00001008 <__bar_from_arm>:
-    1008:	e59fc000 	ldr	ip, \[pc, #0\]	; 1010 <__bar_from_arm\+0x8>
+    1008:	e59fc000 	ldr	ip, \[pc\]	; 1010 <__bar_from_arm\+0x8>
     100c:	e12fff1c 	bx	ip
     1010:	02001015 	.word	0x02001015
     1014:	00000000 	.word	0x00000000

ld/testsuite/ld-arm/farcall-group-size2.d

@@ -8,7 +8,7 @@ Disassembly of section .text:
     1004:	eb000002 	bl	1014 <__bar2_veneer>
 
 00001008 <__bar_from_arm>:
-    1008:	e59fc000 	ldr	ip, \[pc, #0\]	; 1010 <__bar_from_arm\+0x8>
+    1008:	e59fc000 	ldr	ip, \[pc\]	; 1010 <__bar_from_arm\+0x8>
     100c:	e12fff1c 	bx	ip
     1010:	02003021 	.word	0x02003021
 
@@ -24,12 +24,12 @@ Disassembly of section .text:
     102c:	00000000 	andeq	r0, r0, r0
 
 00001030 <__bar5_from_arm>:
-    1030:	e59fc000 	ldr	ip, \[pc, #0\]	; 1038 <__bar5_from_arm\+0x8>
+    1030:	e59fc000 	ldr	ip, \[pc\]	; 1038 <__bar5_from_arm\+0x8>
     1034:	e12fff1c 	bx	ip
     1038:	0200302f 	.word	0x0200302f
 
 0000103c <__bar4_from_arm>:
-    103c:	e59fc000 	ldr	ip, \[pc, #0\]	; 1044 <__bar4_from_arm\+0x8>
+    103c:	e59fc000 	ldr	ip, \[pc\]	; 1044 <__bar4_from_arm\+0x8>
     1040:	e12fff1c 	bx	ip
     1044:	0200302d 	.word	0x0200302d
 

ld/testsuite/ld-arm/farcall-group.d

@@ -14,12 +14,12 @@ Disassembly of section .text:
     1014:	00000000 	andeq	r0, r0, r0
 
 00001018 <__bar5_from_arm>:
-    1018:	e59fc000 	ldr	ip, \[pc, #0\]	; 1020 <__bar5_from_arm\+0x8>
+    1018:	e59fc000 	ldr	ip, \[pc\]	; 1020 <__bar5_from_arm\+0x8>
     101c:	e12fff1c 	bx	ip
     1020:	0200302f 	.word	0x0200302f
 
 00001024 <__bar4_from_arm>:
-    1024:	e59fc000 	ldr	ip, \[pc, #0\]	; 102c <__bar4_from_arm\+0x8>
+    1024:	e59fc000 	ldr	ip, \[pc\]	; 102c <__bar4_from_arm\+0x8>
     1028:	e12fff1c 	bx	ip
     102c:	0200302d 	.word	0x0200302d
 
@@ -28,7 +28,7 @@ Disassembly of section .text:
     1034:	02003028 	.word	0x02003028
 
 00001038 <__bar_from_arm>:
-    1038:	e59fc000 	ldr	ip, \[pc, #0\]	; 1040 <__bar_from_arm\+0x8>
+    1038:	e59fc000 	ldr	ip, \[pc\]	; 1040 <__bar_from_arm\+0x8>
     103c:	e12fff1c 	bx	ip
     1040:	02003021 	.word	0x02003021
 

ld/testsuite/ld-arm/farcall-mix.d

@@ -12,18 +12,18 @@ Disassembly of section .text:
     1014:	00000000 	andeq	r0, r0, r0
 
 00001018 <__bar_from_arm>:
-    1018:	e59fc000 	ldr	ip, \[pc, #0\]	; 1020 <__bar_from_arm\+0x8>
+    1018:	e59fc000 	ldr	ip, \[pc\]	; 1020 <__bar_from_arm\+0x8>
     101c:	e12fff1c 	bx	ip
     1020:	02002021 	.word	0x02002021
 00001024 <__bar3_veneer>:
     1024:	e51ff004 	ldr	pc, \[pc, #-4\]	; 1028 <__bar3_veneer\+0x4>
     1028:	02002028 	.word	0x02002028
 0000102c <__bar5_from_arm>:
-    102c:	e59fc000 	ldr	ip, \[pc, #0\]	; 1034 <__bar5_from_arm\+0x8>
+    102c:	e59fc000 	ldr	ip, \[pc\]	; 1034 <__bar5_from_arm\+0x8>
     1030:	e12fff1c 	bx	ip
     1034:	0200202f 	.word	0x0200202f
 00001038 <__bar4_from_arm>:
-    1038:	e59fc000 	ldr	ip, \[pc, #0\]	; 1040 <__bar4_from_arm\+0x8>
+    1038:	e59fc000 	ldr	ip, \[pc\]	; 1040 <__bar4_from_arm\+0x8>
     103c:	e12fff1c 	bx	ip
     1040:	0200202d 	.word	0x0200202d
 

ld/testsuite/ld-arm/farcall-mix2.d

@@ -8,7 +8,7 @@ Disassembly of section .text:
     1004:	eb000002 	bl	1014 <__bar2_veneer>
 
 00001008 <__bar_from_arm>:
-    1008:	e59fc000 	ldr	ip, \[pc, #0\]	; 1010 <__bar_from_arm\+0x8>
+    1008:	e59fc000 	ldr	ip, \[pc\]	; 1010 <__bar_from_arm\+0x8>
     100c:	e12fff1c 	bx	ip
     1010:	02003021 	.word	0x02003021
 00001014 <__bar2_veneer>:
@@ -28,12 +28,12 @@ Disassembly of section .mytext:
     2014:	02003028 	.word	0x02003028
 
 00002018 <__bar4_from_arm>:
-    2018:	e59fc000 	ldr	ip, \[pc, #0\]	; 2020 <__bar4_from_arm\+0x8>
+    2018:	e59fc000 	ldr	ip, \[pc\]	; 2020 <__bar4_from_arm\+0x8>
     201c:	e12fff1c 	bx	ip
     2020:	0200302d 	.word	0x0200302d
 
 00002024 <__bar5_from_arm>:
-    2024:	e59fc000 	ldr	ip, \[pc, #0\]	; 202c <__bar5_from_arm\+0x8>
+    2024:	e59fc000 	ldr	ip, \[pc\]	; 202c <__bar5_from_arm\+0x8>
     2028:	e12fff1c 	bx	ip
     202c:	0200302f 	.word	0x0200302f
 	...

ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d

@@ -62,28 +62,28 @@ Disassembly of section .text:
 .* <__app_func_from_thumb>:
  .*:	4778      	bx	pc
  .*:	46c0      	nop			; \(mov r8, r8\)
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 100033c <__app_func_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 100033c <__app_func_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff68 	.word	0xfeffff68
 
 .* <__lib_func4_from_thumb>:
  .*:	4778      	bx	pc
  .*:	46c0      	nop			; \(mov r8, r8\)
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 100034c <__lib_func4_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 100034c <__lib_func4_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff88 	.word	0xfeffff88
 
 .* <__app_func_weak_from_thumb>:
  .*:	4778      	bx	pc
  .*:	46c0      	nop			; \(mov r8, r8\)
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 100035c <__app_func_weak_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 100035c <__app_func_weak_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff58 	.word	0xfeffff58
 
 .* <__lib_func3_from_thumb>:
  .*:	4778      	bx	pc
  .*:	46c0      	nop			; \(mov r8, r8\)
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 100036c <__lib_func3_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 100036c <__lib_func3_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff58 	.word	0xfeffff58
 	...
@@ -99,14 +99,14 @@ Disassembly of section .text:
 .* <__app_func_weak_from_thumb>:
  .*:	4778      	bx	pc
  .*:	46c0      	nop			; \(mov r8, r8\)
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 200038c <__app_func_weak_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 200038c <__app_func_weak_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	fdffff28 	.word	0xfdffff28
 
 .* <__app_func_from_thumb>:
  .*:	4778      	bx	pc
  .*:	46c0      	nop			; \(mov r8, r8\)
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 200039c <__app_func_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 200039c <__app_func_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	fdffff08 	.word	0xfdffff08
 

ld/testsuite/ld-arm/farcall-mixed-lib.d

@@ -52,22 +52,22 @@ Disassembly of section .text:
  .*:	46c0      	nop			; \(mov r8, r8\)
 
 .* <__lib_func3_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 1000328 <__lib_func3_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 1000328 <__lib_func3_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
  .*:	feffff90 	.word	0xfeffff90
 
 .* <__app_func_weak_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 1000334 <__app_func_weak_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 1000334 <__app_func_weak_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
  .*:	feffff78 	.word	0xfeffff78
 
 .* <__lib_func4_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 1000340 <__lib_func4_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 1000340 <__lib_func4_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
  .*:	feffff84 	.word	0xfeffff84
 
 .* <__app_func_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 100034c <__app_func_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 100034c <__app_func_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
  .*:	feffff54 	.word	0xfeffff54
 	...
@@ -81,12 +81,12 @@ Disassembly of section .text:
  .*:	46c0      	nop			; \(mov r8, r8\)
 
 .* <__app_func_weak_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 2000378 <__app_func_weak_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 2000378 <__app_func_weak_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
  .*:	fdffff34 	.word	0xfdffff34
 
 .* <__app_func_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 2000384 <__app_func_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc\]	; 2000384 <__app_func_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
  .*:	fdffff1c 	.word	0xfdffff1c
 	...

ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d

@@ -8,7 +8,7 @@ Disassembly of section .text:
  1f01014:	f0ff effe 	blx	2001014 <bar>
 
 01f01018 <__bar_from_thumb>:
- 1f01018:	e59fc000 	ldr	ip, \[pc, #0\]	; 1f01020 <__bar_from_thumb\+0x8>
+ 1f01018:	e59fc000 	ldr	ip, \[pc\]	; 1f01020 <__bar_from_thumb\+0x8>
  1f0101c:	e08ff00c 	add	pc, pc, ip
  1f01020:	000ffff0 	.word	0x000ffff0
  1f01024:	00000000 	.word	0x00000000

ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d

@@ -10,7 +10,7 @@ Disassembly of section .text:
 01f01018 <__bar_from_thumb>:
  1f01018:	4778      	bx	pc
  1f0101a:	46c0      	nop			; \(mov r8, r8\)
- 1f0101c:	e59fc000 	ldr	ip, \[pc, #0\]	; 1f01024 <__bar_from_thumb\+0xc>
+ 1f0101c:	e59fc000 	ldr	ip, \[pc\]	; 1f01024 <__bar_from_thumb\+0xc>
  1f01020:	e08cf00f 	add	pc, ip, pc
  1f01024:	000fffec 	.word	0x000fffec
 

ld/testsuite/ld-arm/farcall-thumb-thumb.d

@@ -10,7 +10,7 @@ Disassembly of section .text:
 00001008 <__bar_veneer>:
     1008:	4778      	bx	pc
     100a:	46c0      	nop			; \(mov r8, r8\)
-    100c:	e59fc000 	ldr	ip, \[pc, #0\]	; 1014 <__bar_veneer\+0xc>
+    100c:	e59fc000 	ldr	ip, \[pc\]	; 1014 <__bar_veneer\+0xc>
     1010:	e12fff1c 	bx	ip
     1014:	02001015 	.word	0x02001015
 Disassembly of section .foo:

ld/testsuite/ld-arm/ifunc-10.dd

@@ -268,8 +268,8 @@ Disassembly of section \.text:
     a028:	eb0017f4 	bl	10000 <foo>
     a02c:	ea0017f3 	b	10000 <foo>
     a030:	0a0017f2 	beq	10000 <foo>
-    a034:	e59f4000 	ldr	r4, \[pc, #0\]	; a03c <_start\+0x14>
+    a034:	e59f4000 	ldr	r4, \[pc\]	; a03c <_start\+0x14>
-    a038:	e59f4000 	ldr	r4, \[pc, #0\]	; a040 <_start\+0x18>
+    a038:	e59f4000 	ldr	r4, \[pc\]	; a040 <_start\+0x18>
 #------------------------------------------------------------------------------
 #------ .got offset for foo
 #------------------------------------------------------------------------------
@@ -290,8 +290,8 @@ Disassembly of section \.text:
 #------ aaf1's .iplt entry
 #------------------------------------------------------------------------------
     a04c:	0afffc1c 	beq	90c4 <atf3-0x5c>
-    a050:	e59f4000 	ldr	r4, \[pc, #0\]	; a058 <_start\+0x30>
+    a050:	e59f4000 	ldr	r4, \[pc\]	; a058 <_start\+0x30>
-    a054:	e59f4000 	ldr	r4, \[pc, #0\]	; a05c <_start\+0x34>
+    a054:	e59f4000 	ldr	r4, \[pc\]	; a05c <_start\+0x34>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf1's .iplt entry
 #------------------------------------------------------------------------------
@@ -312,8 +312,8 @@ Disassembly of section \.text:
 #------ taf1's .iplt entry
 #------------------------------------------------------------------------------
     a068:	0afffc20 	beq	90f0 <atf3-0x30>
-    a06c:	e59f4000 	ldr	r4, \[pc, #0\]	; a074 <_start\+0x4c>
+    a06c:	e59f4000 	ldr	r4, \[pc\]	; a074 <_start\+0x4c>
-    a070:	e59f4000 	ldr	r4, \[pc, #0\]	; a078 <_start\+0x50>
+    a070:	e59f4000 	ldr	r4, \[pc\]	; a078 <_start\+0x50>
 #------------------------------------------------------------------------------
 #------ .got offset for taf1's .iplt entry
 #------------------------------------------------------------------------------
@@ -334,8 +334,8 @@ Disassembly of section \.text:
 #------ abf1's .iplt entry
 #------------------------------------------------------------------------------
     a084:	0afffc16 	beq	90e4 <atf3-0x3c>
-    a088:	e59f4000 	ldr	r4, \[pc, #0\]	; a090 <_start\+0x68>
+    a088:	e59f4000 	ldr	r4, \[pc\]	; a090 <_start\+0x68>
-    a08c:	e59f4000 	ldr	r4, \[pc, #0\]	; a094 <_start\+0x6c>
+    a08c:	e59f4000 	ldr	r4, \[pc\]	; a094 <_start\+0x6c>
 #------------------------------------------------------------------------------
 #------ .got offset for abf1's .iplt entry
 #------------------------------------------------------------------------------
@@ -356,8 +356,8 @@ Disassembly of section \.text:
 #------ tbf1's .iplt entry
 #------------------------------------------------------------------------------
     a0a0:	0afffc1a 	beq	9110 <atf3-0x10>
-    a0a4:	e59f4000 	ldr	r4, \[pc, #0\]	; a0ac <_start\+0x84>
+    a0a4:	e59f4000 	ldr	r4, \[pc\]	; a0ac <_start\+0x84>
-    a0a8:	e59f4000 	ldr	r4, \[pc, #0\]	; a0b0 <_start\+0x88>
+    a0a8:	e59f4000 	ldr	r4, \[pc\]	; a0b0 <_start\+0x88>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf1's .iplt entry
 #------------------------------------------------------------------------------
@@ -378,8 +378,8 @@ Disassembly of section \.text:
 #------ aaf2's .plt entry
 #------------------------------------------------------------------------------
     a0bc:	0afffbe6 	beq	905c <atf3-0xc4>
-    a0c0:	e59f4000 	ldr	r4, \[pc, #0\]	; a0c8 <_start\+0xa0>
+    a0c0:	e59f4000 	ldr	r4, \[pc\]	; a0c8 <_start\+0xa0>
-    a0c4:	e59f4000 	ldr	r4, \[pc, #0\]	; a0cc <_start\+0xa4>
+    a0c4:	e59f4000 	ldr	r4, \[pc\]	; a0cc <_start\+0xa4>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf2
 #------------------------------------------------------------------------------
@@ -400,8 +400,8 @@ Disassembly of section \.text:
 #------ taf2's .plt entry
 #------------------------------------------------------------------------------
     a0d8:	0afffbdc 	beq	9050 <atf3-0xd0>
-    a0dc:	e59f4000 	ldr	r4, \[pc, #0\]	; a0e4 <_start\+0xbc>
+    a0dc:	e59f4000 	ldr	r4, \[pc\]	; a0e4 <_start\+0xbc>
-    a0e0:	e59f4000 	ldr	r4, \[pc, #0\]	; a0e8 <_start\+0xc0>
+    a0e0:	e59f4000 	ldr	r4, \[pc\]	; a0e8 <_start\+0xc0>
 #------------------------------------------------------------------------------
 #------ .got offset for taf2
 #------------------------------------------------------------------------------
@@ -422,8 +422,8 @@ Disassembly of section \.text:
 #------ abf2's .plt entry
 #------------------------------------------------------------------------------
     a0f4:	0afffbef 	beq	90b8 <atf3-0x68>
-    a0f8:	e59f4000 	ldr	r4, \[pc, #0\]	; a100 <_start\+0xd8>
+    a0f8:	e59f4000 	ldr	r4, \[pc\]	; a100 <_start\+0xd8>
-    a0fc:	e59f4000 	ldr	r4, \[pc, #0\]	; a104 <_start\+0xdc>
+    a0fc:	e59f4000 	ldr	r4, \[pc\]	; a104 <_start\+0xdc>
 #------------------------------------------------------------------------------
 #------ .got offset for abf2
 #------------------------------------------------------------------------------
@@ -444,8 +444,8 @@ Disassembly of section \.text:
 #------ tbf2's .plt entry
 #------------------------------------------------------------------------------
     a110:	0afffbcb 	beq	9044 <atf3-0xdc>
-    a114:	e59f4000 	ldr	r4, \[pc, #0\]	; a11c <_start\+0xf4>
+    a114:	e59f4000 	ldr	r4, \[pc\]	; a11c <_start\+0xf4>
-    a118:	e59f4000 	ldr	r4, \[pc, #0\]	; a120 <_start\+0xf8>
+    a118:	e59f4000 	ldr	r4, \[pc\]	; a120 <_start\+0xf8>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf2
 #------------------------------------------------------------------------------
@@ -457,8 +457,8 @@ Disassembly of section \.text:
     a124:	ebfffc0f 	bl	9168 <aaf3>
     a128:	eafffc0e 	b	9168 <aaf3>
     a12c:	0afffc0d 	beq	9168 <aaf3>
-    a130:	e59f4000 	ldr	r4, \[pc, #0\]	; a138 <_start\+0x110>
+    a130:	e59f4000 	ldr	r4, \[pc\]	; a138 <_start\+0x110>
-    a134:	e59f4000 	ldr	r4, \[pc, #0\]	; a13c <_start\+0x114>
+    a134:	e59f4000 	ldr	r4, \[pc\]	; a13c <_start\+0x114>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf3
 #------------------------------------------------------------------------------
@@ -470,8 +470,8 @@ Disassembly of section \.text:
     a140:	ebfffc05 	bl	915c <taf3>
     a144:	eafffc04 	b	915c <taf3>
     a148:	0afffc03 	beq	915c <taf3>
-    a14c:	e59f4000 	ldr	r4, \[pc, #0\]	; a154 <_start\+0x12c>
+    a14c:	e59f4000 	ldr	r4, \[pc\]	; a154 <_start\+0x12c>
-    a150:	e59f4000 	ldr	r4, \[pc, #0\]	; a158 <_start\+0x130>
+    a150:	e59f4000 	ldr	r4, \[pc\]	; a158 <_start\+0x130>
 #------------------------------------------------------------------------------
 #------ .got offset for taf3
 #------------------------------------------------------------------------------
@@ -483,8 +483,8 @@ Disassembly of section \.text:
     a15c:	ebfffbf3 	bl	9130 <abf3>
     a160:	eafffbf2 	b	9130 <abf3>
     a164:	0afffbf1 	beq	9130 <abf3>
-    a168:	e59f4000 	ldr	r4, \[pc, #0\]	; a170 <_start\+0x148>
+    a168:	e59f4000 	ldr	r4, \[pc\]	; a170 <_start\+0x148>
-    a16c:	e59f4000 	ldr	r4, \[pc, #0\]	; a174 <_start\+0x14c>
+    a16c:	e59f4000 	ldr	r4, \[pc\]	; a174 <_start\+0x14c>
 #------------------------------------------------------------------------------
 #------ .got offset for abf3
 #------------------------------------------------------------------------------
@@ -496,8 +496,8 @@ Disassembly of section \.text:
     a178:	ebfffbf4 	bl	9150 <tbf3>
     a17c:	eafffbf3 	b	9150 <tbf3>
     a180:	0afffbf2 	beq	9150 <tbf3>
-    a184:	e59f4000 	ldr	r4, \[pc, #0\]	; a18c <_start\+0x164>
+    a184:	e59f4000 	ldr	r4, \[pc\]	; a18c <_start\+0x164>
-    a188:	e59f4000 	ldr	r4, \[pc, #0\]	; a190 <_start\+0x168>
+    a188:	e59f4000 	ldr	r4, \[pc\]	; a190 <_start\+0x168>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf3
 #------------------------------------------------------------------------------
@@ -518,8 +518,8 @@ Disassembly of section \.text:
 #------ aaf4's .plt entry
 #------------------------------------------------------------------------------
     a19c:	0afffba0 	beq	9024 <atf3-0xfc>
-    a1a0:	e59f4000 	ldr	r4, \[pc, #0\]	; a1a8 <_start\+0x180>
+    a1a0:	e59f4000 	ldr	r4, \[pc\]	; a1a8 <_start\+0x180>
-    a1a4:	e59f4000 	ldr	r4, \[pc, #0\]	; a1ac <_start\+0x184>
+    a1a4:	e59f4000 	ldr	r4, \[pc\]	; a1ac <_start\+0x184>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf4
 #------------------------------------------------------------------------------
@@ -540,8 +540,8 @@ Disassembly of section \.text:
 #------ taf4's .plt entry
 #------------------------------------------------------------------------------
     a1b8:	0afffbba 	beq	90a8 <atf3-0x78>
-    a1bc:	e59f4000 	ldr	r4, \[pc, #0\]	; a1c4 <_start\+0x19c>
+    a1bc:	e59f4000 	ldr	r4, \[pc\]	; a1c4 <_start\+0x19c>
-    a1c0:	e59f4000 	ldr	r4, \[pc, #0\]	; a1c8 <_start\+0x1a0>
+    a1c0:	e59f4000 	ldr	r4, \[pc\]	; a1c8 <_start\+0x1a0>
 #------------------------------------------------------------------------------
 #------ .got offset for taf4
 #------------------------------------------------------------------------------
@@ -562,8 +562,8 @@ Disassembly of section \.text:
 #------ abf4's .plt entry
 #------------------------------------------------------------------------------
     a1d4:	0afffba4 	beq	906c <atf3-0xb4>
-    a1d8:	e59f4000 	ldr	r4, \[pc, #0\]	; a1e0 <_start\+0x1b8>
+    a1d8:	e59f4000 	ldr	r4, \[pc\]	; a1e0 <_start\+0x1b8>
-    a1dc:	e59f4000 	ldr	r4, \[pc, #0\]	; a1e4 <_start\+0x1bc>
+    a1dc:	e59f4000 	ldr	r4, \[pc\]	; a1e4 <_start\+0x1bc>
 #------------------------------------------------------------------------------
 #------ .got offset for abf4
 #------------------------------------------------------------------------------
@@ -584,8 +584,8 @@ Disassembly of section \.text:
 #------ tbf4's .plt entry
 #------------------------------------------------------------------------------
     a1f0:	0afffba1 	beq	907c <atf3-0xa4>
-    a1f4:	e59f4000 	ldr	r4, \[pc, #0\]	; a1fc <_start\+0x1d4>
+    a1f4:	e59f4000 	ldr	r4, \[pc\]	; a1fc <_start\+0x1d4>
-    a1f8:	e59f4000 	ldr	r4, \[pc, #0\]	; a200 <_start\+0x1d8>
+    a1f8:	e59f4000 	ldr	r4, \[pc\]	; a200 <_start\+0x1d8>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf4
 #------------------------------------------------------------------------------

ld/testsuite/ld-arm/ifunc-3.dd

@@ -58,8 +58,8 @@ Disassembly of section \.text:
 
 0000a010 <arm>:
     a010:	eb0017fa 	bl	10000 <foo>
-    a014:	e59f4000 	ldr	r4, \[pc, #0\]	; a01c <arm\+0xc>
+    a014:	e59f4000 	ldr	r4, \[pc\]	; a01c <arm\+0xc>
-    a018:	e59f4000 	ldr	r4, \[pc, #0\]	; a020 <arm\+0x10>
+    a018:	e59f4000 	ldr	r4, \[pc\]	; a020 <arm\+0x10>
 #------------------------------------------------------------------------------
 #------ .got offset for foo
 #------------------------------------------------------------------------------
@@ -72,8 +72,8 @@ Disassembly of section \.text:
 #------ f1's .iplt entry
 #------------------------------------------------------------------------------
     a024:	ebfffbfd 	bl	9020 <f1-0xfe0>
-    a028:	e59f4000 	ldr	r4, \[pc, #0\]	; a030 <arm\+0x20>
+    a028:	e59f4000 	ldr	r4, \[pc\]	; a030 <arm\+0x20>
-    a02c:	e59f4000 	ldr	r4, \[pc, #0\]	; a034 <arm\+0x24>
+    a02c:	e59f4000 	ldr	r4, \[pc\]	; a034 <arm\+0x24>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -86,8 +86,8 @@ Disassembly of section \.text:
 #------ f2's .plt entry
 #------------------------------------------------------------------------------
     a038:	ebfffbf5 	bl	9014 <f1-0xfec>
-    a03c:	e59f4000 	ldr	r4, \[pc, #0\]	; a044 <arm\+0x34>
+    a03c:	e59f4000 	ldr	r4, \[pc\]	; a044 <arm\+0x34>
-    a040:	e59f4000 	ldr	r4, \[pc, #0\]	; a048 <arm\+0x38>
+    a040:	e59f4000 	ldr	r4, \[pc\]	; a048 <arm\+0x38>
 #------------------------------------------------------------------------------
 #------ .got offset for f2
 #------------------------------------------------------------------------------
@@ -100,8 +100,8 @@ Disassembly of section \.text:
 #------ f3's .iplt entry
 #------------------------------------------------------------------------------
     a04c:	ebfffbf6 	bl	902c <f1-0xfd4>
-    a050:	e59f4000 	ldr	r4, \[pc, #0\]	; a058 <arm\+0x48>
+    a050:	e59f4000 	ldr	r4, \[pc\]	; a058 <arm\+0x48>
-    a054:	e59f4000 	ldr	r4, \[pc, #0\]	; a05c <arm\+0x4c>
+    a054:	e59f4000 	ldr	r4, \[pc\]	; a05c <arm\+0x4c>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -114,8 +114,8 @@ Disassembly of section \.text:
 #------ f4's .iplt entry
 #------------------------------------------------------------------------------
     a060:	ebfffbf4 	bl	9038 <f1-0xfc8>
-    a064:	e59f4000 	ldr	r4, \[pc, #0\]	; a06c <arm\+0x5c>
+    a064:	e59f4000 	ldr	r4, \[pc\]	; a06c <arm\+0x5c>
-    a068:	e59f4000 	ldr	r4, \[pc, #0\]	; a070 <arm\+0x60>
+    a068:	e59f4000 	ldr	r4, \[pc\]	; a070 <arm\+0x60>
 #------------------------------------------------------------------------------
 #------ .got offset for f4
 #------------------------------------------------------------------------------

ld/testsuite/ld-arm/ifunc-4.dd

@@ -324,8 +324,8 @@ Disassembly of section \.text:
     a050:	eb0017ea 	bl	10000 <foo>
     a054:	ea0017e9 	b	10000 <foo>
     a058:	0a0017e8 	beq	10000 <foo>
-    a05c:	e59f4000 	ldr	r4, \[pc, #0\]	; a064 <arm\+0x14>
+    a05c:	e59f4000 	ldr	r4, \[pc\]	; a064 <arm\+0x14>
-    a060:	e59f4000 	ldr	r4, \[pc, #0\]	; a068 <arm\+0x18>
+    a060:	e59f4000 	ldr	r4, \[pc\]	; a068 <arm\+0x18>
 #------------------------------------------------------------------------------
 #------ .got offset for foo
 #------------------------------------------------------------------------------
@@ -346,8 +346,8 @@ Disassembly of section \.text:
 #------ aaf1's .iplt entry
 #------------------------------------------------------------------------------
     a074:	0afffbfc 	beq	906c <aaf1-0xf94>
-    a078:	e59f4000 	ldr	r4, \[pc, #0\]	; a080 <arm\+0x30>
+    a078:	e59f4000 	ldr	r4, \[pc\]	; a080 <arm\+0x30>
-    a07c:	e59f4000 	ldr	r4, \[pc, #0\]	; a084 <arm\+0x34>
+    a07c:	e59f4000 	ldr	r4, \[pc\]	; a084 <arm\+0x34>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of aaf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -368,8 +368,8 @@ Disassembly of section \.text:
 #------ taf1's .iplt entry
 #------------------------------------------------------------------------------
     a090:	0afffc00 	beq	9098 <aaf1-0xf68>
-    a094:	e59f4000 	ldr	r4, \[pc, #0\]	; a09c <arm\+0x4c>
+    a094:	e59f4000 	ldr	r4, \[pc\]	; a09c <arm\+0x4c>
-    a098:	e59f4000 	ldr	r4, \[pc, #0\]	; a0a0 <arm\+0x50>
+    a098:	e59f4000 	ldr	r4, \[pc\]	; a0a0 <arm\+0x50>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of taf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -390,8 +390,8 @@ Disassembly of section \.text:
 #------ abf1's .iplt entry
 #------------------------------------------------------------------------------
     a0ac:	0afffbf6 	beq	908c <aaf1-0xf74>
-    a0b0:	e59f4000 	ldr	r4, \[pc, #0\]	; a0b8 <arm\+0x68>
+    a0b0:	e59f4000 	ldr	r4, \[pc\]	; a0b8 <arm\+0x68>
-    a0b4:	e59f4000 	ldr	r4, \[pc, #0\]	; a0bc <arm\+0x6c>
+    a0b4:	e59f4000 	ldr	r4, \[pc\]	; a0bc <arm\+0x6c>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of abf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -412,8 +412,8 @@ Disassembly of section \.text:
 #------ tbf1's .iplt entry
 #------------------------------------------------------------------------------
     a0c8:	0afffbfa 	beq	90b8 <aaf1-0xf48>
-    a0cc:	e59f4000 	ldr	r4, \[pc, #0\]	; a0d4 <arm\+0x84>
+    a0cc:	e59f4000 	ldr	r4, \[pc\]	; a0d4 <arm\+0x84>
-    a0d0:	e59f4000 	ldr	r4, \[pc, #0\]	; a0d8 <arm\+0x88>
+    a0d0:	e59f4000 	ldr	r4, \[pc\]	; a0d8 <arm\+0x88>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of tbf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -434,8 +434,8 @@ Disassembly of section \.text:
 #------ aaf2's .plt entry
 #------------------------------------------------------------------------------
     a0e4:	0afffbd9 	beq	9050 <aaf1-0xfb0>
-    a0e8:	e59f4000 	ldr	r4, \[pc, #0\]	; a0f0 <arm\+0xa0>
+    a0e8:	e59f4000 	ldr	r4, \[pc\]	; a0f0 <arm\+0xa0>
-    a0ec:	e59f4000 	ldr	r4, \[pc, #0\]	; a0f4 <arm\+0xa4>
+    a0ec:	e59f4000 	ldr	r4, \[pc\]	; a0f4 <arm\+0xa4>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf2
 #------------------------------------------------------------------------------
@@ -456,8 +456,8 @@ Disassembly of section \.text:
 #------ taf2's .plt entry
 #------------------------------------------------------------------------------
     a100:	0afffbcf 	beq	9044 <aaf1-0xfbc>
-    a104:	e59f4000 	ldr	r4, \[pc, #0\]	; a10c <arm\+0xbc>
+    a104:	e59f4000 	ldr	r4, \[pc\]	; a10c <arm\+0xbc>
-    a108:	e59f4000 	ldr	r4, \[pc, #0\]	; a110 <arm\+0xc0>
+    a108:	e59f4000 	ldr	r4, \[pc\]	; a110 <arm\+0xc0>
 #------------------------------------------------------------------------------
 #------ .got offset for taf2
 #------------------------------------------------------------------------------
@@ -478,8 +478,8 @@ Disassembly of section \.text:
 #------ abf2's .plt entry
 #------------------------------------------------------------------------------
     a11c:	0afffbcf 	beq	9060 <aaf1-0xfa0>
-    a120:	e59f4000 	ldr	r4, \[pc, #0\]	; a128 <arm\+0xd8>
+    a120:	e59f4000 	ldr	r4, \[pc\]	; a128 <arm\+0xd8>
-    a124:	e59f4000 	ldr	r4, \[pc, #0\]	; a12c <arm\+0xdc>
+    a124:	e59f4000 	ldr	r4, \[pc\]	; a12c <arm\+0xdc>
 #------------------------------------------------------------------------------
 #------ .got offset for abf2
 #------------------------------------------------------------------------------
@@ -500,8 +500,8 @@ Disassembly of section \.text:
 #------ tbf2's .plt entry
 #------------------------------------------------------------------------------
     a138:	0afffbbe 	beq	9038 <aaf1-0xfc8>
-    a13c:	e59f4000 	ldr	r4, \[pc, #0\]	; a144 <arm\+0xf4>
+    a13c:	e59f4000 	ldr	r4, \[pc\]	; a144 <arm\+0xf4>
-    a140:	e59f4000 	ldr	r4, \[pc, #0\]	; a148 <arm\+0xf8>
+    a140:	e59f4000 	ldr	r4, \[pc\]	; a148 <arm\+0xf8>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf2
 #------------------------------------------------------------------------------
@@ -522,8 +522,8 @@ Disassembly of section \.text:
 #------ aaf3's .iplt entry
 #------------------------------------------------------------------------------
     a154:	0afffbfc 	beq	914c <aaf1-0xeb4>
-    a158:	e59f4000 	ldr	r4, \[pc, #0\]	; a160 <arm\+0x110>
+    a158:	e59f4000 	ldr	r4, \[pc\]	; a160 <arm\+0x110>
-    a15c:	e59f4000 	ldr	r4, \[pc, #0\]	; a164 <arm\+0x114>
+    a15c:	e59f4000 	ldr	r4, \[pc\]	; a164 <arm\+0x114>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of aaf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -544,8 +544,8 @@ Disassembly of section \.text:
 #------ taf3's .iplt entry
 #------------------------------------------------------------------------------
     a170:	0afffbe6 	beq	9110 <aaf1-0xef0>
-    a174:	e59f4000 	ldr	r4, \[pc, #0\]	; a17c <arm\+0x12c>
+    a174:	e59f4000 	ldr	r4, \[pc\]	; a17c <arm\+0x12c>
-    a178:	e59f4000 	ldr	r4, \[pc, #0\]	; a180 <arm\+0x130>
+    a178:	e59f4000 	ldr	r4, \[pc\]	; a180 <arm\+0x130>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of taf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -566,8 +566,8 @@ Disassembly of section \.text:
 #------ abf3's .iplt entry
 #------------------------------------------------------------------------------
     a18c:	0afffbd4 	beq	90e4 <aaf1-0xf1c>
-    a190:	e59f4000 	ldr	r4, \[pc, #0\]	; a198 <arm\+0x148>
+    a190:	e59f4000 	ldr	r4, \[pc\]	; a198 <arm\+0x148>
-    a194:	e59f4000 	ldr	r4, \[pc, #0\]	; a19c <arm\+0x14c>
+    a194:	e59f4000 	ldr	r4, \[pc\]	; a19c <arm\+0x14c>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of abf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -588,8 +588,8 @@ Disassembly of section \.text:
 #------ tbf3's .iplt entry
 #------------------------------------------------------------------------------
     a1a8:	0afffbd5 	beq	9104 <aaf1-0xefc>
-    a1ac:	e59f4000 	ldr	r4, \[pc, #0\]	; a1b4 <arm\+0x164>
+    a1ac:	e59f4000 	ldr	r4, \[pc\]	; a1b4 <arm\+0x164>
-    a1b0:	e59f4000 	ldr	r4, \[pc, #0\]	; a1b8 <arm\+0x168>
+    a1b0:	e59f4000 	ldr	r4, \[pc\]	; a1b8 <arm\+0x168>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of tbf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -610,8 +610,8 @@ Disassembly of section \.text:
 #------ aaf4's .iplt entry
 #------------------------------------------------------------------------------
     a1c4:	0afffbbe 	beq	90c4 <aaf1-0xf3c>
-    a1c8:	e59f4000 	ldr	r4, \[pc, #0\]	; a1d0 <arm\+0x180>
+    a1c8:	e59f4000 	ldr	r4, \[pc\]	; a1d0 <arm\+0x180>
-    a1cc:	e59f4000 	ldr	r4, \[pc, #0\]	; a1d4 <arm\+0x184>
+    a1cc:	e59f4000 	ldr	r4, \[pc\]	; a1d4 <arm\+0x184>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf4
 #------------------------------------------------------------------------------
@@ -632,8 +632,8 @@ Disassembly of section \.text:
 #------ taf4's .iplt entry
 #------------------------------------------------------------------------------
     a1e0:	0afffbe0 	beq	9168 <aaf1-0xe98>
-    a1e4:	e59f4000 	ldr	r4, \[pc, #0\]	; a1ec <arm\+0x19c>
+    a1e4:	e59f4000 	ldr	r4, \[pc\]	; a1ec <arm\+0x19c>
-    a1e8:	e59f4000 	ldr	r4, \[pc, #0\]	; a1f0 <arm\+0x1a0>
+    a1e8:	e59f4000 	ldr	r4, \[pc\]	; a1f0 <arm\+0x1a0>
 #------------------------------------------------------------------------------
 #------ .got offset for taf4
 #------------------------------------------------------------------------------
@@ -654,8 +654,8 @@ Disassembly of section \.text:
 #------ abf4's .iplt entry
 #------------------------------------------------------------------------------
     a1fc:	0afffbc7 	beq	9120 <aaf1-0xee0>
-    a200:	e59f4000 	ldr	r4, \[pc, #0\]	; a208 <arm\+0x1b8>
+    a200:	e59f4000 	ldr	r4, \[pc\]	; a208 <arm\+0x1b8>
-    a204:	e59f4000 	ldr	r4, \[pc, #0\]	; a20c <arm\+0x1bc>
+    a204:	e59f4000 	ldr	r4, \[pc\]	; a20c <arm\+0x1bc>
 #------------------------------------------------------------------------------
 #------ .got offset for abf4
 #------------------------------------------------------------------------------
@@ -676,8 +676,8 @@ Disassembly of section \.text:
 #------ tbf4's .iplt entry
 #------------------------------------------------------------------------------
     a218:	0afffbc4 	beq	9130 <aaf1-0xed0>
-    a21c:	e59f4000 	ldr	r4, \[pc, #0\]	; a224 <arm\+0x1d4>
+    a21c:	e59f4000 	ldr	r4, \[pc\]	; a224 <arm\+0x1d4>
-    a220:	e59f4000 	ldr	r4, \[pc, #0\]	; a228 <arm\+0x1d8>
+    a220:	e59f4000 	ldr	r4, \[pc\]	; a228 <arm\+0x1d8>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf4
 #------------------------------------------------------------------------------

ld/testsuite/ld-arm/ifunc-5.dd

@@ -37,8 +37,8 @@ Disassembly of section \.text:
 
 0000a00c <_start>:
     a00c:	eb0017fb 	bl	10000 <foo>
-    a010:	e59f4000 	ldr	r4, \[pc, #0\]	; a018 <_start\+0xc>
+    a010:	e59f4000 	ldr	r4, \[pc\]	; a018 <_start\+0xc>
-    a014:	e59f4000 	ldr	r4, \[pc, #0\]	; a01c <_start\+0x10>
+    a014:	e59f4000 	ldr	r4, \[pc\]	; a01c <_start\+0x10>
 #------------------------------------------------------------------------------
 #------ .got offset for foo
 #------------------------------------------------------------------------------
@@ -51,8 +51,8 @@ Disassembly of section \.text:
 #------ f1's .iplt entry
 #------------------------------------------------------------------------------
     a020:	ebfffbf6 	bl	9000 <__irel_end\+0xfe8>
-    a024:	e59f4000 	ldr	r4, \[pc, #0\]	; a02c <_start\+0x20>
+    a024:	e59f4000 	ldr	r4, \[pc\]	; a02c <_start\+0x20>
-    a028:	e59f4000 	ldr	r4, \[pc, #0\]	; a030 <_start\+0x24>
+    a028:	e59f4000 	ldr	r4, \[pc\]	; a030 <_start\+0x24>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -65,8 +65,8 @@ Disassembly of section \.text:
 #------ f2's .iplt entry
 #------------------------------------------------------------------------------
     a034:	ebfffbf7 	bl	9018 <__irel_end\+0x1000>
-    a038:	e59f4000 	ldr	r4, \[pc, #0\]	; a040 <_start\+0x34>
+    a038:	e59f4000 	ldr	r4, \[pc\]	; a040 <_start\+0x34>
-    a03c:	e59f4000 	ldr	r4, \[pc, #0\]	; a044 <_start\+0x38>
+    a03c:	e59f4000 	ldr	r4, \[pc\]	; a044 <_start\+0x38>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f2's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -79,8 +79,8 @@ Disassembly of section \.text:
 #------ f3's .iplt entry
 #------------------------------------------------------------------------------
     a048:	ebfffbef 	bl	900c <__irel_end\+0xff4>
-    a04c:	e59f4000 	ldr	r4, \[pc, #0\]	; a054 <_start\+0x48>
+    a04c:	e59f4000 	ldr	r4, \[pc\]	; a054 <_start\+0x48>
-    a050:	e59f4000 	ldr	r4, \[pc, #0\]	; a058 <_start\+0x4c>
+    a050:	e59f4000 	ldr	r4, \[pc\]	; a058 <_start\+0x4c>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f3's .igot.plt entry
 #------------------------------------------------------------------------------

ld/testsuite/ld-arm/ifunc-6.dd

@@ -15,7 +15,7 @@ Disassembly of section \.iplt:
 #------------------------------------------------------------------------------
     9004:	e28fc600 	add	ip, pc, #0
     9008:	e28cca08 	add	ip, ip, #32768	; 0x8000
-    900c:	e5bcf000 	ldr	pc, \[ip\]!
+    900c:	e5bcf000 	ldr	pc, \[ip, #0\]!
 #------------------------------------------------------------------------------
 #------ f2's .iplt entry
 #------------------------------------------------------------------------------
@@ -60,8 +60,8 @@ Disassembly of section \.text:
     a010:	eb0017fa 	bl	10000 <foo>
     a014:	ea0017f9 	b	10000 <foo>
     a018:	0a0017f8 	beq	10000 <foo>
-    a01c:	e59f4000 	ldr	r4, \[pc, #0\]	; a024 <_start\+0x14>
+    a01c:	e59f4000 	ldr	r4, \[pc\]	; a024 <_start\+0x14>
-    a020:	e59f4000 	ldr	r4, \[pc, #0\]	; a028 <_start\+0x18>
+    a020:	e59f4000 	ldr	r4, \[pc\]	; a028 <_start\+0x18>
 #------------------------------------------------------------------------------
 #------ .got offset for foo
 #------------------------------------------------------------------------------
@@ -82,8 +82,8 @@ Disassembly of section \.text:
 #------ f1's .iplt entry
 #------------------------------------------------------------------------------
     a034:	0afffbfc 	beq	902c <__irel_end\+0x100c>
-    a038:	e59f4000 	ldr	r4, \[pc, #0\]	; a040 <_start\+0x30>
+    a038:	e59f4000 	ldr	r4, \[pc\]	; a040 <_start\+0x30>
-    a03c:	e59f4000 	ldr	r4, \[pc, #0\]	; a044 <_start\+0x34>
+    a03c:	e59f4000 	ldr	r4, \[pc\]	; a044 <_start\+0x34>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -104,8 +104,8 @@ Disassembly of section \.text:
 #------ f2's .iplt entry
 #------------------------------------------------------------------------------
     a050:	0afffbee 	beq	9010 <__irel_end\+0xff0>
-    a054:	e59f4000 	ldr	r4, \[pc, #0\]	; a05c <_start\+0x4c>
+    a054:	e59f4000 	ldr	r4, \[pc\]	; a05c <_start\+0x4c>
-    a058:	e59f4000 	ldr	r4, \[pc, #0\]	; a060 <_start\+0x50>
+    a058:	e59f4000 	ldr	r4, \[pc\]	; a060 <_start\+0x50>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f2's .igot.plt entry
 #------------------------------------------------------------------------------

ld/testsuite/ld-arm/ifunc-7.dd

@@ -52,8 +52,8 @@ Disassembly of section \.text:
 
 0000a008 <arm>:
     a008:	eb0017fc 	bl	10000 <foo>
-    a00c:	e59f4000 	ldr	r4, \[pc, #0\]	; a014 <arm\+0xc>
+    a00c:	e59f4000 	ldr	r4, \[pc\]	; a014 <arm\+0xc>
-    a010:	e59f4000 	ldr	r4, \[pc, #0\]	; a018 <arm\+0x10>
+    a010:	e59f4000 	ldr	r4, \[pc\]	; a018 <arm\+0x10>
 #------------------------------------------------------------------------------
 #------ .got offset for foo
 #------------------------------------------------------------------------------
@@ -66,8 +66,8 @@ Disassembly of section \.text:
 #------ f1's .iplt entry
 #------------------------------------------------------------------------------
     a01c:	ebfffc02 	bl	902c <f1-0xfd4>
-    a020:	e59f4000 	ldr	r4, \[pc, #0\]	; a028 <arm\+0x20>
+    a020:	e59f4000 	ldr	r4, \[pc\]	; a028 <arm\+0x20>
-    a024:	e59f4000 	ldr	r4, \[pc, #0\]	; a02c <arm\+0x24>
+    a024:	e59f4000 	ldr	r4, \[pc\]	; a02c <arm\+0x24>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -80,8 +80,8 @@ Disassembly of section \.text:
 #------ f2's .plt entry
 #------------------------------------------------------------------------------
     a030:	ebfffbf7 	bl	9014 <f1-0xfec>
-    a034:	e59f4000 	ldr	r4, \[pc, #0\]	; a03c <arm\+0x34>
+    a034:	e59f4000 	ldr	r4, \[pc\]	; a03c <arm\+0x34>
-    a038:	e59f4000 	ldr	r4, \[pc, #0\]	; a040 <arm\+0x38>
+    a038:	e59f4000 	ldr	r4, \[pc\]	; a040 <arm\+0x38>
 #------------------------------------------------------------------------------
 #------ .got offset for f2
 #------------------------------------------------------------------------------
@@ -94,8 +94,8 @@ Disassembly of section \.text:
 #------ f3's .iplt entry
 #------------------------------------------------------------------------------
     a044:	ebfffbfb 	bl	9038 <f1-0xfc8>
-    a048:	e59f4000 	ldr	r4, \[pc, #0\]	; a050 <arm\+0x48>
+    a048:	e59f4000 	ldr	r4, \[pc\]	; a050 <arm\+0x48>
-    a04c:	e59f4000 	ldr	r4, \[pc, #0\]	; a054 <arm\+0x4c>
+    a04c:	e59f4000 	ldr	r4, \[pc\]	; a054 <arm\+0x4c>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of f3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -108,8 +108,8 @@ Disassembly of section \.text:
 #------ f4's .plt entry
 #------------------------------------------------------------------------------
     a058:	ebfffbf0 	bl	9020 <f1-0xfe0>
-    a05c:	e59f4000 	ldr	r4, \[pc, #0\]	; a064 <arm\+0x5c>
+    a05c:	e59f4000 	ldr	r4, \[pc\]	; a064 <arm\+0x5c>
-    a060:	e59f4000 	ldr	r4, \[pc, #0\]	; a068 <arm\+0x60>
+    a060:	e59f4000 	ldr	r4, \[pc\]	; a068 <arm\+0x60>
 #------------------------------------------------------------------------------
 #------ .got offset for f4
 #------------------------------------------------------------------------------

ld/testsuite/ld-arm/ifunc-8.dd

@@ -286,8 +286,8 @@ Disassembly of section \.text:
     a028:	eb0017f4 	bl	10000 <foo>
     a02c:	ea0017f3 	b	10000 <foo>
     a030:	0a0017f2 	beq	10000 <foo>
-    a034:	e59f4000 	ldr	r4, \[pc, #0\]	; a03c <arm\+0x14>
+    a034:	e59f4000 	ldr	r4, \[pc\]	; a03c <arm\+0x14>
-    a038:	e59f4000 	ldr	r4, \[pc, #0\]	; a040 <arm\+0x18>
+    a038:	e59f4000 	ldr	r4, \[pc\]	; a040 <arm\+0x18>
 #------------------------------------------------------------------------------
 #------ .got offset for foo
 #------------------------------------------------------------------------------
@@ -308,8 +308,8 @@ Disassembly of section \.text:
 #------ aaf1's .iplt entry
 #------------------------------------------------------------------------------
     a04c:	0afffc1c 	beq	90c4 <aaf1-0xf3c>
-    a050:	e59f4000 	ldr	r4, \[pc, #0\]	; a058 <arm\+0x30>
+    a050:	e59f4000 	ldr	r4, \[pc\]	; a058 <arm\+0x30>
-    a054:	e59f4000 	ldr	r4, \[pc, #0\]	; a05c <arm\+0x34>
+    a054:	e59f4000 	ldr	r4, \[pc\]	; a05c <arm\+0x34>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of aaf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -330,8 +330,8 @@ Disassembly of section \.text:
 #------ taf1's .iplt entry
 #------------------------------------------------------------------------------
     a068:	0afffc20 	beq	90f0 <aaf1-0xf10>
-    a06c:	e59f4000 	ldr	r4, \[pc, #0\]	; a074 <arm\+0x4c>
+    a06c:	e59f4000 	ldr	r4, \[pc\]	; a074 <arm\+0x4c>
-    a070:	e59f4000 	ldr	r4, \[pc, #0\]	; a078 <arm\+0x50>
+    a070:	e59f4000 	ldr	r4, \[pc\]	; a078 <arm\+0x50>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of taf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -352,8 +352,8 @@ Disassembly of section \.text:
 #------ abf1's .iplt entry
 #------------------------------------------------------------------------------
     a084:	0afffc16 	beq	90e4 <aaf1-0xf1c>
-    a088:	e59f4000 	ldr	r4, \[pc, #0\]	; a090 <arm\+0x68>
+    a088:	e59f4000 	ldr	r4, \[pc\]	; a090 <arm\+0x68>
-    a08c:	e59f4000 	ldr	r4, \[pc, #0\]	; a094 <arm\+0x6c>
+    a08c:	e59f4000 	ldr	r4, \[pc\]	; a094 <arm\+0x6c>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of abf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -374,8 +374,8 @@ Disassembly of section \.text:
 #------ tbf1's .iplt entry
 #------------------------------------------------------------------------------
     a0a0:	0afffc1a 	beq	9110 <aaf1-0xef0>
-    a0a4:	e59f4000 	ldr	r4, \[pc, #0\]	; a0ac <arm\+0x84>
+    a0a4:	e59f4000 	ldr	r4, \[pc\]	; a0ac <arm\+0x84>
-    a0a8:	e59f4000 	ldr	r4, \[pc, #0\]	; a0b0 <arm\+0x88>
+    a0a8:	e59f4000 	ldr	r4, \[pc\]	; a0b0 <arm\+0x88>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of tbf1's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -396,8 +396,8 @@ Disassembly of section \.text:
 #------ aaf2's .plt entry
 #------------------------------------------------------------------------------
     a0bc:	0afffbe6 	beq	905c <aaf1-0xfa4>
-    a0c0:	e59f4000 	ldr	r4, \[pc, #0\]	; a0c8 <arm\+0xa0>
+    a0c0:	e59f4000 	ldr	r4, \[pc\]	; a0c8 <arm\+0xa0>
-    a0c4:	e59f4000 	ldr	r4, \[pc, #0\]	; a0cc <arm\+0xa4>
+    a0c4:	e59f4000 	ldr	r4, \[pc\]	; a0cc <arm\+0xa4>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf2
 #------------------------------------------------------------------------------
@@ -418,8 +418,8 @@ Disassembly of section \.text:
 #------ taf2's .plt entry
 #------------------------------------------------------------------------------
     a0d8:	0afffbdc 	beq	9050 <aaf1-0xfb0>
-    a0dc:	e59f4000 	ldr	r4, \[pc, #0\]	; a0e4 <arm\+0xbc>
+    a0dc:	e59f4000 	ldr	r4, \[pc\]	; a0e4 <arm\+0xbc>
-    a0e0:	e59f4000 	ldr	r4, \[pc, #0\]	; a0e8 <arm\+0xc0>
+    a0e0:	e59f4000 	ldr	r4, \[pc\]	; a0e8 <arm\+0xc0>
 #------------------------------------------------------------------------------
 #------ .got offset for taf2
 #------------------------------------------------------------------------------
@@ -440,8 +440,8 @@ Disassembly of section \.text:
 #------ abf2's .plt entry
 #------------------------------------------------------------------------------
     a0f4:	0afffbef 	beq	90b8 <aaf1-0xf48>
-    a0f8:	e59f4000 	ldr	r4, \[pc, #0\]	; a100 <arm\+0xd8>
+    a0f8:	e59f4000 	ldr	r4, \[pc\]	; a100 <arm\+0xd8>
-    a0fc:	e59f4000 	ldr	r4, \[pc, #0\]	; a104 <arm\+0xdc>
+    a0fc:	e59f4000 	ldr	r4, \[pc\]	; a104 <arm\+0xdc>
 #------------------------------------------------------------------------------
 #------ .got offset for abf2
 #------------------------------------------------------------------------------
@@ -462,8 +462,8 @@ Disassembly of section \.text:
 #------ tbf2's .plt entry
 #------------------------------------------------------------------------------
     a110:	0afffbcb 	beq	9044 <aaf1-0xfbc>
-    a114:	e59f4000 	ldr	r4, \[pc, #0\]	; a11c <arm\+0xf4>
+    a114:	e59f4000 	ldr	r4, \[pc\]	; a11c <arm\+0xf4>
-    a118:	e59f4000 	ldr	r4, \[pc, #0\]	; a120 <arm\+0xf8>
+    a118:	e59f4000 	ldr	r4, \[pc\]	; a120 <arm\+0xf8>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf2
 #------------------------------------------------------------------------------
@@ -484,8 +484,8 @@ Disassembly of section \.text:
 #------ aaf3's .iplt entry
 #------------------------------------------------------------------------------
     a12c:	0afffc0d 	beq	9168 <aaf1-0xe98>
-    a130:	e59f4000 	ldr	r4, \[pc, #0\]	; a138 <arm\+0x110>
+    a130:	e59f4000 	ldr	r4, \[pc\]	; a138 <arm\+0x110>
-    a134:	e59f4000 	ldr	r4, \[pc, #0\]	; a13c <arm\+0x114>
+    a134:	e59f4000 	ldr	r4, \[pc\]	; a13c <arm\+0x114>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of aaf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -506,8 +506,8 @@ Disassembly of section \.text:
 #------ taf3's .iplt entry
 #------------------------------------------------------------------------------
     a148:	0afffc03 	beq	915c <aaf1-0xea4>
-    a14c:	e59f4000 	ldr	r4, \[pc, #0\]	; a154 <arm\+0x12c>
+    a14c:	e59f4000 	ldr	r4, \[pc\]	; a154 <arm\+0x12c>
-    a150:	e59f4000 	ldr	r4, \[pc, #0\]	; a158 <arm\+0x130>
+    a150:	e59f4000 	ldr	r4, \[pc\]	; a158 <arm\+0x130>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of taf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -528,8 +528,8 @@ Disassembly of section \.text:
 #------ abf3's .iplt entry
 #------------------------------------------------------------------------------
     a164:	0afffbf1 	beq	9130 <aaf1-0xed0>
-    a168:	e59f4000 	ldr	r4, \[pc, #0\]	; a170 <arm\+0x148>
+    a168:	e59f4000 	ldr	r4, \[pc\]	; a170 <arm\+0x148>
-    a16c:	e59f4000 	ldr	r4, \[pc, #0\]	; a174 <arm\+0x14c>
+    a16c:	e59f4000 	ldr	r4, \[pc\]	; a174 <arm\+0x14c>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of abf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -550,8 +550,8 @@ Disassembly of section \.text:
 #------ tbf3's .iplt entry
 #------------------------------------------------------------------------------
     a180:	0afffbf2 	beq	9150 <aaf1-0xeb0>
-    a184:	e59f4000 	ldr	r4, \[pc, #0\]	; a18c <arm\+0x164>
+    a184:	e59f4000 	ldr	r4, \[pc\]	; a18c <arm\+0x164>
-    a188:	e59f4000 	ldr	r4, \[pc, #0\]	; a190 <arm\+0x168>
+    a188:	e59f4000 	ldr	r4, \[pc\]	; a190 <arm\+0x168>
 #------------------------------------------------------------------------------
 #------ GP-relative offset of tbf3's .igot.plt entry
 #------------------------------------------------------------------------------
@@ -572,8 +572,8 @@ Disassembly of section \.text:
 #------ aaf4's .plt entry
 #------------------------------------------------------------------------------
     a19c:	0afffba0 	beq	9024 <aaf1-0xfdc>
-    a1a0:	e59f4000 	ldr	r4, \[pc, #0\]	; a1a8 <arm\+0x180>
+    a1a0:	e59f4000 	ldr	r4, \[pc\]	; a1a8 <arm\+0x180>
-    a1a4:	e59f4000 	ldr	r4, \[pc, #0\]	; a1ac <arm\+0x184>
+    a1a4:	e59f4000 	ldr	r4, \[pc\]	; a1ac <arm\+0x184>
 #------------------------------------------------------------------------------
 #------ .got offset for aaf4
 #------------------------------------------------------------------------------
@@ -594,8 +594,8 @@ Disassembly of section \.text:
 #------ taf4's .plt entry
 #------------------------------------------------------------------------------
     a1b8:	0afffbba 	beq	90a8 <aaf1-0xf58>
-    a1bc:	e59f4000 	ldr	r4, \[pc, #0\]	; a1c4 <arm\+0x19c>
+    a1bc:	e59f4000 	ldr	r4, \[pc\]	; a1c4 <arm\+0x19c>
-    a1c0:	e59f4000 	ldr	r4, \[pc, #0\]	; a1c8 <arm\+0x1a0>
+    a1c0:	e59f4000 	ldr	r4, \[pc\]	; a1c8 <arm\+0x1a0>
 #------------------------------------------------------------------------------
 #------ .got offset for taf4
 #------------------------------------------------------------------------------
@@ -616,8 +616,8 @@ Disassembly of section \.text:
 #------ abf4's .plt entry
 #------------------------------------------------------------------------------
     a1d4:	0afffba4 	beq	906c <aaf1-0xf94>
-    a1d8:	e59f4000 	ldr	r4, \[pc, #0\]	; a1e0 <arm\+0x1b8>
+    a1d8:	e59f4000 	ldr	r4, \[pc\]	; a1e0 <arm\+0x1b8>
-    a1dc:	e59f4000 	ldr	r4, \[pc, #0\]	; a1e4 <arm\+0x1bc>
+    a1dc:	e59f4000 	ldr	r4, \[pc\]	; a1e4 <arm\+0x1bc>
 #------------------------------------------------------------------------------
 #------ .got offset for abf4
 #------------------------------------------------------------------------------
@@ -638,8 +638,8 @@ Disassembly of section \.text:
 #------ tbf4's .plt entry
 #------------------------------------------------------------------------------
     a1f0:	0afffba1 	beq	907c <aaf1-0xf84>
-    a1f4:	e59f4000 	ldr	r4, \[pc, #0\]	; a1fc <arm\+0x1d4>
+    a1f4:	e59f4000 	ldr	r4, \[pc\]	; a1fc <arm\+0x1d4>
-    a1f8:	e59f4000 	ldr	r4, \[pc, #0\]	; a200 <arm\+0x1d8>
+    a1f8:	e59f4000 	ldr	r4, \[pc\]	; a200 <arm\+0x1d8>
 #------------------------------------------------------------------------------
 #------ .got offset for tbf4
 #------------------------------------------------------------------------------

ld/testsuite/ld-arm/jump-reloc-veneers-long.d

@@ -16,6 +16,6 @@ Disassembly of section .text:
 000080.. <[^>]*>:
     80..:	4778      	bx	pc
     80..:	46c0      	nop			; \(mov r8, r8\)
-    80..:	e59fc000 	ldr	ip, \[pc, #0\]	; 80.. <__dest_veneer\+0xc>
+    80..:	e59fc000 	ldr	ip, \[pc\]	; 80.. <__dest_veneer\+0xc>
     80..:	e12fff1c 	bx	ip
     80..:	09000001 	.word	0x09000001

ld/testsuite/ld-arm/tls-longplt-lib.d

@@ -53,7 +53,7 @@ Disassembly of section .foo:
  400102c:	00000000 	.word	0x00000000
 
 04001030 <__unnamed_veneer>:
- 4001030:	e59f1000 	ldr	r1, \[pc, #0\]	; .*
+ 4001030:	e59f1000 	ldr	r1, \[pc\]	; .*
  4001034:	e08ff001 	add	pc, pc, r1
  4001038:	fc007170 	.word	0xfc007170
  400103c:	00000000 	.word	0x00000000

ld/testsuite/ld-arm/tls-thumb1.d

@@ -39,7 +39,7 @@ Disassembly of section .text:
 000081c8 <__unnamed_veneer>:
     81c8:	4778      	bx	pc
     81ca:	46c0      	nop			; .*
-    81cc:	e59f1000 	ldr	r1, \[pc, #0\]	; .*
+    81cc:	e59f1000 	ldr	r1, \[pc\]	; .*
     81d0:	e081f00f 	add	pc, r1, pc
     81d4:	ffffffa0 	.word	0xffffffa0
 
@@ -61,14 +61,14 @@ Disassembly of section .foo:
  400102c:	00000000 	.word	0x00000000
 
 04001030 <__unnamed_veneer>:
- 4001030:	e59f1000 	ldr	r1, \[pc, #0\]	; .*
+ 4001030:	e59f1000 	ldr	r1, \[pc\]	; .*
  4001034:	e08ff001 	add	pc, pc, r1
  4001038:	fc00713c 	.word	0xfc00713c
 
 0400103c <__unnamed_veneer>:
  400103c:	4778      	bx	pc
  400103e:	46c0      	nop			; .*
- 4001040:	e59f1000 	ldr	r1, \[pc, #0\]	; .*
+ 4001040:	e59f1000 	ldr	r1, \[pc\]	; .*
  4001044:	e081f00f 	add	pc, r1, pc
  4001048:	fc00712c 	.word	0xfc00712c
  400104c:	00000000 	.word	0x00000000

opcodes/ChangeLog

@@ -1,3 +1,12 @@
+2011-06-02  Jie Zhang <jie@codesourcery.com>
+	    Nathan Sidwell <nathan@codesourcery.com>
+	    Maciej Rozycki <macro@codesourcery.com>
+
+	* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
+	as address offset.
+	(print_arm_address): Likewise. Elide positive #0 appropriately.
+	(print_insn_arm): Likewise.
+
 2011-06-02  Nick Clifton  <nickc@redhat.com>
 
 	* arm-dis.c: Fix spelling mistakes.

opcodes/arm-dis.c

@@ -1893,6 +1893,8 @@ print_insn_coprocessor (bfd_vma pc,
 			  func (stream, ", #%d]%s",
 				offset,
 				WRITEBACK_BIT_SET ? "!" : "");
+			else if (NEGATIVE_BIT_SET)
+			  func (stream, ", #-0]");
 			else
 			  func (stream, "]");
 		      }
@@ -1904,10 +1906,14 @@ print_insn_coprocessor (bfd_vma pc,
 			  {
 			    if (offset)
 			      func (stream, ", #%d", offset);
+			    else if (NEGATIVE_BIT_SET)
+			      func (stream, ", #-0");
 			  }
 			else
 			  {
-			    func (stream, ", {%d}", offset);
+			    func (stream, ", {%s%d}",
+				  (NEGATIVE_BIT_SET && !offset) ? "-" : "",
+				  offset);
 			    value_in_comment = offset;
 			  }
 		      }
@@ -2338,13 +2344,15 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
 
       func (stream, "[pc");
 
-      if (NEGATIVE_BIT_SET)
-	offset = - offset;
-
       if (PRE_BIT_SET)
 	{
-	  /* Pre-indexed.  */
+	  /* Pre-indexed.  Elide offset of positive zero when
-	  func (stream, ", #%d]", offset);
+	     non-writeback.  */
+	  if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
+	    func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
+
+	  if (NEGATIVE_BIT_SET)
+	    offset = -offset;
 
 	  offset += pc + 8;
 
@@ -2352,12 +2360,11 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
 	     being used.  Probably a very dangerous thing
 	     for the programmer to do, but who are we to
 	     argue ?  */
-	  if (WRITEBACK_BIT_SET)
+	  func (stream, "]%s", WRITEBACK_BIT_SET ? "!" : "");
-	    func (stream, "!");
 	}
       else  /* Post indexed.  */
 	{
-	  func (stream, "], #%d", offset);
+	  func (stream, "], #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
 
 	  /* Ie ignore the offset.  */
 	  offset = pc + 8;
@@ -2376,15 +2383,14 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
 	{
 	  if ((given & 0x02000000) == 0)
 	    {
+	      /* Elide offset of positive zero when non-writeback.  */
 	      offset = given & 0xfff;
-	      if (offset)
+	      if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
-		func (stream, ", #%s%d",
+		func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
-		      NEGATIVE_BIT_SET ? "-" : "", offset);
 	    }
 	  else
 	    {
-	      func (stream, ", %s",
+	      func (stream, ", %s", NEGATIVE_BIT_SET ? "-" : "");
-		    NEGATIVE_BIT_SET ? "-" : "");
 	      arm_decode_shift (given, func, stream, TRUE);
 	    }
 
@@ -2395,12 +2401,10 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
 	{
 	  if ((given & 0x02000000) == 0)
 	    {
+	      /* Always show offset.  */
 	      offset = given & 0xfff;
-	      if (offset)
+	      func (stream, "], #%s%d",
-		func (stream, "], #%s%d",
+		    NEGATIVE_BIT_SET ? "-" : "", offset);
-		      NEGATIVE_BIT_SET ? "-" : "", offset);
-	      else
-		func (stream, "]");
 	    }
 	  else
 	    {
@@ -2993,20 +2997,23 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
                           /* PC relative with immediate offset.  */
 			  int offset = ((given & 0xf00) >> 4) | (given & 0xf);
 
-			  if (NEGATIVE_BIT_SET)
-			    offset = - offset;
-
 			  if (PRE_BIT_SET)
 			    {
-			      if (offset)
+			      /* Elide positive zero offset.  */
-				func (stream, "[pc, #%d]\t; ", offset);
+			      if (offset || NEGATIVE_BIT_SET)
+				func (stream, "[pc, #%s%d]\t; ",
+				      NEGATIVE_BIT_SET ? "-" : "", offset);
 			      else
-				func (stream, "[pc]\t; ");				
+				func (stream, "[pc]\t; ");
+			      if (NEGATIVE_BIT_SET)
+				offset = -offset;
 			      info->print_address_func (offset + pc + 8, info);
 			    }
 			  else
 			    {
-			      func (stream, "[pc], #%d", offset);
+			      /* Always show the offset.  */
+			      func (stream, "[pc], #%s%d",
+				    NEGATIVE_BIT_SET ? "-" : "", offset);
 			      if (! allow_unpredictable)
 				is_unpredictable = TRUE;
 			    }
@@ -3015,9 +3022,6 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
 			{
 			  int offset = ((given & 0xf00) >> 4) | (given & 0xf);
 
-			  if (NEGATIVE_BIT_SET)
-			    offset = - offset;
-
 			  func (stream, "[%s",
 				arm_regnames[(given >> 16) & 0xf]);
 
@@ -3025,13 +3029,15 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
 			    {
 			      if (IMMEDIATE_BIT_SET)
 				{
-				  if (WRITEBACK_BIT_SET)
+				  /* Elide offset for non-writeback
-				    /* Immediate Pre-indexed.  */
+				     positive zero.  */
-				    /* PR 10924: Offset must be printed, even if it is zero.  */
+				  if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET
-				    func (stream, ", #%d", offset);
+				      || offset)
-				  else if (offset)
+				    func (stream, ", #%s%d",
-				    /* Immediate Offset: printing zero offset is optional.  */
+					  NEGATIVE_BIT_SET ? "-" : "", offset);
-				    func (stream, ", #%d", offset);
+
+				  if (NEGATIVE_BIT_SET)
+				    offset = -offset;
 
 				  value_in_comment = offset;
 				}
@@ -3059,7 +3065,10 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
 				{
 				  /* Immediate Post-indexed.  */
 				  /* PR 10924: Offset must be printed, even if it is zero.  */
-				  func (stream, "], #%d", offset);
+				  func (stream, "], #%s%d",
+					NEGATIVE_BIT_SET ? "-" : "", offset);
+				  if (NEGATIVE_BIT_SET)
+				    offset = -offset;
 				  value_in_comment = offset;
 				}
 			      else