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Add support for cgen machine determination.

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* cgen-dis.in (print_insn_@arch@): Add support for target machine
        determination via CGEN_COMPUTE_MACH.
        * fr30-desc.c: Regenerate.
        * fr30-dis.c: Regenerate.
        * fr30-opc.h: Regenerate.
        * m32r-desc.c: Regenerate.
        * m32r-dis.c: Regenerate.
        * m32r-opc.h: Regenerate.
        * m32r-opinst.c: Regenerate.
This commit is contained in:
Patrick Macdonald 2001-03-20 20:56:34 +00:00
parent cc5ce05235
commit 27fca2d871
9 changed files with 43 additions and 19 deletions
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12
opcodes/ChangeLog
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@ -1,3 +1,15 @@
2001-03-20 Patrick Macdonald <patrickm@redhat.com>
* cgen-dis.in (print_insn_@arch@): Add support for target machine
determination via CGEN_COMPUTE_MACH.
* fr30-desc.c: Regenerate.
* fr30-dis.c: Regenerate.
* fr30-opc.h: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-dis.c: Regenerate.
* m32r-opc.h: Regenerate.
* m32r-opinst.c: Regenerate.
2001-03-20 H.J. Lu <hjl@gnu.org> 2001-03-20 H.J. Lu <hjl@gnu.org>
* configure.in: Remove the redundent AC_ARG_PROGRAM. * configure.in: Remove the redundent AC_ARG_PROGRAM.

12
opcodes/cgen-dis.in
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@ -358,17 +358,21 @@ print_insn_@arch@ (pc, info)
arch = info->arch; arch = info->arch;
if (arch == bfd_arch_unknown) if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH; arch = CGEN_BFD_ARCH;
/* There's no standard way to compute the isa number (e.g. for arm thumb) /* There's no standard way to compute the machine or isa number
so we leave it to the target. */ so we leave it to the target. */
#ifdef CGEN_COMPUTE_MACH
mach = CGEN_COMPUTE_MACH (info);
#else
mach = info->mach;
#endif
#ifdef CGEN_COMPUTE_ISA #ifdef CGEN_COMPUTE_ISA
isa = CGEN_COMPUTE_ISA (info); isa = CGEN_COMPUTE_ISA (info);
#else #else
isa = 0; isa = 0;
#endif #endif
mach = info->mach;
/* If we've switched cpu's, close the current table and open a new one. */ /* If we've switched cpu's, close the current table and open a new one. */
if (cd if (cd
&& (isa != prev_isa && (isa != prev_isa

2
opcodes/fr30-desc.c
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@ -1600,7 +1600,7 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
const CGEN_MACH *mach = const CGEN_MACH *mach =
lookup_mach_via_bfd_name (fr30_cgen_mach_table, name); lookup_mach_via_bfd_name (fr30_cgen_mach_table, name);
machs |= mach->num << 1; machs |= 1 << mach->num;
break; break;
} }
case CGEN_CPU_OPEN_ENDIAN : case CGEN_CPU_OPEN_ENDIAN :

12
opcodes/fr30-dis.c
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@ -624,17 +624,21 @@ print_insn_fr30 (pc, info)
arch = info->arch; arch = info->arch;
if (arch == bfd_arch_unknown) if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH; arch = CGEN_BFD_ARCH;
/* There's no standard way to compute the isa number (e.g. for arm thumb) /* There's no standard way to compute the machine or isa number
so we leave it to the target. */ so we leave it to the target. */
#ifdef CGEN_COMPUTE_MACH
mach = CGEN_COMPUTE_MACH (info);
#else
mach = info->mach;
#endif
#ifdef CGEN_COMPUTE_ISA #ifdef CGEN_COMPUTE_ISA
isa = CGEN_COMPUTE_ISA (info); isa = CGEN_COMPUTE_ISA (info);
#else #else
isa = 0; isa = 0;
#endif #endif
mach = info->mach;
/* If we've switched cpu's, close the current table and open a new one. */ /* If we've switched cpu's, close the current table and open a new one. */
if (cd if (cd
&& (isa != prev_isa && (isa != prev_isa

4
opcodes/fr30-opc.h
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@ -77,14 +77,14 @@ typedef enum cgen_insn_type {
, FR30_INSN_ORCCR, FR30_INSN_STILM, FR30_INSN_ADDSP, FR30_INSN_EXTSB , FR30_INSN_ORCCR, FR30_INSN_STILM, FR30_INSN_ADDSP, FR30_INSN_EXTSB
, FR30_INSN_EXTUB, FR30_INSN_EXTSH, FR30_INSN_EXTUH, FR30_INSN_LDM0 , FR30_INSN_EXTUB, FR30_INSN_EXTSH, FR30_INSN_EXTUH, FR30_INSN_LDM0
, FR30_INSN_LDM1, FR30_INSN_STM0, FR30_INSN_STM1, FR30_INSN_ENTER , FR30_INSN_LDM1, FR30_INSN_STM0, FR30_INSN_STM1, FR30_INSN_ENTER
, FR30_INSN_LEAVE, FR30_INSN_XCHB, FR30_INSN_MAX , FR30_INSN_LEAVE, FR30_INSN_XCHB
} CGEN_INSN_TYPE; } CGEN_INSN_TYPE;
/* Index of `invalid' insn place holder. */ /* Index of `invalid' insn place holder. */
#define CGEN_INSN_INVALID FR30_INSN_INVALID #define CGEN_INSN_INVALID FR30_INSN_INVALID
/* Total number of insns in table. */ /* Total number of insns in table. */
#define MAX_INSNS ((int) FR30_INSN_MAX) #define MAX_INSNS ((int) FR30_INSN_XCHB + 1)
/* This struct records data prior to insertion or after extraction. */ /* This struct records data prior to insertion or after extraction. */
struct cgen_fields struct cgen_fields

2
opcodes/m32r-desc.c
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@ -1324,7 +1324,7 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
const CGEN_MACH *mach = const CGEN_MACH *mach =
lookup_mach_via_bfd_name (m32r_cgen_mach_table, name); lookup_mach_via_bfd_name (m32r_cgen_mach_table, name);
machs |= mach->num << 1; machs |= 1 << mach->num;
break; break;
} }
case CGEN_CPU_OPEN_ENDIAN : case CGEN_CPU_OPEN_ENDIAN :

12
opcodes/m32r-dis.c
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@ -563,17 +563,21 @@ print_insn_m32r (pc, info)
arch = info->arch; arch = info->arch;
if (arch == bfd_arch_unknown) if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH; arch = CGEN_BFD_ARCH;
/* There's no standard way to compute the isa number (e.g. for arm thumb) /* There's no standard way to compute the machine or isa number
so we leave it to the target. */ so we leave it to the target. */
#ifdef CGEN_COMPUTE_MACH
mach = CGEN_COMPUTE_MACH (info);
#else
mach = info->mach;
#endif
#ifdef CGEN_COMPUTE_ISA #ifdef CGEN_COMPUTE_ISA
isa = CGEN_COMPUTE_ISA (info); isa = CGEN_COMPUTE_ISA (info);
#else #else
isa = 0; isa = 0;
#endif #endif
mach = info->mach;
/* If we've switched cpu's, close the current table and open a new one. */ /* If we've switched cpu's, close the current table and open a new one. */
if (cd if (cd
&& (isa != prev_isa && (isa != prev_isa

4
opcodes/m32r-opc.h
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@ -74,14 +74,14 @@ typedef enum cgen_insn_type {
, M32R_INSN_SUBV, M32R_INSN_SUBX, M32R_INSN_TRAP, M32R_INSN_UNLOCK , M32R_INSN_SUBV, M32R_INSN_SUBX, M32R_INSN_TRAP, M32R_INSN_UNLOCK
, M32R_INSN_SATB, M32R_INSN_SATH, M32R_INSN_SAT, M32R_INSN_PCMPBZ , M32R_INSN_SATB, M32R_INSN_SATH, M32R_INSN_SAT, M32R_INSN_PCMPBZ
, M32R_INSN_SADD, M32R_INSN_MACWU1, M32R_INSN_MSBLO, M32R_INSN_MULWU1 , M32R_INSN_SADD, M32R_INSN_MACWU1, M32R_INSN_MSBLO, M32R_INSN_MULWU1
, M32R_INSN_MACLH1, M32R_INSN_SC, M32R_INSN_SNC, M32R_INSN_MAX , M32R_INSN_MACLH1, M32R_INSN_SC, M32R_INSN_SNC
} CGEN_INSN_TYPE; } CGEN_INSN_TYPE;
/* Index of `invalid' insn place holder. */ /* Index of `invalid' insn place holder. */
#define CGEN_INSN_INVALID M32R_INSN_INVALID #define CGEN_INSN_INVALID M32R_INSN_INVALID
/* Total number of insns in table. */ /* Total number of insns in table. */
#define MAX_INSNS ((int) M32R_INSN_MAX) #define MAX_INSNS ((int) M32R_INSN_SNC + 1)
/* This struct records data prior to insertion or after extraction. */ /* This struct records data prior to insertion or after extraction. */
struct cgen_fields struct cgen_fields

2
opcodes/m32r-opinst.c
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@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN. THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright 1996, 1997, 1998, 1999, 2001 Free Software Foundation, Inc. Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of the GNU Binutils and/or GDB, the GNU debugger. This file is part of the GNU Binutils and/or GDB, the GNU debugger.